Bellows tube
    31.
    发明授权
    Bellows tube 失效
    波纹管

    公开(公告)号:US06216743B1

    公开(公告)日:2001-04-17

    申请号:US09514298

    申请日:2000-02-28

    IPC分类号: F16L1100

    CPC分类号: F01N13/1816 F16L27/1004

    摘要: The present invention is directed to a bellows tube formed of metal having a cylindrical collar portion and a plurality of corrugations adjacent thereto with outwardly curved portions and inwardly curved portions alternately formed along the longitudinal axis of the tube. The bellows tube includes a bulged end portion which extends from a first outwardly curved portion of the outwardly curved portions toward the collar portion. The bulged end portion is bulged outward of the tube, with its outer diameter gradually reduced from the first outwardly curved portion to the collar portion. A connecting end portion is formed for connecting the bulged end portion with the collar portion, and the connecting end portion is curved inward of the tube. Preferably, the radius of curvature of the connecting end portion is smaller than the radius of curvature of the first outwardly curved end portion.

    摘要翻译: 本发明涉及一种由金属形成的波纹管,其具有圆柱形套环部分和与其相邻的多个波纹,其具有向外弯曲部分和沿着管的纵向轴线交替形成的向内弯曲部分。 波纹管包括从向外弯曲部分的第一向外弯曲部分朝向凸缘部分延伸的凸出端部。 凸起端部从管的外侧凸出,其外径从第一向外弯曲部逐渐减小到凸缘部。 连接端部形成为用于将突出端部与轴环部分连接,并且连接端部向管内向弯曲。 优选地,连接端部的曲率半径小于第一向外弯曲的端部的曲率半径。

    Color signal processing circuit
    34.
    发明授权
    Color signal processing circuit 失效
    彩色信号处理电路

    公开(公告)号:US4661841A

    公开(公告)日:1987-04-28

    申请号:US713599

    申请日:1985-03-19

    申请人: Susumu Suzuki

    发明人: Susumu Suzuki

    IPC分类号: H04N9/64 H04N9/67 H04N9/68

    CPC分类号: H04N9/68 H04N9/64 H04N9/67

    摘要: Multiplier and multiplicand output means is connected to multiplier means having a multiplier and multiplicand input section. The multiplier and multiplicand output means produces second matrix coefficient signals in response to first matrix coefficient signals, automatic chroma control signal and adjustment signal. The second matrix coefficient signals are inputted to the multiplier on a time-sharing basis and are multiplied with an input digital chroma signal in this multiplier. The second matrix coefficient signals include an automatic chroma control component, color saturation control component and hue control component.

    摘要翻译: 乘法器和乘法器输出装置连接到具有乘法器和被乘数输入部分的乘法器装置。 乘法器和乘法器输出装置响应于第一矩阵系数信号,自动色度控制信号和调整信号产生第二矩阵系数信号。 第二矩阵系数信号在分时基础上输入到乘法器,并且与该乘法器中的输入数字色度信号相乘。 第二矩阵系数信号包括自动色度控制部件,色彩饱和度控制部件和色调控制部件。

    Digital television signal processing circuit
    35.
    发明授权
    Digital television signal processing circuit 失效
    数字电视信号处理电路

    公开(公告)号:US4644389A

    公开(公告)日:1987-02-17

    申请号:US706390

    申请日:1985-02-27

    IPC分类号: H04N9/64 H04N9/78 H04N11/04

    CPC分类号: H04N9/78

    摘要: An analog video signal of a PAL system is converted into a digital video signal by an A/D converter. The digital video signal is supplied to a delay device so as to be subjected to hue correction and Y/C separation. The delay device generates a plurality of digital video signals with different delay times. The digital video signals S1(t) and S2(t) obtained from the delay device are supplied to a first subtracter, and the digital video signals S3(t) and S4(t) are supplied to a second subtracter. The outputs from the first and second subtracters are supplied to a third subtracter, and the output from the third subtracter is multiplied with a coefficient, thereby obtaining a first chrominance signal U(t). The outputs from the first and second subtracters are supplied to a first adder, and the output from the first adder is multiplied with a coefficient, thereby obtaining a second chrominance signal V(t).

    摘要翻译: PAL系统的模拟视频信号由A / D转换器转换为数字视频信号。 将数字视频信号提供给延迟装置,以进行色相校正和Y / C分离。 延迟装置产生具有不同延迟时间的多个数字视频信号。 从延迟装置获得的数字视频信号S1(t)和S2(t)被提供给第一减法器,数字视频信号S3(t)和S4(t)被提供给第二减法器。 来自第一减法器和第二减法器的输出被提供给第三减法器,并且将第三减法器的输出乘以系数,从而获得第一色度信号U(t)。 将第一和第二减法器的输出提供给第一加法器,并将第一加法器的输出乘以系数,从而获得第二色度信号V(t)。

    Digital TV receiver with digital video processing circuit
    36.
    发明授权
    Digital TV receiver with digital video processing circuit 失效
    数字电视接收机采用数字视频处理电路

    公开(公告)号:US4609938A

    公开(公告)日:1986-09-02

    申请号:US517443

    申请日:1983-07-26

    IPC分类号: H04N9/64 H04N9/70

    CPC分类号: H04N9/64

    摘要: A digital TV receiver includes an A/D converter circuit for converting an analog video signal to a digital video signal, a signal separator circuit for separating a digital chroma signal and a digital Y signal from the digital video signal, a color killer circuit for gating the digital chroma signal to generate a gated C signal when burst components are contained in the digital chroma signal, and a processor circuit for digitally composing RGB signals from the digital Y signal and the gated C signal. The RGB signals are used as tricolor signals for a color CRT.

    摘要翻译: 数字电视接收机包括用于将模拟视频信号转换为数字视频信号的A / D转换器电路,用于从数字视频信号分离数字色度信号和数字Y信号的信号分离器电路,用于门控的彩色抑制电路 数字色度信号,当脉冲分量包含在数字色度信号中时产生门控C信号;以及处理器电路,用于数字地组合来自数字Y信号和门控C信号的RGB信号。 RGB信号用作彩色CRT的三色信号。

    Storage system having nonvolatile semiconductor storage device with nonvolatile semiconductor memory
    38.
    发明授权
    Storage system having nonvolatile semiconductor storage device with nonvolatile semiconductor memory 有权
    具有具有非易失性半导体存储器的非易失性半导体存储装置的存储系统

    公开(公告)号:US09116622B2

    公开(公告)日:2015-08-25

    申请号:US13499260

    申请日:2012-03-13

    IPC分类号: G06F12/02 G06F3/06

    摘要: A storage system coupled to a host has a nonvolatile semiconductor storage device that includes a nonvolatile semiconductor memory configured by a plurality of pages, and a storage controller coupled to the semiconductor storage device. In the case where data stored in the plurality of pages become unnecessary, with this plurality of pages being the basis of a region of a logical volume based on the nonvolatile semiconductor storage device, the storage controller transmits, to the nonvolatile semiconductor storage device, an unnecessary reduction request for reducing the number of pages that are the basis of the region having the unnecessary data stored therein. On the basis of the unnecessary reduction request, the nonvolatile semiconductor storage device invalidates the plurality of pages that are the basis of the region having the unnecessary data stored therein.

    摘要翻译: 耦合到主机的存储系统具有非易失性半导体存储装置,其包括由多页构成的非易失性半导体存储器和耦合到半导体存储装置的存储控制器。 在多页中存储的数据变得不必要的情况下,以该多页是基于非易失性半导体存储装置的逻辑卷的区域的基础,存储控制器向非易失性半导体存储装置发送 用于减少作为其中存储有不必要数据的区域的基础的页数的不必要的减少请求。 基于不必要的减少请求,非易失性半导体存储装置使存储有不需要的数据的区域的基础的多个页面无效。

    KIT FOR PREPARATION OF ANTIGEN-SPECIFIC CYTOTOXIC LYMPHOCYTES
    40.
    发明申请
    KIT FOR PREPARATION OF ANTIGEN-SPECIFIC CYTOTOXIC LYMPHOCYTES 审中-公开
    用于制备抗原特异性细胞淋巴球蛋白的工具包

    公开(公告)号:US20110318828A1

    公开(公告)日:2011-12-29

    申请号:US12998550

    申请日:2009-10-29

    IPC分类号: C12N5/0783 C12M3/00

    摘要: The invention is intended to further improve the operability, economic efficiency and safety in the preparation of antigen-specific CTLs. The invention provides a preparation kit used for a method for preparing antigen-specific cytotoxic T lymphocytes, the method comprising: a first step for inducing antigen-specific cytotoxic T lymphocytes, wherein the components of the first step include a culture medium contained in an injection vessel, a hermetically sealed culture vessel, and the like; a second step for preparing an activated T cell for antigen presentation, wherein the components of the second step include a culture medium contained in an injection vessel, a hermetically sealed culture vessel, and the like, and a third step for proliferating antigen-specific cytotoxic T lymphocytes, wherein the components of the third step include a culture medium contained in an injection vessel, a hermetically sealed separation vessel, a hermetically sealed culture vessel, and the like.

    摘要翻译: 本发明旨在进一步提高抗原特异性CTL的制备的可操作性,经济效率和安全性。 本发明提供了一种用于制备抗原特异性细胞毒性T淋巴细胞的方法的制备试剂盒,该方法包括:诱导抗原特异性细胞毒性T淋巴细胞的第一步骤,其中第一步的成分包括注射剂中所含的培养基 容器,气密密封培养容器等; 用于制备用于抗原呈递的活化T细胞的第二步骤,其中第二步的组分包括包含在注射容器中的培养基,密封的培养容器等,以及用于增殖抗原特异性细胞毒性的第三步骤 T淋巴细胞,其中第三步的组分包括包含在注射容器中的培养基,气密密封的分离容器,气密密封的培养容器等。