公开(公告)号：US20160276484A1

公开(公告)日：2016-09-22

申请号：US15024714

申请日：2013-12-19

Applicant: INTEL CORPORATION

Inventor： Seiyon KIM ,  Rafael RIOS ,  Fahmida FERDOUSI ,  Kelin J. KUHN

IPC: H01L29/78 ,  H01L29/786 ,  H01L29/10 ,  H01L21/306 ,  H01L21/02 ,  H01L29/06 ,  H01L29/16 ,  H01L29/66

Abstract: Non-planar semiconductor devices having hybrid geometry-based active regions are described. For example, a semiconductor device includes a hybrid channel region including a nanowire portion disposed above an omega-FET portion disposed above a fin-FET portion. A gate stack is disposed on exposed surfaces of the hybrid channel region. The gate stack includes a gate dielectric layer and a gate electrode disposed on the gate dielectric layer. Source and drain regions are disposed on either side of the hybrid channel region.

Abstract translation: 描述了具有基于混合几何的有源区域的非平面半导体器件。 例如，半导体器件包括混合沟道区域，其包括设置在鳍状FET部分上方的Ω-FET部分上方的纳米线部分。 栅极叠层设置在混合沟道区域的暴露表面上。 栅极堆叠包括栅极电介质层和设置在栅极介电层上的栅电极。 源极和漏极区域设置在混合沟道区域的两侧。

公开(公告)号：US20150303258A1

公开(公告)日：2015-10-22

申请号：US14789856

申请日：2015-07-01

Applicant: Intel Corporation

Inventor： Kelin J. KUHN ,  Seiyon KIM ,  Rafael RIOS ,  Stephen M. Cea ,  Martin D. GILES ,  Annalisa CAPPELLANI ,  Titash RAKSHIT ,  Peter CHANG ,  Willy RACHMADY

IPC: H01L29/06 ,  H01L29/10 ,  H01L29/423 ,  H01L29/78 ,  H01L27/12 ,  H01L29/165 ,  H01L27/092 ,  H01L29/16

CPC classification number: H01L29/0673 ,  B82Y10/00 ,  H01L21/76224 ,  H01L27/0922 ,  H01L27/1203 ,  H01L29/0676 ,  H01L29/1033 ,  H01L29/16 ,  H01L29/165 ,  H01L29/41733 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66742 ,  H01L29/66795 ,  H01L29/775 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/78618 ,  H01L29/78654 ,  H01L29/78684 ,  H01L29/78696

Abstract: Methods of forming microelectronic structures are described. Embodiments of those methods include forming a nanowire device comprising a substrate comprising source/drain structures adjacent to spacers, and nanowire channel structures disposed between the spacers, wherein the nanowire channel structures are vertically stacked above each other.

Abstract translation: 描述形成微电子结构的方法。 这些方法的实施例包括形成纳米线装置，其包括基板，该基板包括与间隔物相邻的源极/漏极结构，以及设置在间隔物之间​​的纳米线通道结构，其中纳米线通道结构在彼此之上垂直堆叠。