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公开(公告)号：US07945869B2
公开(公告)日：2011-05-17
申请号：US11841418
申请日：2007-08-20
CPC分类号： G03F1/30
摘要： A method for generating a mask pattern is provided. A target lithographic pattern comprising a plurality of first geometric regions is provided, wherein the regions between the plurality of first geometric regions comprise first spaces. The target lithographic pattern is transformed, and the transformed pattern is decomposed into a first pattern and a second pattern.
摘要翻译： 提供了一种用于产生掩模图案的方法。 提供包括多个第一几何区域的目标光刻图案，其中所述多个第一几何区域之间的区域包括第一空间。 目标光刻图案被变换，变换图案被分解为第一图案和第二图案。
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32.发明授权公开(公告)号：US07343582B2
公开(公告)日：2008-03-11
申请号：US11138172
申请日：2005-05-26
IPC分类号： G06F17/50
CPC分类号： G06F17/5068 , G03F1/36 , G03F7/70441 , G06F2217/12 , Y02P90/265
摘要： A method, program product and system is disclosed for performing optical proximity correction (OPC) wherein mask shapes are fragmented based on the effective image processing influence of neighboring shapes on the shape to be fragmented. Neighboring shapes are smoothed prior to determining their influence on the fragmentation of the shape of interest, where the amount of smoothing of a neighboring shape increases as the influence of the neighboring shape on the image process of the shape of interest decreases. A preferred embodiment includes the use of multiple regions of interactions (ROIs) around the shape of interest, and assigning a smoothing parameter to a given ROI that increases as the influence of shapes in that ROI decreases with respect to the shape to be fragmented. The invention provides for accurate OPC that is also efficient.
摘要翻译： 公开了一种用于执行光学邻近校正（OPC）的方法，程序产品和系统，其中基于相邻形状对要分段的形状的有效图像处理影响，掩模形状被分段。 相邻形状在确定其对感兴趣的形状的碎片的影响之前被平滑，其中相邻形状的平滑化量随着相关形状对感兴趣形状的图像处理的影响而增加。 优选实施例包括使用感兴趣的形状周围的多个交互区域（ROI），以及为给定的ROI分配平滑参数，随着该ROI中的形状的影响相对于待分割的形状而减小。 本发明提供了也是有效的精确OPC。
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公开(公告)号：US06541166B2
公开(公告)日：2003-04-01
申请号：US09766005
申请日：2001-01-18
IPC分类号： G03F900
CPC分类号： G03F7/70433 , G03F1/70 , G03F7/70466 , H01J37/3026 , H01J2237/31761
摘要： The present invention relates generally to a method for lithographically printing a mask pattern on a substrate, in particular a semiconductor substrate, wherein the mask pattern includes features with diverse pitches. These features may include device features such as vias or contact holes and lines in integrated circuits. The method comprises splitting the mask pattern into a plurality of masks, wherein one or more of the masks contains relatively tightly nested features and one or more of the masks contains relatively isolated features. Each of the plurality of masks is then successively exposed on a photoresist layer on the substrate. For each exposure, the exposure conditions, photoresist layer, other thin films layers, etching process, mask writing process, and/or mask pattern bias may be optimized for the tightly nested feature pattern or isolated feature pattern.
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公开(公告)号：US20120180006A1
公开(公告)日：2012-07-12
申请号：US12985643
申请日：2011-01-06
IPC分类号： G06F17/50
摘要： Aspects of the invention include a computer-implemented method of designing a photomask. In one embodiment, the method comprises: simulating a first photomask patterning process using a first photomask design to create simulated contours; comparing the simulated contours to a desired design; identifying regions not common to the simulated contours and the desired design; creating desired target shapes for a second photomask patterning process subsequent to the first photomask patterning process based upon the identified regions; and providing the desired target shapes for forming of a second photomask design based upon the desired target shapes.
摘要翻译： 本发明的方面包括设计光掩模的计算机实现的方法。 在一个实施例中，该方法包括：使用第一光掩模设计来模拟第一光掩模图案化工艺以产生模拟轮廓; 将模拟轮廓与期望的设计进行比较; 识别不同于模拟轮廓和所需设计的区域; 在基于所识别的区域的第一光掩模图案化工艺之后，为第二光掩模图案化工艺创建期望的目标形状; 以及基于期望的目标形状提供用于形成第二光掩模设计的期望的目标形状。
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公开(公告)号：US08214770B2
公开(公告)日：2012-07-03
申请号：US12357648
申请日：2009-01-22
IPC分类号： G06F17/50
CPC分类号： G03F1/36
摘要： A method is provided for designing a mask layout for an integrated circuit that ensures proper functional interaction among circuit features by including functional inter-layer and intra-layer constraints on the wafer. The functional constraints used according to the present invention are applied among the simulated wafer images to ensure proper functional interaction, while relaxing or eliminating the EPE constraints on the location of the wafer images.
摘要翻译： 提供了一种用于设计用于集成电路的掩模布局的方法，其通过在晶片上包括功能层间和层内约束来确保电路特征之间的适当的功能交互。 根据本发明使用的功能约束应用于模拟晶片图像中，以确保正确的功能交互，同时放松或消除对晶片图像的位置的EPE约束。
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公开(公告)号：US08039203B2
公开(公告)日：2011-10-18
申请号：US12126741
申请日：2008-05-23
申请人： Helen Wang , Scott D. Halle , Henning Haffner , Haoren Zhuang , Klaus Herold , Matthew E. Colburn , Allen H. Gabor , Zachary Baum , Scott M. Mansfield , Jason E. Meiring
发明人： Helen Wang , Scott D. Halle , Henning Haffner , Haoren Zhuang , Klaus Herold , Matthew E. Colburn , Allen H. Gabor , Zachary Baum , Scott M. Mansfield , Jason E. Meiring
IPC分类号： H01L21/027
CPC分类号： H01L21/32139 , G03F1/36 , G03F1/70 , H01L21/0274 , H01L21/28123 , H01L21/823437 , Y10S438/942
摘要： Integrated circuits and methods of manufacture and design thereof are disclosed. For example, a method of manufacturing includes depositing a gate material over a semiconductor substrate, and depositing a first resist layer over the gate material. A first mask is used to pattern the first resist layer to form first and second resist features. The first resist features include pattern for gate lines of the semiconductor device and the second resist features include printing assist features. A second mask is used to form a resist template; the second mask removes the second resist features.
摘要翻译： 公开了集成电路及其制造和设计方法。 例如，制造方法包括在半导体衬底上沉积栅极材料，并且在栅极材料上沉积第一抗蚀剂层。 使用第一掩模来图案化第一抗蚀剂层以形成第一和第二抗蚀剂特征。 第一抗蚀剂特征包括半导体器件的栅极线的图案，第二抗蚀剂特征包括印刷辅助特征。 使用第二掩模形成抗蚀剂模板; 第二掩模移除第二抗蚀剂特征。
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37.发明申请公开(公告)号：US20100175043A1
公开(公告)日：2010-07-08
申请号：US12349108
申请日：2009-01-06
IPC分类号： G06F17/50
摘要： A method is provided for modeling lithographic processes in the design of photomasks for the manufacture of semiconductor integrated circuits, and more particularly for simulating intermediate range flare effects. For a region of influence (ROI) from first ROI1 of about 5λ/NA to distance ROI2 when the point spread function has a slope that is slowly varying according to a predetermined criterion, then mask shapes at least within the distance range from ROI1 to ROI2 are smoothed prior to computing the SOCS convolutions. The method provides a fast method for simulating intermediate range flare effects with sufficient accuracy.
摘要翻译： 提供了一种用于在用于制造半导体集成电路的光掩模的设计中对光刻工艺进行建模的方法，更具体地说，用于模拟中间范围闪光效应。 对于当点扩散函数具有根据预定标准缓慢变化的斜率时，从约5λ/ NA的第一ROI1到距离ROI2的影响区域（ROI），则至少在从ROI1到ROI2的距离范围内的掩模形状 在计算SOCS卷积之前进行平滑处理。 该方法提供了一种用于以足够的精度模拟中等范围闪光效果的快速方法。
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公开(公告)号：US5125750A
公开(公告)日：1992-06-30
申请号：US669205
申请日：1991-03-14
CPC分类号： G01Q80/00 , G11B7/122 , G11B7/1374 , G11B7/1387 , B82Y10/00 , G11B2007/13727
摘要： An optical recording system including a read/write optical assembly including an objective lens for reading or writing from an optical medium including a solid immersion lens disposed between the objective lens and having a surface closely spaced from the recording medium.
摘要翻译： 一种包括读/写光学组件的光学记录系统，包括用于从包括固体浸没透镜的光学介质读取或写入的物镜，该物镜设置在物镜之间并且具有与记录介质紧密隔开的表面。
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公开(公告)号：US08365108B2
公开(公告)日：2013-01-29
申请号：US12985643
申请日：2011-01-06
摘要： Aspects of the invention include a computer-implemented method of designing a photomask. In one embodiment, the method comprises: simulating a first photomask patterning process using a first photomask design to create simulated contours; comparing the simulated contours to a desired design; identifying regions not common to the simulated contours and the desired design; creating desired target shapes for a second photomask patterning process subsequent to the first photomask patterning process based upon the identified regions; and providing the desired target shapes for forming of a second photomask design based upon the desired target shapes.
摘要翻译： 本发明的方面包括设计光掩模的计算机实现的方法。 在一个实施例中，该方法包括：使用第一光掩模设计来模拟第一光掩模图案化工艺以产生模拟轮廓; 将模拟轮廓与期望的设计进行比较; 识别不同于模拟轮廓和所需设计的区域; 在基于所识别的区域的第一光掩模图案化工艺之后，为第二光掩模图案化工艺创建期望的目标形状; 以及基于期望的目标形状提供用于形成第二光掩模设计的期望的目标形状。
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公开(公告)号：US20090081563A1
公开(公告)日：2009-03-26
申请号：US12126741
申请日：2008-05-23
申请人： Helen Wang , Scott D. Halle , Henning Haffner , Haoren Zhuang , Klaus Herold , Matthew E. Colburn , Allen H. Gabor , Zachary Baum , Scott M. Mansfield , Jason E. Meiring
发明人： Helen Wang , Scott D. Halle , Henning Haffner , Haoren Zhuang , Klaus Herold , Matthew E. Colburn , Allen H. Gabor , Zachary Baum , Scott M. Mansfield , Jason E. Meiring
CPC分类号： H01L21/32139 , G03F1/36 , G03F1/70 , H01L21/0274 , H01L21/28123 , H01L21/823437 , Y10S438/942
摘要： Integrated circuits and methods of manufacture and design thereof are disclosed. For example, a method of manufacturing includes depositing a gate material over a semiconductor substrate, and depositing a first resist layer over the gate material. A first mask is used to pattern the first resist layer to form first and second resist features. The first resist features include pattern for gate lines of the semiconductor device and the second resist features include printing assist features. A second mask is used to form a resist template; the second mask removes the second resist features.
摘要翻译： 公开了集成电路及其制造和设计方法。 例如，制造方法包括在半导体衬底上沉积栅极材料，并且在栅极材料上沉积第一抗蚀剂层。 使用第一掩模来图案化第一抗蚀剂层以形成第一和第二抗蚀剂特征。 第一抗蚀剂特征包括半导体器件的栅极线的图案，第二抗蚀剂特征包括印刷辅助特征。 使用第二掩模形成抗蚀剂模板; 第二掩模移除第二抗蚀剂特征。
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