公开(公告)号：US12228830B2

公开(公告)日：2025-02-18

申请号：US17572638

申请日：2022-01-11

Applicant: Japan Display Inc.

Inventor： Takahiro Ochiai ,  Hiroshi Inamura ,  Keita Sasanuma ,  Kengo Shiragami

IPC: G02F1/1362 ,  H01L27/12 ,  G01R31/28 ,  G02F1/1343 ,  G02F1/1345 ,  G02F1/1368 ,  H01L29/786

Abstract: According to one embodiment, a display device includes a first line which is arranged across a display portion, and includes a first end portion and a second end portion located at a non-display portion such that the display portion is located between the first and second end portions, a first switch electrically connected to the first end portion, a second switch electrically connected to the second end portion, a first terminal electrically connected to the first end portion via the first switch, and a second terminal electrically connected to the second end portion via the second switch.

公开(公告)号：US11789327B2

公开(公告)日：2023-10-17

申请号：US17750635

申请日：2022-05-23

Applicant: Japan Display Inc. ,  Panasonic Intellectual Property Corporation of America

Inventor： Tohru Sasaki ,  Takahiro Ochiai

IPC: G02F1/1362 ,  G02F1/1343 ,  G02F1/1333 ,  G02F1/1368 ,  G02F1/1335

CPC classification number: G02F1/136227 ,  G02F1/1368 ,  G02F1/13439 ,  G02F1/133345 ,  G02F1/133512 ,  G02F1/133514 ,  G02F1/134363 ,  G02F1/136213 ,  G02F1/136286 ,  G02F1/13629

Abstract: To form a sufficiently large storage capacitor, a liquid crystal display device includes a liquid crystal display panel having a first substrate, a second substrate, and a liquid crystal held between the first substrate and the second substrate, the liquid crystal display panel having multiple pixels arranged in matrix. The first substrate has, in a transmissive display area provided in each of the pixels, a laminated structure containing a first transparent electrode, a first insulating film, a second transparent electrode, a second insulating film, and a third transparent electrode which are laminated in this order. The first transparent electrode and the second transparent electrode are electrically insulated from each other and together form a first storage capacitor through the first insulating film, and the second transparent electrode and the third transparent electrode are electrically insulated from each other and together form a second storage capacitor through the second insulating film.

公开(公告)号：US11114177B2

公开(公告)日：2021-09-07

申请号：US16906286

申请日：2020-06-19

Applicant: Japan Display Inc. ,  Panasonic Liquid Crystal Display Co., Ltd.

Inventor： Takahiro Ochiai ,  Mitsuru Goto ,  Hiroko Sehata ,  Hiroyuki Higashijima

IPC: G06F3/038 ,  G11C19/28 ,  G09G3/36

Abstract: A display device including a bidirectional shift register circuit, including: a plurality of cascade-connected register circuits; various circuits for setting various nodes to various voltage levels responsive to various signals input to various terminals; and an output circuit which outputs the clock pulse as an output pulse when the voltage of the first node is high level, wherein, at the forward shift operation, the bottom dummy register circuit is not input the reset signal and the first node of the bottom dummy register circuit is reset if the initial reset circuit of the bottom dummy register circuit receives the backward trigger signal, and wherein, at the backward shift operation, the top dummy register circuit is not input the reset signal and the first node of the top dummy register circuit is reset if the initial reset circuit of the top dummy register circuit receives the forward trigger signal.

公开(公告)号：US11016351B2

公开(公告)日：2021-05-25

申请号：US16898645

申请日：2020-06-11

Applicant: Japan Display Inc. ,  Panasonic Liquid Crystal Display Co., Ltd.

Inventor： Tohru Sasaki ,  Takahiro Ochiai

IPC: G02F1/1362 ,  G02F1/1343 ,  G02F1/1333 ,  G02F1/1368 ,  G02F1/1335

Abstract: To form a sufficiently large storage capacitor, a liquid crystal display device includes a liquid crystal display panel having a first substrate, a second substrate, and a liquid crystal held between the first substrate and the second substrate, the liquid crystal display panel having multiple pixels arranged in matrix. The first substrate has, in a transmissive display area provided in each of the pixels, a laminated structure containing a first transparent electrode, a first insulating film, a second transparent electrode, a second insulating film, and a third transparent electrode which are laminated in this order. The first transparent electrode and the second transparent electrode are electrically insulated from each other and together form a first storage capacitor through the first insulating film, and the second transparent electrode and the third transparent electrode are electrically insulated from each other and together form a second storage capacitor through the second insulating film.

公开(公告)号：US10969638B2

公开(公告)日：2021-04-06

申请号：US16171728

申请日：2018-10-26

Applicant: Japan Display Inc.

Inventor： Takahiro Ochiai ,  Motoharu Miyamoto ,  Masahiro Hoshiba

IPC: G02F1/1362 ,  G02F1/1368 ,  G02F1/1335 ,  G02F1/1345 ,  H01L29/786 ,  G09G3/36 ,  H01L27/12

Abstract: A liquid crystal display device is provided with a thin film transistor which includes a gate electrode film that is provided in a first electrode layer located over a first insulating layer, a semiconductor film that is disposed over the gate electrode film via a second insulating layer, a drain electrode and a source electrode that are provided in a second electrode layer located over the semiconductor film and are in contact with an upper surface of the semiconductor film, and a light blocking film that is disposed under the first insulating layer. At least a part thereof overlaps the semiconductor film and the gate electrode film in a plan view. One of the drain electrode and the source electrode is connected to a gate line, and the light blocking film is electrically connected to the source electrode.

公开(公告)号：US10120197B2

公开(公告)日：2018-11-06

申请号：US15082323

申请日：2016-03-28

Applicant: Japan Display Inc.

Inventor： Takahiro Ochiai ,  Shinichirou Oka ,  Keita Sasanuma ,  Kouichi Shirai

IPC: G02B27/22 ,  G02F1/1333 ,  G02F1/1343

Abstract: A parallax barrier panel including a first substrate having a flat electrode, and a second substrate, the liquid crystal sandwiched therebetween. The second substrate has first barrier electrodes extending in a first direction and arrayed at a first pitch in a second direction, and has second barrier electrodes, the first and the second harrier electrodes having an interlayer insulating film interposed therebetween. Gaps between the first barrier electrodes are blocked by the second barrier electrodes when viewed in a plan view. Each of the first barrier electrodes is paired with one of the second barrier electrodes. Bus electrodes extend outside the display area along a side thereof. The first barrier electrodes are connected to the bus electrodes via first through holes formed in the interlayer insulating film. The second barrier electrodes are connected to the first barrier electrodes via second through holes formed in the interlay insulating film.

公开(公告)号：US09793007B2

公开(公告)日：2017-10-17

申请号：US15090664

申请日：2016-04-05

Applicant: Japan Display Inc.

Inventor： Takahiro Ochiai ,  Mitsuru Goto ,  Hiroyuki Higashijima ,  Yoshihiro Kotani ,  Shuuichirou Matsumoto

IPC: G09G3/36 ,  G11C19/28 ,  G09G5/00

CPC classification number: G11C19/287 ,  G09G3/3677 ,  G09G5/003 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2330/021

Abstract: A bidirectional shift register capable of performing a stable shift operation in both directions and an image display device using the same are provided. In forward shift operation, when reference point N1 is at H level, (n+4)-th unit register circuit as a rear stage of the bidirectional shift register outputs pulse G(n+4) in synchronization with clock pulse V(n+4) inputted to (n+4)-th unit register circuit. A backward direction trigger signal VSTB is generated not only at the time of start of backward shift, but also, for example, in period (time t4 to t5) of one-phase clock immediately after G(n+4) is outputted in vertical blanking interval of the forward shift. The backward direction trigger signal VSTB is inputted to gate of a transistor provided to set reference point N1 of (n+4)-th unit register circuit to H level at the time of start of the backward shift.

公开(公告)号：US09459503B2

公开(公告)日：2016-10-04

申请号：US14749132

申请日：2015-06-24

Applicant: Japan Display Inc.

Inventor： Takahiro Ochiai ,  Motoharu Miyamoto ,  Masahiro Hoshiba

IPC: G02F1/136 ,  G02F1/1362 ,  G02F1/1368 ,  G02F1/1335 ,  G02F1/1345 ,  H01L29/786

CPC classification number: G02F1/136209 ,  G02F1/133512 ,  G02F1/13454 ,  G02F1/136227 ,  G02F1/1368 ,  G09G3/3677 ,  G09G3/3688 ,  G09G2300/0809 ,  G09G2310/0202 ,  H01L27/1222 ,  H01L27/124 ,  H01L29/78609 ,  H01L29/78633 ,  H01L29/78669

Abstract: A liquid crystal display device is provided with a thin film transistor which includes a gate electrode film that is provided in a first electrode layer located over a first insulating layer, a semiconductor film that is disposed over the gate electrode film via a second insulating layer, a drain electrode and a source electrode that are provided in a second electrode layer located over the semiconductor film and are in contact with an upper surface of the semiconductor film, and a light blocking film that is disposed under the first insulating layer. At least a part thereof overlaps the semiconductor film and the gate electrode film in a plan view. One of the drain electrode and the source electrode is connected to a gate line, and the light blocking film is electrically connected to the source electrode.

公开(公告)号：US20160282660A1

公开(公告)日：2016-09-29

申请号：US15176754

申请日：2016-06-08

Applicant: Japan Display Inc.

Inventor： Takahiro Ochiai ,  Mitsuru Goto

IPC: G02F1/1345 ,  H01L27/12 ,  G02F1/1343 ,  G02F1/1333 ,  G02F1/1368

CPC classification number: G02F1/13452 ,  G02F1/133345 ,  G02F1/13439 ,  G02F1/13458 ,  G02F1/1368 ,  G02F2001/136254 ,  H01L24/05 ,  H01L24/06 ,  H01L27/124

Abstract: A display device includes a transparent substrate having a display region with a plurality of scanning signal lines and video signal lines intersecting thereon, a first terminal formed outside the display region connecting to a first terminal wiring and a second terminal wiring connected to a semiconductor chip, and an inverted staggered thin film transistor. The first terminal includes a first portion, a second portion on the first portion, a third portion having an exposed planar terminal plate on the second portion, a plurality of first vias between the first portion and the second portion, and a plurality of second vias between the second portion and the third portion. The first portion is connected to the first and second terminal wirings, and each of the plurality of first vias is not overlapped with each of the plurality of second vias in plan view.

公开(公告)号：US09190007B2

公开(公告)日：2015-11-17

申请号：US14161723

申请日：2014-01-23

Applicant: Japan Display Inc.

Inventor： Motoharu Miyamoto ,  Takahiro Ochiai

IPC: G09G3/36 ,  G11C19/00

CPC classification number: G09G3/3677 ,  G02F1/13306 ,  G02F1/1345 ,  G09G3/2096 ,  G09G2300/0426 ,  G09G2300/0809 ,  G09G2310/0202 ,  G09G2310/065

Abstract: A circuit block of a driving circuit of a display device includes a first transistor that has a gate being connected to a first node having an active potential during an output period, and controls electrical conduction between a first clock signal line being applied with a first clock signal and the scanning signal line, a second transistor that has a gate being connected to a second node having an active potential during a non-output period, and controls electrical conduction between the first node and an inactive potential line, and a third transistor that has a gate being connected to the first node, and controls electrical conduction between the second node and a first cyclic signal line applied with a first period signal having an active potential at the time of termination of the output period.

Abstract translation: 显示装置的驱动电路的电路块包括第一晶体管，其在输出周期期间具有连接到具有有效电位的第一节点的栅极，并且控制施加于第一时钟的第一时钟信号线之间的导通 信号和扫描信号线，第二晶体管，其在非输出时段期间具有连接到具有有效电位的第二节点的栅极，并控制第一节点与非活动电位线之间的电导;以及第三晶体管， 具有连接到第一节点的栅极，并且控制第二节点与施加在输出周期结束时具有有效电位的第一周期信号的第一循环信号线之间的导电。