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31.发明授权Systems with programmable heterogeneous memory controllers for main memory 有权具有用于主存储器的可编程异构存储器控制器的系统公开(公告)号：US08874843B2
公开(公告)日：2014-10-28
申请号：US13750811
申请日：2013-01-25
CPC分类号： G06F12/0246 , G06F13/1668 , G06F2212/205 , Y02D10/14
摘要： A translating memory module is disclosed including a printed circuit board, at least one memory integrated circuit coupled to the printed board, and at least one support chip coupled to the printed circuit board and coupled between the edge connector and the at least one memory integrated circuit. The at least one support chip includes a bi-directional translator to translate between a first memory communication protocol for the at least one memory integrated circuit and a second memory communication protocol for a memory channel differing from the first memory communication protocol. The second memory communication protocol to communicate data, address, and control signals over the memory channel bus to read and write data into the memory of the translating memory module.
摘要翻译： 公开了一种翻译存储器模块，其包括印刷电路板，耦合到印刷电路板的至少一个存储器集成电路以及耦合到印刷电路板并耦合在边缘连接器和至少一个存储器集成电路之间的至少一个支撑芯片 。 所述至少一个支持芯片包括用于在用于所述至少一个存储器集成电路的第一存储器通信协议和用于不同于所述第一存储器通信协议的存储器通道的第二存储器通信协议之间转换的双向转换器。 第二存储器通信协议，用于通过存储器通道总线传送数据，地址和控制信号，以将数据读取和写入到转换存储器模块的存储器中。
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32.发明授权Programmable heterogeneous memory controllers for main memory with different memory modules 有权可编程异构存储器控制器，用于具有不同存储器模块的主存储器公开(公告)号：US08074022B2
公开(公告)日：2011-12-06
申请号：US11864860
申请日：2007-09-28
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F13/1668 , G06F2212/205 , Y02D10/14
摘要： A computer system is disclosed including a printed circuit board (PCB) including a plurality of traces, at least one processor mounted to the PCB to couple to some of the plurality of traces, a heterogeneous memory channel including a plurality of sockets coupled to a memory channel bus of the PCB, and a memory controller coupled between the at least one processor and the heterogeneous memory channel. The heterogeneous memory channel includes a plurality of sockets coupled to a memory channel bus of the PCB. The plurality of sockets are configured to receive a plurality of different types of memory modules. The memory controller may be a programmable heterogeneous memory controller to flexibly adapt to the memory channel bus to control access to each of the different types of memory modules in the heterogeneous memory channel.
摘要翻译： 公开了一种计算机系统，其包括包括多个迹线的印刷电路板（PCB），至少一个处理器，其安装到PCB以耦合到多个迹线中的一些，异质存储器通道，包括耦合到存储器的多个插座 PCB的通道总线，以及耦合在所述至少一个处理器和所述异构存储器通道之间的存储器控制器。 异质存储器通道包括耦合到PCB的存储器通道总线的多个插座。 多个插槽被配置为接收多个不同类型的存储器模块。 存储器控制器可以是可编程异构存储器控制器，以灵活地适应存储器通道总线来控制对异质存储器通道中的每种不同类型的存储器模块的访问。
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33.发明授权Systems and apparatus with programmable memory control for heterogeneous main memory 有权具有可编程存储器控制的异构主存储器的系统和设备公开(公告)号：US08051253B2
公开(公告)日：2011-11-01
申请号：US11864763
申请日：2007-09-28
CPC分类号： G06F13/1694 , G06F12/08 , G06F12/0893 , G06F13/1684 , G06F2212/205 , Y02D10/13 , Y02D10/14
摘要： A computer system is disclosed including a printed circuit board (PCB) including a plurality of traces, at least one processor mounted to the PCB to couple to some of the plurality of traces, a heterogeneous memory channel including a plurality of sockets coupled to a memory channel bus of the PCB, and a memory controller coupled between the at least one processor and the heterogeneous memory channel. The heterogeneous memory channel includes a plurality of sockets coupled to a memory channel bus of the PCB. The plurality of sockets are configured to receive a plurality of different types of memory modules. The memory controller may be a programmable heterogeneous memory controller to flexibly adapt to the memory channel bus to control access to each of the different types of memory modules in the heterogeneous memory channel.
摘要翻译： 公开了一种计算机系统，其包括包括多个迹线的印刷电路板（PCB），至少一个处理器，其安装到PCB以耦合到多个迹线中的一些，异质存储器通道，包括耦合到存储器的多个插座 PCB的通道总线，以及耦合在所述至少一个处理器和所述异构存储器通道之间的存储器控制器。 异质存储器通道包括耦合到PCB的存储器通道总线的多个插座。 多个插槽被配置为接收多个不同类型的存储器模块。 存储器控制器可以是可编程异构存储器控制器，以灵活地适应存储器通道总线来控制对异质存储器通道中的每种不同类型的存储器模块的访问。
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公开(公告)号：US20080082750A1
公开(公告)日：2008-04-03
申请号：US11864823
申请日：2007-09-28
IPC分类号： G06F12/10
CPC分类号： G11C7/1072 , G06F13/1694 , G11C5/04 , Y02D10/14
摘要： A computer system is disclosed including a printed circuit board (PCB) including a plurality of traces, at least one processor mounted to the PCB to couple to some of the plurality of traces, a heterogeneous memory channel including a plurality of sockets coupled to a memory channel bus of the PCB, and a memory controller coupled between the at least one processor and the heterogeneous memory channel. The heterogeneous memory channel includes a plurality of sockets coupled to a memory channel bus of the PCB. The plurality of sockets are configured to receive a plurality of different types of memory modules. The memory controller may be a programmable heterogeneous memory controller to flexibly adapt to the memory channel bus to control access to each of the different types of memory modules in the heterogeneous memory channel.
摘要翻译： 公开了一种计算机系统，其包括包括多个迹线的印刷电路板（PCB），至少一个处理器，其安装到PCB以耦合到多个迹线中的一些，异质存储器通道，包括耦合到存储器的多个插座 PCB的通道总线，以及耦合在所述至少一个处理器和所述异构存储器通道之间的存储器控制器。 异质存储器通道包括耦合到PCB的存储器通道总线的多个插座。 多个插槽被配置为接收多个不同类型的存储器模块。 存储器控制器可以是可编程异构存储器控制器，以灵活地适应存储器通道总线来控制对异质存储器通道中的每种不同类型的存储器模块的访问。
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35.发明申请APPARATUS WITH A MEMORY CONTROLLER CONFIGURED TO CONTROL ACCESS TO RANDOMLY ACCESSIBLE NON-VOLATILE MEMORY 有权配有记忆控制器的设备，用于控制访问随机访问的非易失性存储器公开(公告)号：US20130138872A1
公开(公告)日：2013-05-30
申请号：US13747455
申请日：2013-01-22
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F12/0638 , G06F13/12 , G06F13/1657 , G06F13/1694 , G06F2212/25 , G06F2212/7203 , G11C7/1006 , G11C7/1072 , Y02D10/14
摘要： An apparatus includes a printed circuit board with a plurality of printed circuit board traces, a memory controller mounted on the printed circuit board coupled to one or more of the plurality of printed circuit board traces, a plurality of non-volatile type of memory integrated circuits coupled to the printed circuit board, and a plurality of support integrated circuits coupled between the memory controller and the plurality of non-volatile type of memory integrated circuits.
摘要翻译： 一种装置包括具有多个印刷电路板迹线的印刷电路板，安装在与多个印刷电路板迹线中的一个或多个印刷电路板迹线耦合的印刷电路板上的存储器控制器，多个非易失型存储器集成电路 耦合到印刷电路板，以及耦合在存储器控制器和多个非易失性类型的存储器集成电路之间的多个支持集成电路。
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36.发明授权Methods of assembly of a computer system with randomly accessible non-volatile memory 有权具有随机访问的非易失性存储器的计算机系统的组装方法公开(公告)号：US08370548B2
公开(公告)日：2013-02-05
申请号：US12832921
申请日：2010-07-08
IPC分类号： G06F13/12
CPC分类号： G06F13/1657 , Y02D10/14
摘要： An apparatus includes a printed circuit board with a plurality of printed circuit board traces, a memory controller mounted on the printed circuit board coupled to one or more of the plurality of printed circuit board traces, a plurality of non-volatile type of memory integrated circuits coupled to the printed circuit board, and a plurality of support integrated circuits coupled between the memory controller and the plurality of non-volatile type of memory integrated circuits.
摘要翻译： 一种装置包括具有多个印刷电路板迹线的印刷电路板，安装在与多个印刷电路板迹线中的一个或多个印刷电路板迹线耦合的印刷电路板上的存储器控制器，多个非易失型存储器集成电路 耦合到印刷电路板，以及耦合在存储器控制器和多个非易失性类型的存储器集成电路之间的多个支持集成电路。
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公开(公告)号：US07774556B2
公开(公告)日：2010-08-10
申请号：US11935224
申请日：2007-11-05
IPC分类号： G06F12/00
CPC分类号： G06F12/1009 , G06F3/0604 , G06F3/0628 , G06F3/0638 , G06F3/064 , G06F3/0646 , G06F3/0647 , G06F3/068 , G06F3/0685 , G06F9/5016 , G06F12/0207 , G06F12/0223 , G06F12/0292 , G06F12/08 , G06F12/10 , G06F12/121 , G06F12/1475 , G06F13/1657 , G06F13/1694 , G06F2212/205 , G06F2212/657 , Y02D10/13 , Y02D10/14 , Y02D10/22
摘要： Main memory is managed by receiving a command from an application to read data associated with a virtual address that is mapped to the main memory. A memory controller determines that the virtual address is mapped to one of the symmetric memory components of the main memory, and accesses memory use characteristics indicating how the data associated with the virtual address has been accessed, The memory controller determines that the data associated with the virtual address has access characteristics suited to an asymmetric memory component of the main memory and loads the data associated with the virtual address to the asymmetric memory component of the main memory. After the loading and using the memory management unit, a command is received from the application to read the data associated with the virtual address, and the data associated with the virtual address is retrieved from the asymmetric memory component.
摘要翻译： 通过接收来自应用程序的命令来读取与映射到主存储器的虚拟地址相关联的数据来管理主存储器。 存储器控制器确定虚拟地址被映射到主存储器的对称存储器组件中的一个，并且访问指示如何与虚拟地址相关联的数据被访问的存储器使用特性。存储器控制器确定与 虚拟地址具有适合于主存储器的非对称存储器组件的访问特征，并将与虚拟地址相关联的数据加载到主存储器的非对称存储器组件。 在加载和使用存储器管理单元之后，从应用程序接收到用于读取与虚拟地址相关联的数据的命令，并且从非对称存储器组件检索与虚拟地址相关联的数据。
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38.发明授权Systems and apparatus for main memory with non-volatile type memory modules, and related technologies 有权具有非易失性存储器模块的主存储系统和装置及相关技术公开(公告)号：US07761624B2
公开(公告)日：2010-07-20
申请号：US11848013
申请日：2007-08-30
IPC分类号： G06F13/12
CPC分类号： G06F13/1657 , Y02D10/14
摘要： A computing system is disclosed that includes a memory controller in a processor socket normally reserved for a processor. A plurality of non-volatile memory modules may be plugged into memory sockets normally reserved for DRAM memory modules. The non-volatile memory modules may be accessed using a data communication protocol to access the non-volatile memory modules. The memory controller controls read and write accesses to the non-volatile memory modules. The memory sockets are coupled to the processor socket by printed circuit board traces. The data communication protocol to access the non-volatile memory modules is communicated over the printed circuit board traces and through the sockets normally used to access DRAM type memory modules.
摘要翻译： 公开了一种计算系统，其包括通常为处理器预留的处理器插座中的存储器控制器。 多个非易失性存储器模块可以插入通常保留给DRAM存储器模块的存储器插槽中。 可以使用数据通信协议访问非易失性存储器模块以访问非易失性存储器模块。 存储器控制器控制对非易失性存储器模块的读取和写入访问。 存储器插座通过印刷电路板迹线耦合到处理器插座。 用于访问非易失性存储器模块的数据通信协议通过印刷电路板迹线和通常用于访问DRAM型存储器模块的插槽来传送。
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39.发明授权Main memory in a system with a memory controller configured to control access to non-volatile memory, and related technologies 有权具有内存控制器的系统中的主内存配置为控制对非易失性存储器的访问以及相关技术公开(公告)号：US07761623B2
公开(公告)日：2010-07-20
申请号：US11847986
申请日：2007-08-30
IPC分类号： G06F13/12
CPC分类号： G06F12/0246 , G06F12/0638 , G06F13/12 , G06F13/1657 , G06F13/1694 , G06F2212/25 , G06F2212/7203 , G11C7/1006 , G11C7/1072 , Y02D10/14
摘要： An apparatus includes a printed circuit board with a plurality of printed circuit board traces, a memory controller mounted on the printed circuit board coupled to one or more of the plurality of printed circuit board traces, a plurality of non-volatile type of memory integrated circuits coupled to the printed circuit board, and a plurality of support integrated circuits coupled between the memory controller and the plurality of non-volatile type of memory integrated circuits.
摘要翻译： 一种装置包括具有多个印刷电路板迹线的印刷电路板，安装在与多个印刷电路板迹线中的一个或多个印刷电路板迹线耦合的印刷电路板上的存储器控制器，多个非易失型存储器集成电路 耦合到印刷电路板，以及耦合在存储器控制器和多个非易失性类型的存储器集成电路之间的多个支持集成电路。
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40.发明申请METHODS FOR MAIN MEMORY WITH NON-VOLATILE TYPE MEMORY MODULES, AND RELATED TECHNOLOGIES 有权具有非易失型存储器模块的主存储器的方法及相关技术公开(公告)号：US20080082733A1
公开(公告)日：2008-04-03
申请号：US11848040
申请日：2007-08-30
IPC分类号： G06F12/02
CPC分类号： G06F13/4009 , G06F12/0638 , Y02D10/13 , Y02D10/14 , Y02D10/151
摘要： A computing system is disclosed that includes a memory controller in a processor socket normally reserved for a processor. A plurality of non-volatile memory modules may be plugged into memory sockets normally reserved for DRAM memory modules. The non-volatile memory modules may be accessed using a data communication protocol to access the non-volatile memory modules. The memory controller controls read and write accesses to the non-volatile memory modules. The memory sockets are coupled to the processor socket by printed circuit board traces. The data communication protocol to access the non-volatile memory modules is communicated over the printed circuit board traces and through the sockets normally used to access DRAM type memory modules.
摘要翻译： 公开了一种计算系统，其包括通常为处理器预留的处理器插座中的存储器控制器。 多个非易失性存储器模块可以插入通常保留给DRAM存储器模块的存储器插槽中。 可以使用数据通信协议访问非易失性存储器模块以访问非易失性存储器模块。 存储器控制器控制对非易失性存储器模块的读取和写入访问。 存储器插座通过印刷电路板迹线耦合到处理器插座。 用于访问非易失性存储器模块的数据通信协议通过印刷电路板迹线和通常用于访问DRAM型存储器模块的插槽来传送。
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