公开(公告)号：US08498161B2

公开(公告)日：2013-07-30

申请号：US13183675

申请日：2011-07-15

申请人： Jung Hwan Lee ,  Seong Je Park

发明人： Jung Hwan Lee ,  Seong Je Park

IPC分类号： G11C11/34

CPC分类号： G11C16/26 ,  G11C7/1048 ,  G11C7/12 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/24 ,  G11C2211/5634 ,  G11C2211/5642

摘要： A read method of a nonvolatile memory device according to an exemplary embodiment of this disclosure includes precharging bit lines coupled to memory cells, performing a first read operation by supplying a first reference voltage to the memory cells in order to determine the data stored in the memory cells, precharging bit lines coupled to undetermined memory cells whose data has not been determined by the first read operation, and performing a second read operation by supplying a second reference voltage to the memory cells in order to determine data stored in the undetermined memory cells.

摘要翻译： 根据本公开的示例性实施例的非易失性存储器件的读取方法包括预先充电与存储器单元耦合的位线，通过向存储器单元提供第一参考电压来执行第一读取操作，以便确定存储在存储器中的数据 单元，预充电位线，其耦合到其数据尚未被第一读取操作确定的未确定存储单元，以及通过向存储器单元提供第二参考电压来执行第二读取操作，以便确定存储在未确定的存储器单元中的数据。

公开(公告)号：US20130033933A1

公开(公告)日：2013-02-07

申请号：US13204119

申请日：2011-08-05

申请人： Seong Je Park

发明人： Seong Je Park

IPC分类号： G11C16/10 ,  G11C16/06 ,  G11C16/04

CPC分类号： G11C16/04 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/3459 ,  G11C2211/5621

摘要： Techniques and devices relating to adjusting one or more operational parameters for memory cells are provided. One such device may include a detection unit configured to perform one or more reading operations on a set of memory cells to determine an upper bound of the threshold voltages of the set of memory cells. The device may further include a parameter adjustment unit configured to adjust one or more operational parameters for the set of memory cells based, at least in part, on the determined upper bound of the threshold voltages. Other techniques and devices are also provided.

摘要翻译： 提供了与调整存储器单元的一个或多个操作参数相关的技术和设备。 一个这样的设备可以包括被配置为对一组存储器单元执行一个或多个读取操作以确定该组存储器单元的阈值电压的上限的检测单元。 该装置还可以包括参数调整单元，其被配置为至少部分地基于所确定的阈值电压的上限来调整该组存储器单元的一个或多个操作参数。 还提供了其他技术和设备。

公开(公告)号：US08369155B2

公开(公告)日：2013-02-05

申请号：US12953235

申请日：2010-11-23

申请人： Seong Je Park

发明人： Seong Je Park

IPC分类号： G11C16/04

CPC分类号： G11C16/3459 ,  G11C16/0483 ,  G11C16/3404 ,  G11C16/3445

摘要： A method of verifying a non-volatile memory device to increase the read margin even though a negative verifying voltage is not applied is disclosed. The method of verifying a non-volatile memory device includes coupling a cell string to a bit line precharged to a high level through a sensing node, the cell string being provided between a common source line and the bit line; applying a verifying voltage to a plurality of word lines associated with the cell string; disconnecting the bit line from the sensing node; coupling the common source line to the cell string while the verifying voltage is applied to the word lines, wherein the common source line is applied with a bias voltage higher than a ground voltage; and coupling the bit line to the sensing node so as to detect a level of the bit line.

摘要翻译： 公开了即使未施加负的验证电压来验证非易失性存储器件来增加读取余量的方法。 验证非易失性存储器件的方法包括通过感测节点将单元串耦合到预充电到高电平的位线，该单元串被提供在公共源极线和位线之间; 将验证电压施加到与所述单元串相关联的多个字线; 断开位线与感测节点的连接; 将所述公共源极线耦合到所述单元串，同时将所述验证电压施加到所述字线，其中所述公共源极线施加高于接地电压的偏置电压; 并将位线耦合到感测节点，以便检测位线的电平。

公开(公告)号：US20120163092A1

公开(公告)日：2012-06-28

申请号：US13244217

申请日：2011-09-23

申请人： Min Joong Jung ,  Jung Mi Shin ,  Seong Je Park

发明人： Min Joong Jung ,  Jung Mi Shin ,  Seong Je Park

IPC分类号： G11C16/10

CPC分类号： G11C16/3454 ,  G11C16/10 ,  G11C16/3418

摘要： The program method of a nonvolatile memory device includes detecting temperature, setting a step voltage, corresponding to an increment of a program voltage in a program operation of an incremental step pulse program (ISPP) method, wherein the step voltage changes based on the detected temperature, and performing the program operation and a program verification operation based on the set step voltage.

摘要翻译： 非易失性存储器件的编程方法包括在增量步进脉冲程序（ISPP）方法的编程操作中检测对应于编程电压的增量的温度，设定阶梯电压，其中阶跃电压基于检测到的温度而改变 ，并且基于设定的步进电压执行编程操作和程序验证操作。

公开(公告)号：US08208308B2

公开(公告)日：2012-06-26

申请号：US12796209

申请日：2010-06-08

申请人： Jung Chul Han ,  Seong Je Park

发明人： Jung Chul Han ,  Seong Je Park

IPC分类号： G11C16/04

CPC分类号： G11C11/5628 ,  G11C16/0483 ,  G11C2216/14

摘要： A method of programming a nonvolatile memory device includes an initial data setting step of inputting data for program inhibition to a first latch of a page buffer to which memory cells to be programmed with a second threshold voltage distribution are coupled, a first program and verification step of performing program and verification operations, a first data setting step of, when a program pulse is supplied more than N times (where N is a natural number), inputting data for performing a program operation to the first latch of the page buffer to which the memory cells to be programmed with the second threshold voltage distribution are coupled, and a second program and verification step of performing program and verification operations.

摘要翻译： 一种对非易失性存储器件进行编程的方法包括：初始数据设置步骤，用于将用于编程禁止的数据输入到第二阈值电压分布所要编程的存储器单元的页缓冲器的第一锁存器，第一程序和验证步骤 执行程序和验证操作的第一数据设置步骤，当程序脉冲被提供多于N次（其中N是自然数）时，将用于执行编程操作的数据输入到页缓冲器的第一锁存器 将要用第二阈值电压分布编程的存储器单元耦合，以及执行程序和验证操作的第二程序和验证步骤。

公开(公告)号：US08174903B2

公开(公告)日：2012-05-08

申请号：US12790191

申请日：2010-05-28

申请人： Jung Chul Han ,  Seong Je Park

发明人： Jung Chul Han ,  Seong Je Park

IPC分类号： G11C11/34 ,  G11C16/06

CPC分类号： G11C16/3418 ,  G11C16/0483 ,  G11C16/24 ,  G11C16/3427 ,  G11C16/3454

摘要： A method of operating a nonvolatile memory device, including a memory cell array, which further includes a drain select transistor, a memory cell string, and a source select transistor coupled between a bit line and a source line, where the method includes precharging the bit line, setting the memory cell string in a ground voltage state, coupling the memory cell string and the bit line together and supplying a read voltage or a verification voltage to a selected memory cell of the memory cell string, and coupling the memory cell string and the source line together in order to change a voltage level of the bit line in response to a threshold voltage of the selected memory cell.

摘要翻译： 一种操作包括存储单元阵列的非易失性存储器件的方法，其还包括漏极选择晶体管，存储单元串和耦合在位线和源极线之间的源极选择晶体管，其中所述方法包括对所述位进行预充电 将存储单元串设置为接地电压状态，将存储单元串和位线耦合在一起，并将读取电压或验证电压提供给存储单元串的选定存储单元，并将存储单元串和 源极线一起以响应于所选存储器单元的阈值电压来改变位线的电压电平。

公开(公告)号：US07986559B2

公开(公告)日：2011-07-26

申请号：US12493446

申请日：2009-06-29

申请人： Jung Hwan Lee ,  Seong Je Park

发明人： Jung Hwan Lee ,  Seong Je Park

IPC分类号： G11C16/06

CPC分类号： G11C16/3454 ,  G11C16/3459

摘要： A method of operating a nonvolatile memory device includes performing a first program operation and a first verification operation on memory cells until a cell, having a threshold voltage higher than a first reference voltage, occurs and, when a cell having the threshold voltage higher than the first reference voltage occurs, performing a second program operation and performing a second verification operation using a second reference voltage higher than the first reference voltage.

摘要翻译： 一种非易失性存储器件的操作方法包括对存储器单元执行第一程序操作和第一验证操作，直到具有高于第一参考电压的阈值电压的单元发生，并且当阈值电压高于第 发生第一参考电压，执行第二编程操作，并使用高于第一参考电压的第二参考电压来执行第二验证操作。

公开(公告)号：US20100329020A1

公开(公告)日：2010-12-30

申请号：US12796209

申请日：2010-06-08

申请人： Jung Chul HAN ,  Seong Je Park

发明人： Jung Chul HAN ,  Seong Je Park

IPC分类号： G11C16/04 ,  G11C16/06

CPC分类号： G11C11/5628 ,  G11C16/0483 ,  G11C2216/14

摘要： A method of programming a nonvolatile memory device includes an initial data setting step of inputting data for program inhibition to a first latch of a page buffer to which memory cells to be programmed with a second threshold voltage distribution are coupled, a first program and verification step of performing program and verification operations, a first data setting step of, when a program pulse is supplied more than N times (where N is a natural number), inputting data for performing a program operation to the first latch of the page buffer to which the memory cells to be programmed with the second threshold voltage distribution are coupled, and a second program and verification step of performing program and verification operations.

摘要翻译： 一种对非易失性存储器件进行编程的方法包括：初始数据设置步骤，用于将用于编程禁止的数据输入到第二阈值电压分布所要编程的存储器单元的页缓冲器的第一锁存器，第一程序和验证步骤 执行程序和验证操作的第一数据设置步骤，当程序脉冲被提供多于N次（其中N是自然数）时，将用于执行编程操作的数据输入到页缓冲器的第一锁存器 将要用第二阈值电压分布编程的存储器单元耦合，以及执行程序和验证操作的第二程序和验证步骤。

公开(公告)号：US07839692B2

公开(公告)日：2010-11-23

申请号：US11965999

申请日：2007-12-28

申请人： Seong Je Park

发明人： Seong Je Park

IPC分类号： G11C16/04

CPC分类号： G11C16/3404 ,  G11C16/0483

摘要： A soft program method in a non-volatile memory device for performing a soft program step so as to improve threshold voltage distribution of an erased cell is disclosed. The soft program method in a non-volatile memory device includes performing a soft program for increasing threshold voltages of memory cells by a given level, wherein an erase operation is performed about the memory cells, performing a verifying operation for verifying whether or not a cell programmed to a voltage more than a verifying voltage is existed in each of cell strings, and performing repeatedly the soft program until it is verified that whole cell strings have one or more cell programmed to the voltage more than the verifying voltage.

摘要翻译： 公开了一种用于执行软编程步骤以改善已擦除单元的阈值电压分布的非易失性存储器件中的软编程方法。 非易失性存储器件中的软编程方法包括执行用于将存储器单元的阈值电压提高给定电平的软程序，其中对存储器单元执行擦除操作，执行验证操作以验证单元 被编程为在每个单元串中存在大于验证电压的电压，并且重复执行软程序，直到验证整个单元串具有被编程为多于验证电压的电压的一个或多个单元串。

公开(公告)号：US09037929B2

公开(公告)日：2015-05-19

申请号：US13225621

申请日：2011-09-06

申请人： Jung Hwan Lee ,  Seong Je Park

发明人： Jung Hwan Lee ,  Seong Je Park

IPC分类号： G11C29/00 ,  G11C16/34 ,  G11C16/10 ,  G06F11/10 ,  G11C16/04

CPC分类号： G11C16/3459 ,  G06F11/1048 ,  G11C16/0483 ,  G11C16/10

摘要： A method of operating a semiconductor memory device according to an aspect of the present disclosure includes performing a program loop, including a program operation and a program verification operation, in order to store input data in selected memory cells, performing a first error bit check operation for comparing the number of error bits of data not identical with the input data, with the number of correctable error bits, if the number of error bits is equal to or smaller than the number of correctable error bits, performing a second error bit check operation for comparing the number of error bits with the reference number of bits for replacement determination, and if the number of error bits is greater than the reference number of bits for replacement determination, updating failed column address information by adding the column address of a memory cell, having the error bits, to the failed column address information.

摘要翻译： 根据本公开的一个方面的操作半导体存储器件的方法包括执行包括程序操作和程序验证操作的程序循环，以便将输入数据存储在所选择的存储器单元中，执行第一错误位检查操作 用于将与输入数据不同的数据的错误位的数量与可校正错误位的数量进行比较，如果错误位的数量等于或小于可校正错误位的数量，则执行第二错误位检查操作 用于将错误位数与用于替换确定的参考比特数进行比较，并且如果错误位的数量大于用于替换确定的参考比特数，则通过将存储器单元的列地址相加来更新故障列地址信息 具有错误位，失败的列地址信息。