公开(公告)号：US20110127633A1

公开(公告)日：2011-06-02

申请号：US12955011

申请日：2010-11-29

Applicant: Mary Nadeau ,  Vipulkumar Patel ,  Prakash Gothoskar ,  John Fangman ,  John Matthew Fangman ,  Mark Webster

Inventor： Mary Nadeau ,  Vipulkumar Patel ,  Prakash Gothoskar ,  John Fangman ,  John Matthew Fangman ,  Mark Webster

IPC: H01L27/12 ,  B32B3/30 ,  H01L27/04

CPC classification number: G02B7/025 ,  G02B6/4228 ,  G02B6/4239 ,  G02B7/003 ,  H01L23/345 ,  H01L23/544 ,  H01L24/29 ,  H01L24/32 ,  H01L24/83 ,  H01L2223/54426 ,  H01L2224/26175 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/83121 ,  H01L2224/83143 ,  H01L2224/83192 ,  H01L2224/83234 ,  H01L2224/83385 ,  H01L2224/83862 ,  H01L2924/14 ,  Y10T428/24479 ,  H01L2924/0665 ,  H01L2924/00014 ,  H01L2924/00

Abstract: An arrangement for improving adhesive attachment of micro-components in an assembly utilizes a plurality of parallel-disposed slots formed in the top surface of the substrate used to support the micro-components. The slots are used to control the flow and “shape” of an adhesive “dot” so as to quickly and accurately attach a micro-component to the surface of a substrate. The slots are formed (preferably, etched) in the surface of the substrate in a manner that lends itself to reproducible accuracy from one substrate to another. Other slots (“channels”) may be formed in conjunction with the bonding slots so that extraneous adhesive material will flow into these channels and not spread into unwanted areas.

Abstract translation: 用于改善组件中微组件的粘合附着的装置利用形成在用于支撑微组件的衬底顶表面中的多个平行布置的槽。 这些槽用于控制粘合剂“点”的流动和“形状”，以便将微组件快速且精确地附着在基板的表面上。 在衬底的表面中形成（优选地，蚀刻）狭槽，使其自身具有从一个衬底到另一个衬底的可再现精度。 其它槽（“通道”）可以与结合槽结合形成，使得外来粘合剂材料将流入这些通道并且不会扩散到不需要的区域。

公开(公告)号：US07701985B2

公开(公告)日：2010-04-20

申请号：US12291246

申请日：2008-11-06

Applicant: Mark Webster ,  David Piede ,  Prakash Gothoskar

Inventor： Mark Webster ,  David Piede ,  Prakash Gothoskar

IPC: H01S3/10 ,  H01S3/13

CPC classification number: H01S5/141 ,  H01S5/021 ,  H01S5/02248 ,  H01S5/02268 ,  H01S5/06256

Abstract: A silicon-on-insulator (SOI)-based tunable laser is formed to include the gain medium (such as a semiconductor optical amplifier) disposed within a cavity formed within the SOI substrate. A tunable wavelength reflecting element and associated phase matching element are formed on the surface of the SOI structure, with optical waveguides formed in the surface SOI layer providing the communication between these components. The tunable wavelength element is controlled to adjust the optical wavelength. Separate discrete lensing elements may be disposed in the cavity with the gain medium, providing efficient coupling of the optical signal into the SOI waveguides. Alternatively, the gain medium itself may be formed to include spot converting tapers on its endfaces, the tapers used to provide mode matching into the associated optical waveguides.

Abstract translation: 形成绝缘体上硅（SOI）的可调谐激光器以包括设置在形成于SOI衬底内的空腔内的增益介质（例如半导体光放大器）。 在SOI结构的表面上形成可调波长反射元件和相关的相位匹配元件，其中形成在表面SOI层中的光波导提供这些部件之间的连通。 可调波长元件被控制以调节光学波长。 单独的离散透镜元件可以用增益介质设置在空腔中，从而提供光信号到SOI波导的有效耦合。 或者，增益介质本身可以被形成为包括其端面上的点变换锥度，用于向相关联的光波导提供模式匹配的锥度。

公开(公告)号：US20090162013A1

公开(公告)日：2009-06-25

申请号：US12316540

申请日：2008-12-11

Applicant: Mark Webster ,  Vipulkumar Patel ,  Mary Nadeau ,  Prakash Gothoskar ,  David Piede

Inventor： Mark Webster ,  Vipulkumar Patel ,  Mary Nadeau ,  Prakash Gothoskar ,  David Piede

IPC: G02B6/42

CPC classification number: G02B6/32 ,  G02B6/305 ,  G02B6/327

Abstract: A plasma-based etching process is used to specifically shape the endface of an optical substrate supporting an optical waveguide into a contoured facet which will improve coupling efficiency between the waveguide and a free space optical signal. The ability to use standard photolithographic techniques to pattern and etch the optical endface facet allows for virtually any desired facet geometry to be formed—and replicated across the surface of a wafer for the entire group of assemblies being fabricated. A lens may be etched into the endface using a properly-defined photolithographic mask, with the focal point of the lens selected with respect to the parameters of the optical waveguide and the propagating free space signal. Alternatively, an angled facet may be formed along the endface, with the angle sufficient to re-direct reflected/scattered signals away from the optical axis.

Abstract translation: 使用基于等离子体的蚀刻工艺来将支撑光波导的光学基板的端面特别地成形为轮廓刻面，这将提高波导与自由空间光信号之间的耦合效率。 使用标准光刻技术对光学端面小平面进行图案化和刻蚀的能力允许形成任何所需的刻面几何形状，并跨越制造的整组组件在晶片的表面上复制。 可以使用适当限定的光刻掩模将透镜蚀刻到端面中，相对于光波导的参数和传播的自由空间信号选择透镜的焦点。 或者，可以沿着端面形成成角度的小面，其角度足以将反射/散射信号重新引导远离光轴。

公开(公告)号：US20090065682A1

公开(公告)日：2009-03-12

申请号：US12228619

申请日：2008-08-13

Applicant: Mark Webster

Inventor： Mark Webster

IPC: G01J1/42 ,  G02B6/26

CPC classification number: G02B6/1228 ,  G02B6/136

Abstract: An arrangement for providing alignment between an optical nanotaper coupler and a free space optical signal includes the formation of a “ridge” structure around the location of the nanotaper coupler to reduce stray light-related errors in the alignment process. The ridge is preferably formed by etching vertical sidewalls through the inter-level dielectric (ILD) and buried oxide (BOX) layers of the SOI structure. When an optical source (such as an illuminated fiber, laser, etc.) is scanned across this etched arrangement, the signal received by an associated photodetector registers an increase at the boundary between the etched region and the vertical sidewall of the ridge, thus defining the bounds within which the nanotaper coupler is located. Since the dimensions of the ridge are known and controlled by the etching process, the location of the nanotaper coupler tip along the endface of the ridge can be determined from this scan.

Abstract translation: 用于在光学纳米锥耦合器和自由空间光信号之间提供对准的装置包括在纳米锥耦合器的位置周围形成“脊”结构，以减少对准过程中的杂散光相关误差。 优选地，通过蚀刻通过SOI结构的层间电介质（ILD）和掩埋氧化物（BOX）层的垂直侧壁来形成脊。 当光源（如照明光纤，激光等）在该蚀刻装置上扫描时，由相关联的光电探测器接收的信号记录在蚀刻区域和脊的垂直侧壁之间的边界处的增加，从而限定 纳米锥耦合器所在的界限。 由于脊的尺寸是已知的并且通过蚀刻处理来控制，所以可以从该扫描确定纳米锥联接器尖端沿着脊的端面的位置。

公开(公告)号：US20060058022A1

公开(公告)日：2006-03-16

申请号：US11215563

申请日：2005-08-29

Applicant: Mark Webster ,  Daniel Shearer ,  Steven Halford ,  Bruce Cochran

Inventor： Mark Webster ,  Daniel Shearer ,  Steven Halford ,  Bruce Cochran

IPC: H04B17/00 ,  H04Q7/20

CPC classification number: H04B7/0619 ,  H01Q3/267 ,  H04B7/0617 ,  H04B17/21 ,  H04W84/12

Abstract: Disclosed herein are various embodiments of methods, systems, and apparatuses for sending and receiving signals in a digital communication system. In one embodiment performs steps of transmitting a signal from a device with a first antenna array and calibrating the signal with a phase shift of the signal. In one exemplary method embodiment, a signal is transmitted from a beam-forming transmitter to an assisting receiver in an IEEE 802.11 wireless transmission. A return calibration signal from the assisting receiver with information regarding the phase error of signal is received by the beam-forming transceiver. The beam-forming transmitter introduces a calibration phase error to cancel the phase error as reported by the assisting receiver.

Abstract translation: 这里公开了用于在数字通信系统中发送和接收信号的方法，系统和装置的各种实施例。 在一个实施例中，执行从具有第一天线阵列的设备发射信号并用该信号的相移来校准信号的步骤。 在一个示例性方法实施例中，在IEEE 802.11无线传输中将信号从波束形成发射机发射到辅助接收机。 由波束形成收发器接收来自辅助接收机的具有关于信号的相位误差的信息的返回校准信号。 波束形成发射机引入校准相位误差以消除由辅助接收机报告的相位误差。

公开(公告)号：US20060002361A1

公开(公告)日：2006-01-05

申请号：US11186260

申请日：2005-07-21

Applicant: Mark Webster ,  Michael Seals

Inventor： Mark Webster ,  Michael Seals

IPC: H04J1/00

CPC classification number: H04L25/0204 ,  H04B7/02 ,  H04B7/0413 ,  H04B7/0697 ,  H04L5/0023 ,  H04L5/0048 ,  H04L25/0226 ,  H04L25/0244 ,  H04L27/2607 ,  H04L27/2613 ,  H04W24/00

Abstract: Various packet processing systems and methods are disclosed. One method embodiment, among others, comprises providing a legacy long training symbol (LTS), and inserting subcarriers in the legacy LTS to form an extended LTS (ELTS).

Abstract translation: 公开了各种分组处理系统和方法。 一个方法实施例，其中包括提供遗留长训练符号（LTS），以及在传统LTS中插入子载波以形成扩展LTS（ELTS）。

公开(公告)号：US09598242B2

公开(公告)日：2017-03-21

申请号：US14606312

申请日：2015-01-27

Applicant: Mark Webster ,  David Konopacki ,  Michael Reilly

Inventor： Mark Webster ,  David Konopacki ,  Michael Reilly

IPC: B65G35/06 ,  B65G37/02

CPC classification number: B65G37/02 ,  B65G35/06

Abstract: A moving floor system that includes a moving work surface to move work products from an upstream end to a downstream end. The moving work surface is formed from a plurality of individual carts joined to each other. The stack of carts is moved along upper support rails located at an upper level. When each individual cart reaches the downstream end, a downstream lift conveyor moves the individual cart from the upper level to a lower level. When at the lower level, each individual cart is returned from the downstream end to the upstream end. When each individual cart reaches the upstream end, an upstream lift conveyor returns the individual carts from the lower level to the upper level. An upper drive mechanism provides the motive force to move the stack of carts along the upper level at the working speed.

公开(公告)号：US08520984B2

公开(公告)日：2013-08-27

申请号：US12781471

申请日：2010-05-17

Applicant: Mark Webster ,  Russell Romano ,  Kalpendu Shastri

Inventor： Mark Webster ,  Russell Romano ,  Kalpendu Shastri

IPC: G02F1/035

CPC classification number: G02F1/2257 ,  G02F2203/20 ,  G02F2203/25

Abstract: A silicon-based optical modulator exhibiting improved modulation efficiency and control of “chirp” (i.e., time-varying optical phase) is provided by separately biasing a selected, first region of the modulating device (e.g., the polysilicon region, defined as the common node). In particular, the common node is biased to shift the voltage swing of the silicon-based optical modulator into its accumulation region, which exhibits a larger change in phase as a function of applied voltage (larger OMA) and improved extinction ratio. The response in the accumulation region is also relatively linear, allowing for the chirp to be more easily controlled. The electrical modulation input signal (and its inverse) are applied as separate inputs to the second region (e.g., the SOI region) of each arm of the modulator.

Abstract translation: 通过分别偏置调制装置的选定的第一区域（例如，定义为共同的多晶硅区域）来提供显示出改善的调制效率和“啁啾”（即，时变光学相位）的控制的硅基光学调制器 节点）。 特别地，公共节点被偏置以将硅基光调制器的电压摆幅移动到其累积区域中，其随着施加电压（较大的OMA）和改善的消光比而呈现较大的相位变化。 积聚区域中的响应也是相对线性的，从而可以更容易地控制啁啾声。 电调制输入信号（及其反相）作为分离的输入施加到调制器的每个臂的第二区域（例如，SOI区域）。

公开(公告)号：US20120279806A1

公开(公告)日：2012-11-08

申请号：US13464373

申请日：2012-05-04

Applicant: Mark Webster

Inventor： Mark Webster

IPC: B66B5/02

CPC classification number: B66B1/06

Abstract: A method and system for controlling the operation of a drive motor for a vertical reciprocating conveyor. The method initially activates a drive motor to move a carriage from a resting position. After initial start-up period, the method sets a threshold current value as the present current value being drawn by the drive motor. The method compares subsequent present current value measurements to the threshold current value and determines whether the present current value exceeds or falls below the threshold current value by more than an operating limit. If the present current value falls within the operating limits, the threshold current value is updated to the present current value on a periodic basis. In this manner, the method continuously updates the threshold current value to compensate for an increase in the weight being lifted by the vertical reciprocating conveyor.

Abstract translation: 一种用于控制用于垂直往复式输送机的驱动马达的操作的方法和系统。 该方法最初激活驱动马达以使托架从静止位置移动。 在初始启动时间之后，该方法将阈值电流值设置为由驱动电动机画出的当前值。 该方法将随后的当前值测量值与阈值电流值进行比较，并确定当前电流值是否超过或低于阈值电流值超过操作极限。 如果当前电流值落在运行极限内，则周期性地将阈值电流值更新为当前电流值。 以这种方式，该方法不断更新阈值电流值以补偿由垂直往复式输送机提升的重量的增加。

公开(公告)号：US08031991B2

公开(公告)日：2011-10-04

申请号：US12454963

申请日：2009-05-27

Applicant: Mark Webster ,  Vipulkumar Patel

Inventor： Mark Webster ,  Vipulkumar Patel

IPC: G02B6/26 ,  G02B6/42

CPC classification number: G02B6/1228

Abstract: An optical coupler is formed of a low index material and exhibits a mode field diameter suitable to provide efficient coupling between a free space optical signal (of large mode field diameter) and a single mode high index waveguide formed on an optical substrate. One embodiment comprises an antiresonant reflecting optical waveguide (ARROW) structure in conjunction with an embedded (high index) nanotaper coupling waveguide. Another embodiment utilizes a low index waveguide structure disposed in an overlapped arrangement with a high index nanotaper coupling waveguide. The low index waveguide itself includes a tapered region that overlies the nanotaper coupling waveguide to facilitate the transfer of the optical energy from the low index waveguide into an associated single mode high index waveguide. Methods of forming these devices using CMOS processes are also disclosed.

Abstract translation: 光耦合器由低折射率材料形成，并且具有适于提供在大尺寸场直径的自由空间光信号和形成在光学基片上的单模高折射率波导之间的有效耦合的模场直径。 一个实施例包括结合嵌入式（高折射率）纳米锥耦合波导的反谐振反射光波导（ARROW）结构。 另一实施例利用与高折射率纳米锥耦合波导重叠布置设置的低折射率波导结构。 低折射率波导本身包括覆盖在纳米锥耦合波导上的锥形区域，以便将光能量从低折射率波导传输到相关联的单模高折射率波导中。 还公开了使用CMOS工艺形成这些器件的方法。