公开(公告)号：US20110021394A1

公开(公告)日：2011-01-27

申请号：US12933805

申请日：2009-03-12

申请人： Hajime Nakao ,  Shozaburo Konishi ,  Toshio Yoshida

发明人： Hajime Nakao ,  Shozaburo Konishi ,  Toshio Yoshida

IPC分类号： C10M169/04

CPC分类号： C10M137/04 ,  C10M137/08 ,  C10M141/10 ,  C10M169/04 ,  C10M2203/1025 ,  C10M2215/04 ,  C10M2223/04 ,  C10M2223/043 ,  C10N2220/025 ,  C10N2230/02 ,  C10N2230/43 ,  C10N2240/40

摘要： A lubricating oil composition comprising a lubricating base oil, and a mixture and/or a reaction product of (A) 0.01-0.5% by mass of at least one compound selected from among acid phosphates represented by formula (1) or formula (2), and (B) 0.01-2% by mass of an alkylamine represented by formula (3), based on the total weight of the composition, wherein the acid value due to component (A) is 0.1-1.0 mgKOH/g. [R1 and R2 represent hydrogen or straight-chain alkyl or straight-chain alkenyl groups, with at least one of R1 and R2 being a C6-12 straight-chain alkyl or straight-chain alkenyl group; R3 and R4 represent hydrogen straight-chain alkyl or straight-chain alkenyl groups, with at least one of R3 and R4 being a C13-18 straight-chain alkyl or straight-chain alkenyl group; and R5 and R6 represent hydrogen or C4-30 branched-chain alkyl groups, with at least one of R5 and R6 being a branched-chain alkyl group.]

摘要翻译： 一种润滑油组合物，其含有（A）0.01-0.5质量％的至少一种选自式（1）或式（2）表示的酸式磷酸酯的化合物的混合物和/或反应产物， ，（B）0.01-2质量％的由式（3）表示的烷基胺，基于组合物的总重量，其中由组分（A）引起的酸值为0.1-1.0mgKOH / g。 [R 1和R 2表示氢或直链烷基或直链烯基，其中R 1和R 2中的至少一个是C 6-12直链烷基或直链烯基; R3和R4代表氢直链烷基或直链烯基，其中R3和R4中的至少一个是C13-18直链烷基或直链烯基; 并且R 5和R 6表示氢或C 4-30支链烷基，其中R 5和R 6中的至少一个是支链烷基。

公开(公告)号：US20100332802A1

公开(公告)日：2010-12-30

申请号：US12801868

申请日：2010-06-29

申请人： Atsushi Fusejima ,  Yasunobu Akizuki ,  Toshio Yoshida

发明人： Atsushi Fusejima ,  Yasunobu Akizuki ,  Toshio Yoshida

IPC分类号： G06F9/30

CPC分类号： G06F9/3836 ,  G06F9/3001 ,  G06F9/3885 ,  G06F9/3891

摘要： A priority circuit is connected to a reservation station and a plurality of arithmetic units that processes different operations and dispatches, when it is determined that an executable flag indicating that an instruction can be executed by only a specific arithmetic unit is on, an instruction to an arithmetic unit that is different from the specific arithmetic unit and of which a queue is vacant in accordance with the input performed by an instruction decoder and the reservation station.

摘要翻译： 优先电路连接到保留站和处理不同的操作和调度的多个算术单元，当确定指示只能由特定算术单元执行指令的可执行标志被打开时，指令 算术单元，其与特定运算单元不同，并且根据由指令解码器和保留站执行的输入，其队列空闲。

公开(公告)号：US20100325396A1

公开(公告)日：2010-12-23

申请号：US12805630

申请日：2010-08-10

申请人： Toshio Yoshida

发明人： Toshio Yoshida

IPC分类号： G06F9/302

CPC分类号： G06F9/3851 ,  G06F9/30127

摘要： The present invention relates to a multithread processor, and this multithread processor comprises a plurality of register windows each provided for each of threads and capable of storing data to be used for instruction processing in an arithmetic unit, a work register capable of mutually transferring data with respect to the plurality of register windows and the arithmetic unit and a multithread control unit for controlling data transfer among the plurality of register windows, the work register and the arithmetic unit on the basis of an execution thread identifier for identifying the thread to be executed in the arithmetic unit. This enables conducting the multithread processing at a high speed.

公开(公告)号：US07805594B2

公开(公告)日：2010-09-28

申请号：US10986142

申请日：2004-11-12

申请人： Toshio Yoshida

发明人： Toshio Yoshida

IPC分类号： G06F9/34 ,  G06F9/38 ,  G06F9/46

CPC分类号： G06F9/3851 ,  G06F9/30127

摘要： The present invention relates to a multithread processor, and this multithread processor comprises a plurality of register windows each provided for each of threads and capable of storing data to be used for instruction processing in an arithmetic unit, a work register capable of mutually transferring data with respect to the plurality of register windows and the arithmetic unit and a multithread control unit for controlling data transfer among the plurality of register windows, the work register and the arithmetic unit on the basis of an execution thread identifier for identifying the thread to be executed in the arithmetic unit. This enables conducting the multithread processing at a high speed.

摘要翻译： 多线程处理器本发明涉及一种多线程处理器，该多线程处理器包括多个寄存器窗口，每个寄存器窗口分别为每个线程提供，并能够存储用于在算术单元中进行指令处理的数据，能够与 涉及多个寄存器窗口和算术单元;以及多线程控制单元，用于基于用于识别要执行的线程的执行线程标识符来控制多个寄存器窗口，工作寄存器和运算单元之间的数据传送 算术单元。 这使得能够高速进行多线程处理。

公开(公告)号：US20100215545A1

公开(公告)日：2010-08-26

申请号：US11849511

申请日：2007-09-04

申请人： Toshio Yoshida ,  Kenichi Tayama ,  Michio Taira ,  Tomoyasu Nagata ,  Kiyohide Maguchi

发明人： Toshio Yoshida ,  Kenichi Tayama ,  Michio Taira ,  Tomoyasu Nagata ,  Kiyohide Maguchi

IPC分类号： G01N21/00

CPC分类号： G01N21/45 ,  G01N21/78 ,  G01N2021/7773 ,  G01N2201/08

摘要： A fiber switching mechanism of a lighting system for passing a light through one of n optical fibers corresponding to n channels sequentially is provided midway in n optical fibers of the lighting system corresponding to n channels such that lights from n optical fibers of a receiving system can be commonly received by a single spectroscope. With the fiber switching mechanism of the lighting system, it is possible to obtain measuring data of reflection spectrum of n optical thin film sensor portions by the single spectroscope.

摘要翻译： 在对应于n个通道的照明系统的n个光纤中间设置用于将光通过顺序地对应于n个通道的n个光纤中的一个的照明系统的光纤切换机构，使得来自接收系统的n个光纤的光可以 通常由单个分光镜接收。 利用照明系统的光纤切换机构，可以通过单个分光镜获得n个光学薄膜传感器部分的反射光谱的测量数据。

公开(公告)号：US20100095304A1

公开(公告)日：2010-04-15

申请号：US12635801

申请日：2009-12-11

申请人： Takashi SUZUKI ,  Toshio Yoshida

发明人： Takashi SUZUKI ,  Toshio Yoshida

IPC分类号： G06F9/46

CPC分类号： G06F9/3851

摘要： The information processing device in the simultaneous multi-threading system is operated in an inter-thread performance load arbitration control method, and includes: an instruction input control unit for sharing among threads control of inputting an instruction in an arithmetic unit for acquiring the instruction from memory and performing an operation on the basis of the instruction; a commit stack entry provided for each thread for holding information obtained by decoding the instruction; an instruction completion order control unit for updating the memory and a general purpose register depending on an arithmetic result obtained by the arithmetic unit in an order of the instructions input from the instruction input control unit; and a performance load balance analysis unit for detecting the information registered in the commit stack entry and controlling the instruction input control unit.

摘要翻译： 同时多线程系统中的信息处理装置以线程间性能负载仲裁控制方式进行操作，包括：指令输入控制单元，用于在线程之间共享输入用于获取指令的算术单元中的指令的控制 存储器并基于该指令执行操作; 为每个线程提供的用于保存通过解码指令而获得的信息的提交栈条目; 指令完成顺序控制单元，用于根据从指令输入控制单元输入的指令的顺序，根据运算单元获得的运算结果来更新存储器和通用寄存器; 以及性能负载平衡分析单元，用于检测在提交堆栈条目中登记的信息并控制指令输入控制单元。

公开(公告)号：US20100095092A1

公开(公告)日：2010-04-15

申请号：US12591994

申请日：2009-12-07

申请人： Yasunobu Akizuki ,  Toshio Yoshida

发明人： Yasunobu Akizuki ,  Toshio Yoshida

IPC分类号： G06F9/30

CPC分类号： G06F9/3851 ,  G06F9/3836

摘要： An instruction execution control device operates a plurality of threads in a simultaneous multi-thread system. And the instruction execution control device has a thread selection circuit (30) which detects a state where an instruction has not been completed for a predetermined period during simultaneous multi-thread operation, and controls such that all the reservation stations (5, 6 and 7) can execute only a predetermined thread. Therefore if an entry that cannot be executed from the reservation stations (5, 6 and 7) exists, execution of an entry in the thread that cannot be executed can be enabled by stopping the execution of the thread which has been executed continuously.

摘要翻译： 指令执行控制装置在同时多线程系统中操作多个线程。 并且，指令执行控制装置具有线程选择电路（30），该线程选择电路（30）在同时进行多线程动作的同时检测指定尚未完成预定期间的状态，并且进行控制使得所有保留站（5,6,7） ）只能执行预定的线程。 因此，如果存在不能从保留站（5,6）和7中执行的条目，则可以通过停止执行连续执行的线程来执行线程中不能执行的条目。

公开(公告)号：US20090172367A1

公开(公告)日：2009-07-02

申请号：US12338245

申请日：2008-12-18

申请人： Toshio Yoshida ,  Mikio Hondou

发明人： Toshio Yoshida ,  Mikio Hondou

IPC分类号： G06F9/30

CPC分类号： G06F9/30181 ,  G06F9/30101

摘要： A processing unit has an extended register to which instruction extension information indicating an extension of an instruction can be set. An operation unit that, when instruction extension information is set to the extended register, executes a subsequent instruction following a first instruction for writing the instruction extension information into the extended register, extends the subsequent instruction based on the instruction extension information.

摘要翻译： 处理单元具有扩展寄存器，可以设置指示扩展指令的指令扩展信息。 一种操作单元，当指令扩展信息被设置为扩展寄存器时，执行将指令扩展信息写入扩展寄存器的第一指令之后的后续指令，根据指令扩展信息来扩展后续指令。

公开(公告)号：US20060029305A1

公开(公告)日：2006-02-09

申请号：US11080679

申请日：2005-03-16

申请人： Masaru Akiyama ,  Nobuhide Kurachi ,  Jun Matsumoto ,  Toshio Yoshida

发明人： Masaru Akiyama ,  Nobuhide Kurachi ,  Jun Matsumoto ,  Toshio Yoshida

IPC分类号： F16C29/06

CPC分类号： F16C29/065

摘要： A slider has a slider main body which has a circulation sleeve whose inner portion forms a rolling element passage by being inserted into a hole penetrating in an axial direction, an end cap which has an outer peripheral track face of a direction changing passage in a curved shape for communicating a load track between two rolling element rolling grooves and the rolling element passage, and is fixed to an axial end portion of the slider main body, and an inner peripheral track member which has an inner peripheral track face of the direction changing passage, and is fitted to the end cap. An end portion of the circulation sleeve is provided with a plurality of positioning projected portions, and the end cap and the inner peripheral track member are provided with recess portions fitted with the positioning projected portions.

公开(公告)号：US06523701B1

公开(公告)日：2003-02-25

申请号：US09655872

申请日：2000-09-06

申请人： Toshio Yoshida ,  Yuji Amano ,  Taimi Oketani ,  Masayuki Tsuji ,  Isao Saraoka

发明人： Toshio Yoshida ,  Yuji Amano ,  Taimi Oketani ,  Masayuki Tsuji ,  Isao Saraoka

IPC分类号： A47G1908

CPC分类号： H01L21/6734 ,  H01L21/67343

摘要： A cassette for supporting substrates and an elongated rib therefor is described and represents a further improvement in the previously proposed elongated rib systems of the prior art and is designed particularly to preclude deflection and dampen vibrations of loaded substrates. The elongated ribs for the cassette project from side panels utilizing an elongated rib structure including three segments; namely, a base resin body, a bar-like intermediate resin body extending from the base resin body, and a terminal resin body disposed at the forward end of the intermediate resin body. Preferably, the elongated rib structure includes a linearreinforcing member inserted fromthe base resin body to the intermediate resin body or, alternatively, from the base resin body through the intermediate resin body to the terminal resin body.

摘要翻译： 描述了用于支撑基板的盒和用于其的细长肋，并且表示了先前提出的现有技术的细长肋系统的进一步改进，并且被特别设计用于防止加载的基板的偏转和阻尼振动。 用于盒的细长肋条利用包括三个段的细长肋结构从侧板突出; 即基体树脂体，从基体树脂体延伸的棒状中间树脂体，以及设置在中间树脂体的前端的端子树脂体。 优选地，细长肋结构包括从基体树脂体向中间树脂体插入的线性增强部件，或者从基体树脂体通过中间树脂体向端子树脂体插入。