公开(公告)号：US11334362B2

公开(公告)日：2022-05-17

申请号：US17027431

申请日：2020-09-21

Applicant: Micron Technology, Inc.

Inventor： Kyle B. Wheeler ,  Richard C. Murphy ,  Troy A. Manning ,  Dean A. Klein

IPC: G06F9/38 ,  G06F15/78 ,  G11C7/06 ,  G11C7/10 ,  G11C11/408 ,  G11C11/4096

Abstract: Examples of the present disclosure provide apparatuses and methods related to generating and executing a control flow. An example apparatus can include a first device configured to generate control flow instructions, and a second device including an array of memory cells, an execution unit to execute the control flow instructions, and a controller configured to control an execution of the control flow instructions on data stored in the array.

公开(公告)号：US20210065778A1

公开(公告)日：2021-03-04

申请号：US17098160

申请日：2020-11-13

Applicant: Micron Technology, Inc.

Inventor： Kyle B. Wheeler ,  Troy A. Manning ,  Richard C. Murphy

IPC: G11C11/4091 ,  G11C7/06 ,  G11C7/10 ,  G11C11/4076 ,  G11C11/4093 ,  G11C11/408 ,  G11C11/4096

Abstract: One example of the present disclosure includes performing a comparison operation in memory using a logical representation of a first value stored in a first portion of a number of memory cells coupled to a sense line of a memory array and a logical representation of a second value stored in a second portion of the number of memory cells coupled to the sense line of the memory array. The comparison operation compares the first value to the second value, and the method can include storing a logical representation of a result of the comparison operation in a third portion of the number of memory cells coupled to the sense line of the memory array.

公开(公告)号：US20210020207A1

公开(公告)日：2021-01-21

申请号：US17063495

申请日：2020-10-05

Applicant: Micron Technology, Inc.

Inventor： Perry V. Lea ,  Troy A. Manning

IPC: G11C7/10 ,  H03K19/173 ,  G06F13/12 ,  G11C11/408 ,  G11C8/12 ,  G11C11/4096

Abstract: The present disclosure includes apparatuses and methods for bank to bank data transfer. An example apparatus includes a plurality of banks of memory cells, an internal bus configured to transfer data between the plurality of banks and an external bus interface, and a bank-to-bank transfer bus configured to transfer data between the plurality of banks.

公开(公告)号：US10734038B2

公开(公告)日：2020-08-04

申请号：US16277472

申请日：2019-02-15

Applicant: Micron Technology, Inc.

Inventor： Glen E. Hush ,  Troy A. Manning

IPC: G11C7/00 ,  G11C7/10 ,  G11C11/4091 ,  G11C11/4093 ,  G11C11/16 ,  G11C7/06

Abstract: The present disclosure includes apparatuses and methods related to performing logical operations using sensing circuitry. An example apparatus comprises an array of memory cells and sensing circuitry coupled to the array. The sensing circuitry includes a sense amplifier coupled to a pair of complementary sense lines, and a compute component coupled to the sense amplifier. The compute component includes a dynamic latch. The sensing circuitry is configured to perform a logical operation and initially store the result in the sense amplifier.

公开(公告)号：US10664345B2

公开(公告)日：2020-05-26

申请号：US16050585

申请日：2018-07-31

Applicant: Micron Technology, Inc.

Inventor： Troy A. Manning ,  Troy D. Larsen ,  Martin L. Culley

IPC: G06F11/10 ,  G06F3/06 ,  G11C29/52 ,  G06F8/41

Abstract: The present disclosure includes apparatuses and methods for physical page, logical page, and codeword correspondence. A number of methods include error coding a number of logical pages of data as a number of codewords and writing the number of codewords to a number of physical pages of memory. The number of logical pages of data can be different than the number of physical pages of memory.

公开(公告)号：US20200082871A1

公开(公告)日：2020-03-12

申请号：US16681523

申请日：2019-11-12

Applicant: Micron Technology, Inc.

Inventor： Kyle B. Wheeler ,  Troy A. Manning ,  Richard C. Murphy

IPC: G11C11/4091 ,  G11C11/4096 ,  G11C11/408 ,  G11C11/4093 ,  G11C7/10 ,  G11C7/06 ,  G11C11/4076

Abstract: One example of the present disclosure includes performing a comparison operation in memory using a logical representation of a first value stored in a first portion of a number of memory cells coupled to a sense line of a memory array and a logical representation of a second value stored in a second portion of the number of memory cells coupled to the sense line of the memory array. The comparison operation compares the first value to the second value, and the method can include storing a logical representation of a result of the comparison operation in a third portion of the number of memory cells coupled to the sense line of the memory array.

公开(公告)号：US10304519B2

公开(公告)日：2019-05-28

申请号：US15256066

申请日：2016-09-02

Applicant: Micron Technology, Inc.

Inventor： Troy A. Manning

IPC: G11C11/4091 ,  G11C29/42 ,  G11C7/06 ,  G11C7/10 ,  G11C11/4093 ,  G11C11/408 ,  G11C11/4096

Abstract: The present disclosure includes apparatuses and methods related to determining an XOR value in memory. An example method can include performing a NAND operation on a data value stored in a first memory cell and a data value stored in a second memory cell. The method can include performing an OR operation on the data values stored in the first and second memory cells. The method can include performing an AND operation on the result of the NAND operation and a result of the OR operation without transferring data from the memory array via an input/output (I/O) line.

公开(公告)号：US10236038B2

公开(公告)日：2019-03-19

申请号：US15595171

申请日：2017-05-15

Applicant: Micron Technology, Inc.

Inventor： Perry V. Lea ,  Troy A. Manning

IPC: G11C8/00 ,  G11C7/10 ,  H03K19/173 ,  G06F13/12 ,  G06F12/02 ,  G06F3/06

Abstract: The present disclosure includes apparatuses and methods for bank to bank data transfer. An example apparatus includes a plurality of banks of memory cells, an internal bus configured to transfer data between the plurality of banks and an external bus interface, and a bank-to-bank transfer bus configured to transfer data between the plurality of banks.

公开(公告)号：US20180365020A1

公开(公告)日：2018-12-20

申请号：US16112577

申请日：2018-08-24

Applicant: Micron Technology, Inc.

Inventor： Kyle B. Wheeler ,  Richard C. Murphy ,  Troy A. Manning ,  Dean A. Klein

IPC: G06F9/38 ,  G11C7/06 ,  G11C7/10 ,  G11C11/408 ,  G11C11/4096 ,  G06F15/78

CPC classification number: G06F9/3877 ,  G06F15/7821 ,  G11C7/06 ,  G11C7/065 ,  G11C7/1006 ,  G11C7/1036 ,  G11C11/4087 ,  G11C11/4096

Abstract: Examples of the present disclosure provide apparatuses and methods related to generating and executing a control flow. An example apparatus can include a first device configured to generate control flow instructions, and a second device including an array of memory cells, an execution unit to execute the control flow instructions, and a controller configured to control an execution of the control flow instructions on data stored in the array.

公开(公告)号：US20180336093A1

公开(公告)日：2018-11-22

申请号：US16050585

申请日：2018-07-31

Applicant: Micron Technology, Inc.

Inventor： Troy A. Manning ,  Troy D. Larsen ,  Martin L. Culley

IPC: G06F11/10 ,  G11C29/52 ,  G06F3/06 ,  G06F8/41

Abstract: The present disclosure includes apparatuses and methods for physical page, logical page, and codeword correspondence. A number of methods include error coding a number of logical pages of data as a number of codewords and writing the number of codewords to a number of physical pages of memory. The number of logical pages of data can be different than the number of physical pages of memory.