公开(公告)号：US20140231940A1

公开(公告)日：2014-08-21

申请号：US13770306

申请日：2013-02-19

Applicant: QUALCOMM INCORPORATED

Inventor： William H. Xia ,  Wenqing Wu ,  Kendrick H. Yuen ,  Abhishek Banerjee ,  Xia Li ,  Seung H. Kang ,  Jung Pill Kim

IPC: H01L43/02 ,  H01L43/12

CPC classification number: H01L43/02 ,  G11C11/161 ,  G11C11/1659 ,  G11C11/1675 ,  G11C11/1693 ,  H01L43/08 ,  H01L43/12

Abstract: A memory cell includes an elongated first electrode coupled to a magnetic tunnel junction (MTJ) structure and an elongated second electrode aligned with the elongated first electrode coupled to the MTJ structure. The elongated electrodes are configured to direct mutually additive portions of a switching current induced magnetic field through the MTJ. The mutually additive portions enhance switching of the MTJ in response to application of the switching current.

Abstract translation: 存储单元包括耦合到磁隧道结（MTJ）结构的细长第一电极和与耦合到MTJ结构的细长第一电极对准的细长第二电极。 细长电极被配置为引导开关电流感应磁场的相互添加部分通过MTJ。 响应于开关电流的应用，相互添加的部分增强MTJ的切换。

公开(公告)号：US08797792B2

公开(公告)日：2014-08-05

申请号：US14022364

申请日：2013-09-10

Applicant: QUALCOMM Incorporated

Inventor： Hari M. Rao ,  Jung Pil Kim ,  Seung H. Kang ,  Xiaochun Zhu ,  Tae Hyun Kim ,  Kangho Lee ,  Xia Li ,  Wah Nam Hsu ,  Wuyang Hao ,  Jungwon Suh ,  Nicholas K. Yu ,  Matthew Michael Nowak ,  Steven M. Millendorf ,  Asaf Ashkenazi

IPC: G11C11/00 ,  G11C11/16 ,  G11C11/14 ,  G11C17/02 ,  G11C17/16 ,  G11C29/02

CPC classification number: G11C11/16 ,  G11C11/14 ,  G11C11/1655 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1675 ,  G11C17/02 ,  G11C17/16 ,  G11C29/027

Abstract: A memory device includes a magnetic tunnel junction (MTJ) bitcell. The MTJ bitcell includes a first MTJ and a second MTJ. The memory device further includes programming circuitry configured to generate a non-reversible state at the bitcell by applying a program signal to a selected one of the first MTJ and the second MTJ of the bitcell. The non-reversible state corresponds to a value of the MTJ bitcell that is determined by comparing a first value read at the first MTJ and a second value read at the second MTJ.

Abstract translation: 存储器件包括磁性隧道结（MTJ）位单元。 MTJ位单元包括第一MTJ和第二MTJ。 存储器件还包括编程电路，其被配置为通过将程序信号施加到位单元的第一MTJ和第二MTJ中的所选择的一个来在位单元处产生不可逆状态。 不可逆状态对应于通过比较在第一MTJ读取的第一值和在第二MTJ读取的第二值确定的MTJ比特单元的值。

公开(公告)号：US20140203381A1

公开(公告)日：2014-07-24

申请号：US13748979

申请日：2013-01-24

Applicant: QUALCOMM INCORPORATED

Inventor： Xiaochun Zhu ,  Xia Li ,  Wei-Chuan Chen ,  Seung H. Kang

IPC: H01L43/12 ,  H01L43/02

CPC classification number: H01L43/12 ,  H01L43/08

Abstract: Material surrounding a magnetic tunnel junction (MTJ) device region of a multi-layer starting structure is etched, forming an MTJ device pillar having an MTJ layer with a chemically damaged peripheral edge region. De-nitridation or de-oxidation, or both, restore the chemically damaged peripheral region to form an edge-restored MTJ layer. An MTJ edge restoration assist layer is formed on the edge-restored MTJ layer. An MTJ-edge-protect layer is formed on the insulating MTJ-edge-restoration-assist layer.

Abstract translation: 蚀刻围绕多层起始结构的磁性隧道结（MTJ）器件区域的材料，形成具有化学损伤的外围边缘区域的MTJ层的MTJ器件柱。 脱氮或脱氧，或两者恢复化学损伤的外围区域，形成边缘恢复的MTJ层。 在边缘恢复的MTJ层上形成MTJ边缘恢复辅助层。 在绝缘MTJ边缘恢复辅助层上形成MTJ边缘保护层。

公开(公告)号：US20140139209A1

公开(公告)日：2014-05-22

申请号：US13680432

申请日：2012-11-19

Applicant: QUALCOMM INCORPORATED

Inventor： Kangho Lee ,  Xiao Lu ,  Wah Nam Hsu ,  Seung H. Kang

IPC: G01R33/02

CPC classification number: G01R33/02 ,  G11C11/16 ,  G11C29/56016

Abstract: Several novel features pertain to an automatic testing equipment (ATE) memory tester that includes a load board, a projected-field electromagnet, a positioning mechanism and a memory tester. The load board is for coupling to a die package that includes a magnetoresistive random access memory (MRAM) having several cells, where each cell includes a magnetic tunnel junction (MTJ). The projected-field electromagnet is for applying a portion of a magnetic field across the MRAM. The portion of the magnetic field may be substantially uniform. The positioning mechanism is coupled to the electromagnet and the load board, and is configured to position the electromagnet vertically about (above/below) the die package when the die package is coupled to the load board. The memory tester is coupled to the load board. The memory tester is for testing the MRAM when the substantially uniform portion of the magnetic field is applied across the MRAM.

Abstract translation: 一些新颖的功能涉及自动测试设备（ATE）存储器测试器，其包括负载板，投射场电磁体，定位机构和存储器测试器。 负载板用于耦合到包括具有几个电池的磁阻随机存取存储器（MRAM）的管芯封装，其中每个电池包括磁性隧道结（MTJ）。 投射场电磁铁用于在MRAM上施加磁场的一部分。 磁场的部分可以是基本均匀的。 定位机构联接到电磁体和负载板，并且被配置为当模具封装耦合到负载板时，将电磁铁垂直地围绕模具封装（上/下）定位。 存储器测试器耦合到负载板。 当磁场的基本上均匀的部分被施加在MRAM上时，存储器测试器用于测试MRAM。

公开(公告)号：US20140108478A1

公开(公告)日：2014-04-17

申请号：US13651954

申请日：2012-10-15

Applicant: QUALCOMM INCORPORATED

Inventor： Kangho Lee ,  Taehyun Kim ,  Xiaochun Zhu ,  David M. Jacobson ,  Raghu Sagar Madala ,  Wenqing Wu ,  Jung Pill Kim ,  Seung H. Kang

IPC: G06F7/58

CPC classification number: G06F7/588

Abstract: A random number generator system that utilizes a magnetic tunnel junction (MTJ) that is controlled by an STT-MTJ entropy controller that determines whether to proceed with generating random numbers or not by monitoring the health of the MTJ-based random number generator is illustrated. If the health of the random number generation is above a threshold, the STT-MTJ entropy controller shuts down the MTJ-based random number generator and sends a message to a requesting chipset that a secure key generation is not possible. If the health of the random number generation is below a threshold, the entropy controller allows the MTJ-based random number generator to generate random numbers based on a specified algorithm, the output of which is post processed and used by a cryptographic-quality deterministic random bit generator to generate a security key for a requesting chipset.

Abstract translation: 示出了利用由STT-MTJ熵控制器控制的磁隧道结（MTJ）的随机数发生器系统，其通过监测基于MTJ的随机数发生器的健康来确定是否继续生成随机数。 如果随机数生成的健康状况高于阈值，则STT-MTJ熵控制器关闭基于MTJ的随机数生成器，并且向请求芯片组发送消息，即不可能产生安全密钥。 如果随机数生成的健康状况低于阈值，则熵控制器允许基于MTJ的随机数发生器基于指定的算法产生随机数，其输出被后处理并由加密质量确定性随机使用 以产生请求芯片组的安全密钥。

公开(公告)号：US20140027869A1

公开(公告)日：2014-01-30

申请号：US13770526

申请日：2013-02-19

Applicant: QUALCOMM INCORPORATED

Inventor： Kangho Lee ,  Wei-Chuan Chen ,  Seung H. Kang

IPC: H01L43/02 ,  H01L43/12

CPC classification number: H01L43/10 ,  G11C11/15 ,  G11C11/16 ,  G11C11/161 ,  H01L43/02 ,  H01L43/08 ,  H01L43/12

Abstract: A perpendicular magnetic tunnel junction (MTJ) apparatus includes a tunnel magnetoresistance (TMR) enhancement buffer layer deposited between the tunnel barrier layer and the reference layers An amorphous alloy spacer is deposited between the TMR enhancement buffer layer and the reference layers to enhance TMR The amorphous alloy spacer blocks template effects of face centered cubic (fcc) oriented pinned layers and provides strong coupling between the pinned layers and the TMR enhancement buffer layer to ensure full perpendicular magnetization.

Abstract translation: 垂直磁隧道结（MTJ）装置包括沉积在隧道势垒层和参考层之间的隧道磁阻（TMR）增强缓冲层。在TMR增强缓冲层和参考层之间沉积非晶合金间隔物以增强TMR非晶态 合金间隔块阻挡面心立方（fcc）取向钉扎层的模板效应，并且在钉扎层和TMR增强缓冲层之间提供强耦合，以确保完全垂直磁化。

公开(公告)号：US20140015077A1

公开(公告)日：2014-01-16

申请号：US14027503

申请日：2013-09-16

Applicant: QUALCOMM Incorporated

Inventor： Kangho Lee ,  Seung H. Kang ,  Xiaochun Zhu

IPC: H01L43/02

CPC classification number: H01L43/08 ,  G06F17/5068 ,  G11C11/16 ,  G11C11/161 ,  G11C11/1675 ,  H01L43/02 ,  H01L43/12

Abstract: A memory cell comprises a magnetic tunnel junction (MTJ) structure that includes a free layer coupled to a bit line and a pinned layer. A magnetic moment of the free layer is substantially parallel to a magnetic moment of the pinned layer in a first state and substantially antiparallel to the magnetic moment of the pinned layer in a second state. The pinned layer has a physical dimension to produce an offset magnetic field corresponding to a first switching current of the MTJ structure to enable switching between the first state and the second state when a first voltage is applied from the bit line to a source line coupled to an access transistor and a second switching current to enable switching between the second state and the first state when the first voltage is applied from the source line to the bit line.

Abstract translation: 存储单元包括磁隧道结（MTJ）结构，其包括耦合到位线和固定层的自由层。 自由层的磁矩基本上平行于处于第一状态的被钉扎层的磁矩，并且在第二状态下基本上与销钉层的磁矩反平行。 固定层具有物理尺寸以产生对应于MTJ结构的第一开关电流的偏移磁场，以便当第一电压从位线施加到耦合到第一状态的源极线时，能够在第一状态和第二状态之间切换 存取晶体管和第二开关电流，以便当第一电压从源极线施加到位线时，能够在第二状态和第一状态之间切换。

公开(公告)号：US20140010006A1

公开(公告)日：2014-01-09

申请号：US14022364

申请日：2013-09-10

Applicant: QUALCOMM Incorporated

Inventor： Hari M. Rao ,  Jung Pill Kim ,  Seung H. Kang ,  Xiaochun Zhu ,  Taehyun Kim ,  Kangho Lee ,  Xia Li ,  Wah Nam Hsu ,  Wuyang Hao ,  Jungwon Suh ,  Nicholas K. Yu ,  Matthew M. Nowak ,  Steven M. Millendorf ,  Asaf Ashkenazi

IPC: G11C11/14

CPC classification number: G11C11/16 ,  G11C11/14 ,  G11C11/1655 ,  G11C11/1659 ,  G11C11/1673 ,  G11C11/1675 ,  G11C17/02 ,  G11C17/16 ,  G11C29/027

Abstract: A memory device includes a magnetic tunnel junction (MTJ) bitcell. The MTJ bitcell includes a first MTJ and a second MTJ. The memory device further includes programming circuitry configured to generate a non-reversible state at the bitcell by applying a program signal to a selected one of the first MTJ and the second MTJ of the bitcell. The non-reversible state corresponds to a value of the MTJ bitcell that is determined by comparing a first value read at the first MTJ and a second value read at the second MTJ.

Abstract translation: 存储器件包括磁性隧道结（MTJ）位单元。 MTJ位单元包括第一MTJ和第二MTJ。 存储器件还包括编程电路，其被配置为通过将程序信号施加到位单元的第一MTJ和第二MTJ中的所选择的一个来在位单元处产生不可逆状态。 不可逆状态对应于通过比较在第一MTJ读取的第一值和在第二MTJ读取的第二值确定的MTJ比特单元的值。

公开(公告)号：US20130288395A1

公开(公告)日：2013-10-31

申请号：US13925953

申请日：2013-06-25

Applicant: QUALCOMM Incorporated

Inventor： Xia Li ,  Seung H. Kang

IPC: H01L43/12 ,  G06F17/50

CPC classification number: G06F17/50 ,  G11C11/161 ,  H01L43/08 ,  H01L43/12

Abstract: In a particular embodiment, a method of forming a magnetic tunnel junction (MTJ) device includes forming an MTJ cap layer on an MTJ structure and forming a top electrode layer coupled to the MTJ cap layer. The top electrode layer includes at least two layers and one layer of the two layers includes a nitrified metal.

Abstract translation: 在特定实施例中，形成磁性隧道结（MTJ）器件的方法包括在MTJ结构上形成MTJ覆盖层并形成耦合到MTJ覆盖层的顶部电极层。 顶部电极层包括至少两层，两层的一层包括硝化金属。

公开(公告)号：US20130215675A1

公开(公告)日：2013-08-22

申请号：US13853146

申请日：2013-03-29

Applicant: Qualcomm Incorporated

Inventor： Kyungho Ryu ,  Jisu Kim ,  Seong-Ook Jung ,  Seung H. Kang

IPC: G11C11/16 ,  H01L43/12

CPC classification number: G11C11/1675 ,  G11C11/1659 ,  H01L43/12 ,  Y10T29/4902

Abstract: In a Spin Transfer Torque Magnetoresistive Random Access Memory (STT-MRAM) a bit cell array can have a source line substantially parallel to a word line. The source line can be substantially perpendicular to bit lines. A source line control unit includes a common source line driver and a source line selector configured to select individual ones of the source lines. The source line driver and source line selector can be coupled in multiplexed relation. A bit line control unit includes a common bit line driver and a bit line selector in multiplexed relation. The bit line control unit includes a positive channel metal oxide semiconductor (PMOS) element coupled between the common source line driver and bit line select lines and bit lines.

Abstract translation: 在自旋转移力矩磁阻随机存取存储器（STT-MRAM）中，位单元阵列可以具有基本上平行于字线的源极线。 源极线可以基本上垂直于位线。 源极线控制单元包括公共源极线驱动器和被配置为选择各个源极线的源极线选择器。 源极线驱动器和源极线选择器可以以多路复用关系耦合。 位线控制单元包括公共位线驱动器和复用关系的位线选择器。 位线控制单元包括耦合在公共源线驱动器和位线选择线和位线之间的正沟道金属氧化物半导体（PMOS）元件。