公开(公告)号：US20190258486A1

公开(公告)日：2019-08-22

申请号：US16281290

申请日：2019-02-21

Applicant: QUALCOMM Incorporated

Inventor： Oren Nishry ,  Tomer Rafael Ben-Chen ,  Sharon Graif ,  Felix Kolmakov

IPC: G06F9/30 ,  G06F9/35

Abstract: Event-based branching for serial protocol processor-based devices is disclosed. In this regard, a serial protocol processor-based device provides an event mesh control circuit comprising a mapping table circuit and a register control array corresponding to rows of the mapping table circuit. Each row of the mapping table circuit of the event mesh control circuit represents an implementation-specific grouping of events, with each column of the row representing a last known status or outcome for a corresponding event. A microcontroller of the serial protocol processor-based device is configured to use the register control array to select which event (i.e., which column of a corresponding row) will be used to make a branching determination. A branch custom instruction provided by the microcontroller indicates a selected row, a branch target address, and a comparison value to compare against the event indicated by the register control array entry corresponding to the selected row.

公开(公告)号：US11843486B2

公开(公告)日：2023-12-12

申请号：US18055587

申请日：2022-11-15

Applicant: QUALCOMM Incorporated

Inventor： Tomer Rafael Ben-Chen ,  Sharon Graif ,  Lior Amarilio

IPC: H04L25/49 ,  H03K19/21 ,  H04B1/40 ,  H04L25/03 ,  H04W72/044

CPC classification number: H04L25/49 ,  H03K19/215 ,  H04B1/40 ,  H04L25/03866 ,  H04W72/0466

Abstract: High-speed communication links with self-aligned scrambling on a communication link that sends scrambled signals may include a slave device that may self-align by initially detecting an unscrambled preamble symbol and more particularly detect an edge of the unscrambled preamble symbol. Based on the detected edge, a fine alignment adjustment may be made by testing subsequent scrambled data for a repeated pattern such as an IDLE symbol by comparing the repeated pattern to a candidate scrambled sequence that has been received through the communication link. The comparison may use an exclusive OR (XOR) circuit on some bits to derive a scrambler seed that is used to test for a match for the remaining bits. If there is a match, the scrambler seed and frame alignment have been detected and alignment is achieved.

公开(公告)号：US20230076957A1

公开(公告)日：2023-03-09

申请号：US18055587

申请日：2022-11-15

Applicant: QUALCOMM Incorporated

Inventor： Tomer Rafael Ben-Chen ,  Sharon Graif ,  Lior Amarilio

IPC: H04L25/49 ,  H03K19/21 ,  H04L25/03 ,  H04B1/40 ,  H04W72/04

Abstract: High-speed communication links with self-aligned scrambling on a communication link that sends scrambled signals may include a slave device that may self-align by initially detecting an unscrambled preamble symbol and more particularly detect an edge of the unscrambled preamble symbol. Based on the detected edge, a fine alignment adjustment may be made by testing subsequent scrambled data for a repeated pattern such as an IDLE symbol by comparing the repeated pattern to a candidate scrambled sequence that has been received through the communication link. The comparison may use an exclusive OR (XOR) circuit on some bits to derive a scrambler seed that is used to test for a match for the remaining bits. If there is a match, the scrambler seed and frame alignment have been detected and alignment is achieved.

公开(公告)号：US11366508B1

公开(公告)日：2022-06-21

申请号：US17180071

申请日：2021-02-19

Applicant: QUALCOMM Incorporated

Inventor： Prashanth Kumar Kakkireni ,  Naveen Kumar Narala ,  Sharon Graif

IPC: G06F1/3234 ,  G06F13/42 ,  G06F1/12 ,  G06F1/3206 ,  G06F1/26

Abstract: Systems, methods, and apparatus for power management are disclosed. A power management integrated circuit has a bus interface circuit configured to couple the power management integrated circuit to a shared communication bus, one or more regulator circuits configured to provide current to a managed device, and a controller. The controller is configured to determine that current consumption by the managed device exceeds a threshold level, generate an extended current level message to be transmitted over the shared communication bus to the managed device and transmit a time value with the extended current level message, the time value indicative of an elapsed time between generation of the extended current level message and start of transmission of the extended current level message.

公开(公告)号：US20220058153A1

公开(公告)日：2022-02-24

申请号：US16997505

申请日：2020-08-19

Applicant: QUALCOMM Incorporated

Inventor： Sharon Graif ,  Sai Ganapathy Srinivasan ,  Navdeep Mer ,  Sriharsha Chakka

IPC: G06F13/42 ,  G06F13/40 ,  G06F1/08

Abstract: The systems and methods for bus ownership in a system power management interface (SPMI) bus may include two or more masters on the SPMI bus, and bus ownership may be passed between masters. The current owner of the bus is responsible for providing a clock signal on the clock line of the SPMI bus. To avoid problems caused by ringing of the clock signal being sent on a conductor that exceeds the SPMI specification, the original master (from whom bus ownership is being transferred) holds the clock line of the SPMI bus at a logical low for a clock delay value that is based on conductor length.

公开(公告)号：US20220019548A1

公开(公告)日：2022-01-20

申请号：US16931826

申请日：2020-07-17

Applicant: QUALCOMM Incorporated

Inventor： Sharon Graif ,  Amit Gil ,  Navdeep Mer ,  Viney Kumar

IPC: G06F13/362 ,  G06F13/24 ,  G06F13/40 ,  G06F9/54

Abstract: Nested commands for a radio frequency front end (RFFE) bus are provided. In particular, timing commands may be nested inside a normal data flow. On receipt of a nested timing command, a slave on the RFFE bus suspends or halts an active command and addresses the timing command. On completion of the timing command, the slave returns to the halted command. By allowing such nested commands, counters in the slave that would otherwise be used to track triggers may be eliminated or reduced and power may be conserved by placing a clock signal associated with the bus into a low power mode.

公开(公告)号：US20200089632A1

公开(公告)日：2020-03-19

申请号：US16134559

申请日：2018-09-18

Applicant: QUALCOMM Incorporated

Inventor： Sharon Graif ,  Lior Amarilio ,  Mark Gaknam

IPC: G06F13/24 ,  G06F13/362 ,  G06F13/42

Abstract: Systems, methods, and apparatus are described that enable communication of in-band reset signals over an I3C serial bus. A method performed at a slave device includes driving a data line of the I3C serial bus from a high state to a low state before a first clock pulse is received from a clock line of the I3C serial bus after a start condition has been provided on the I3C serial bus, where driving the data line from the high state to the low state produces an initial pulse on the data line, transmitting one or more additional pulses on the data line before the first clock pulse is transmitted on the clock line, and driving the data line low until a rising edge of the first clock pulse is detected on the clock line after each of the plurality of additional pulses has been successfully transmitted on the data line.

公开(公告)号：US20200073836A1

公开(公告)日：2020-03-05

申请号：US16115388

申请日：2018-08-28

Applicant: QUALCOMM Incorporated

Inventor： Sharon Graif ,  Lior Amarilio ,  Mark Gakman

IPC: G06F13/362 ,  G06F13/42 ,  G06F1/32 ,  G06F1/10

Abstract: Methods and apparatuses for operating a direct communication over a serial communication bus are provided. An apparatus includes a master having a host controller. The host controller is configured to communicate with a first slave and with a second slave via a serial communication bus using at least one master-slave address, in accordance with a serial communication protocol. The host controller includes a master-slave module configured to operate communication with the first slave and with the second slave via the serial communication bus in accordance with the serial communication protocol and be in a low-power mode while the first slave and the second slave are in a direct communication. The host controller includes an always-on module configured to, while the master-slave module is in the low-power mode, clock the serial communication bus for the direct communication.

公开(公告)号：US20200073833A1

公开(公告)日：2020-03-05

申请号：US16551447

申请日：2019-08-26

Applicant: Qualcomm Incorporated

Inventor： Sharon Graif ,  Meital Zangvil ,  Tomer Rafael Ben-Chen

IPC: G06F13/24 ,  G06F13/42

Abstract: Methods and apparatuses for aggregated IBIs are provided. The apparatus includes a host controller configured to communicate with at least one slave via a serial communication bus, trigger and receive a series of responses from the at least one slave via the serial communication bus, determine one response of the series of responses indicating an in-band interrupt (IBI) request, and respond to the IBI request based on a position of the one response among the series of responses. The method includes communicating with at least one slave via a serial communication bus, triggering and receiving a series of responses from the at least one slave via the serial communication bus, determining one response of the series of responses indicating an in-band interrupt (IBI) request, and responding to the IBI request based on a position of the one response among the series of responses.

公开(公告)号：US20200019523A1

公开(公告)日：2020-01-16

申请号：US16032238

申请日：2018-07-11

Applicant: QUALCOMM Incorporated

Inventor： Lior Amarilio ,  Sharon Graif ,  Yiftach Benjamini

IPC: G06F13/362 ,  G06F3/16 ,  G06F13/40

Abstract: Delayed bank switch commands in an audio system such as a SOUNDWIRE audio system may have slaves that have had a delay register added to register banks for each data port. When a bank switch command is received, a slave consults the delay register and delays switching by a number of frames indicated in the delay register. Such delays may be used to prevent interpreting non-audio data as part of a data stream, particularly at start up and closure of audio streams. If an audio stream is active, the delay may be set to zero. By precluding the evaluation of non-audio data, audio artifacts may be avoided and a better user experience provided.