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公开(公告)号：US20050110570A1
公开(公告)日：2005-05-26
申请号：US10724561
申请日：2003-11-26
CPC分类号： G06G7/30 , H03F3/45183
摘要： A linear interpolator is provided that includes differential pairs of transistors biased such that a first input voltage may be multiplied by a factor r wherein 0≦r≦1 and such that a second input voltage may be multiplied by the complement factor (1-r). By combining the multiplied input voltages, a linear interpolation is provided based upon the factor r.
摘要翻译： 提供了线性内插器，其包括被偏置的差分对晶体管，使得第一输入电压可以乘以因子r，其中0≤r≤1，并且使得第二输入电压可以乘以补码因子（1- r）。 通过组合倍增的输入电压，基于因子r提供线性内插。
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公开(公告)号：US20050110476A1
公开(公告)日：2005-05-26
申请号：US10724440
申请日：2003-11-26
CPC分类号： G05F3/30
摘要： A bandgap reference includes a current source providing a current that is proportional to the sum of a first voltage having a positive-to-absolute-temperature (PTAT) temperature dependency and a second voltage having a complementary-to-absolute-temperature (CTAT) dependency. The bandgap reference further includes a variable resistor comprising a fixed resistor that may be selectively combined with one or more of a plurality of selectable resistors, wherein the first voltage is inversely proportional to the resistance of the variable resistor.
摘要翻译： 带隙基准包括电流源，其提供与具有正绝对温度（PTAT）温度依赖性的第一电压和具有互补绝对温度（CTAT）的第二电压的和成比例的电流， 依赖。 带隙参考还包括可变电阻器，其包括可以与多个可选择电阻器中的一个或多个选择性组合的固定电阻器，其中第一电压与可变电阻器的电阻成反比。
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33.发明授权Method and apparatus for generating coefficients in continuous time equalizers 有权用于在连续时间均衡器中产生系数的方法和装置公开(公告)号：US07433399B2
公开(公告)日：2008-10-07
申请号：US10970470
申请日：2004-10-20
CPC分类号： H04L25/03057 , H04L2025/03617
摘要： Systems and methods are disclosed to adaptively generate coefficients for continuous time least mean square error equalizers and to correct offset in high-gain amplifiers. An adaptive coefficient generator includes a bank of individual coefficient generators, each utilizing a first adaptive correction signal for a first correction and a second adaptive correction signal for a second more precise correction. The adaptive correction signals for offset correction can be a current or voltage. The first adaptive correction signal is set by maintaining the second adaptive correction signal constant, such as setting it to zero, and adjusting the first signal until the magnitude of the coefficient is minimized. The second adaptive correction signal is then set by maintaining the first adaptive correction signal at its set value by adjusting the second signal until the magnitude of the coefficient is again minimized.
摘要翻译： 公开了系统和方法以自适应地生成用于连续时间最小均方误差均衡器的系数并且校正高增益放大器中的偏移。 一种自适应系数发生器包括一组单独的系数发生器，每一组利用用于第一校正的第一自适应校正信号和用于第二更精确校正的第二自适应校正信号。 用于偏移校正的自适应校正信号可以是电流或电压。 通过使第二自适应校正信号保持恒定（例如将其设置为零）以及调整第一信号直到系数的幅度最小化来设定第一自适应校正信号。 然后通过调整第二信号将第一自适应校正信号保持在其设定值，直到系数的幅度再次最小化来设定第二自适应校正信号。
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公开(公告)号：US07170274B2
公开(公告)日：2007-01-30
申请号：US10724440
申请日：2003-11-26
IPC分类号： G05F3/16
CPC分类号： G05F3/30
摘要： A bandgap reference includes a current source providing a current that is proportional to the sum of a first voltage having a positive-to-absolute-temperature (PTAT) temperature dependency and a second voltage having a complementary-to-absolute-temperature (CTAT) dependency. The bandgap reference further includes a variable resistor comprising a fixed resistor that may be selectively combined with one or more of a plurality of selectable resistors, wherein the first voltage is inversely proportional to the resistance of the variable resistor.
摘要翻译： 带隙基准包括电流源，其提供与具有正绝对温度（PTAT）温度依赖性的第一电压和具有互补绝对温度（CTAT）的第二电压的和成比例的电流， 依赖。 带隙参考还包括可变电阻器，其包括可以与多个可选择电阻器中的一个或多个选择性组合的固定电阻器，其中第一电压与可变电阻器的电阻成反比。
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公开(公告)号：US07078969B2
公开(公告)日：2006-07-18
申请号：US11209010
申请日：2005-08-22
IPC分类号： H03F3/45
CPC分类号： G06G7/30 , H03F3/45183
摘要： A linear interpolator is provided that includes differential pairs of transistors biased such that a first input voltage may be multiplied by a factor r wherein 0≦r≦1 and such that a second input voltage may be multiplied by the complement factor (1−r). By combining the multiplied input voltages, a linear interpolation is provided based upon the factor r.
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36.发明申请Method and apparatus for generating coefficients in continuous time equalizers 有权用于在连续时间均衡器中产生系数的方法和装置公开(公告)号：US20060083296A1
公开(公告)日：2006-04-20
申请号：US10970470
申请日：2004-10-20
CPC分类号： H04L25/03057 , H04L2025/03617
摘要： Systems and methods are disclosed to adaptively generate coefficients for continuous time least mean square error equalizers and to correct offset in high-gain amplifiers. An adaptive coefficient generator includes a bank of individual coefficient generators, each utilizing a first adaptive correction signal for a first correction and a second adaptive correction signal for a second more precise correction. The adaptive correction signals for offset correction can be a current or voltage. The first adaptive correction signal is set by maintaining the second adaptive correction signal constant, such as setting it to zero, and adjusting the first signal until the magnitude of the coefficient is minimized. The second adaptive correction signal is then set by maintaining the first adaptive correction signal at its set value by adjusting the second signal until the magnitude of the coefficient is again minimized.
摘要翻译： 公开了系统和方法以自适应地生成用于连续时间最小均方误差均衡器的系数并且校正高增益放大器中的偏移。 一种自适应系数发生器包括一组单独的系数发生器，每一组利用用于第一校正的第一自适应校正信号和用于第二更精确校正的第二自适应校正信号。 用于偏移校正的自适应校正信号可以是电流或电压。 通过使第二自适应校正信号保持恒定（例如将其设置为零）以及调整第一信号直到系数的幅度最小化来设定第一自适应校正信号。 然后通过调整第二信号将第一自适应校正信号保持在其设定值，直到系数的幅度再次最小化来设定第二自适应校正信号。
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公开(公告)号：US06940352B2
公开(公告)日：2005-09-06
申请号：US10724561
申请日：2003-11-26
CPC分类号： G06G7/30 , H03F3/45183
摘要： A linear interpolator is provided that includes differential pairs of transistors biased such that a first input voltage may be multiplied by a factor r wherein 0≦r≦1 and such that a second input voltage may be multiplied by the complement factor (1−r). By combining the multiplied input voltages, a linear interpolation is provided based upon the factor r.
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公开(公告)号：US20050104705A1
公开(公告)日：2005-05-19
申请号：US10718449
申请日：2003-11-19
CPC分类号： H01F17/0013 , H01F2017/0046 , Y10T29/4902
摘要： An integrated circuit including a differentially excited symmetric microstrip inductor formed over multiple layers while maintaining both electrical and geometrical symmetry.
摘要翻译： 一种集成电路，其包括在多个层上形成的差分激励的对称微带电感器，同时保持电和几何对称性。
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39.发明授权Analog delay chain having more uniformly distributed capacitive loads and analog delay cell for use in chain 有权具有更均匀分布的容性负载的模拟延迟链和用于链中的模拟延迟单元公开(公告)号：US07190226B2
公开(公告)日：2007-03-13
申请号：US10928420
申请日：2004-08-27
IPC分类号： H03F3/45
CPC分类号： H03F3/45183 , H03F2203/45631 , H03F2203/45638 , H03F2203/45652 , H03F2203/45688 , H03F2203/45712
摘要： A tapped delay chain comprises a plurality of delay cells where each cell has at least two output taps: a primary one for feeding forward a delayed signal to a next cell in the chain, and a secondary output tap for feeding a slightly-differently delayed signal to a multiplier unit so that the slightly-differently delayed signal can be multiplied by a weighting coefficient. The split of output taps in each delay cell allows for a corresponding split of loading capacitance. Each output tap of the delay cell is loaded by a smaller capacitance than it would have had to otherwise drive had the split taps been instead lumped together as a common node. The reduced loading capacitance at each of the split taps allows for a wider frequency response range. The tapped delay chain may be used to form a feed-forward equalizer (FFE) which further comprises an adder, and a plurality of multipliers each respectively receiving a delayed input signal (Sin(delayed)) from a secondary output tap of a respective delay cell in the chain and each outputting a correspondingly delayed and weighted, product signal (Pi) to the adder.
摘要翻译： 抽头延迟链包括多个延迟单元，其中每个单元具有至少两个输出抽头：用于将延迟的信号馈送到链中的下一个单元的初级延迟单元，以及用于馈送稍微不同的延迟信号的次级输出抽头 到乘法器单元，使得略微不同的延迟信号可以乘以加权系数。 每个延迟单元中的输出抽头分开允许相应的负载电容分流。 延迟单元的每个输出抽头加载的电容小于如果分裂抽头被集中在一起作为公共节点而不得不以其他方式驱动的电容。 每个分接抽头的减小的负载电容允许更宽的频率响应范围。 抽头延迟链可用于形成前馈均衡器（FFE），该前馈均衡器还包括加法器和多个乘法器，每个乘法器分别接收延迟的输入信号（（延迟）） 链中相应的延迟单元的辅助输出抽头，并且每个输出相应的延迟加权乘积信号（Pi）给加法器。
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40.发明申请公开(公告)号：US20070115074A1
公开(公告)日：2007-05-24
申请号：US11640079
申请日：2006-12-15
IPC分类号： H04B3/14
CPC分类号： H03F3/45183 , H03F2203/45631 , H03F2203/45638 , H03F2203/45652 , H03F2203/45688 , H03F2203/45712
摘要： A tapped delay chain comprises a plurality of delay cells where each cell has at least two output taps: a primary one for feeding forward a delayed signal to a next cell in the chain, and a secondary output tap for feeding a slightly-differently delayed signal to a multiplier unit so that the slightly-differently delayed signal can be multiplied by a weighting coefficient. The split of output taps in each delay cell allows for a corresponding split of loading capacitance. Each output tap of the delay cell is loaded by a smaller capacitance than it would have had to otherwise drive had the split taps been instead lumped together as a common node. The reduced loading capacitance at each of the split taps allows for a wider frequency response range. The tapped delay chain may be used to form a feed-forward equalizer (FFE) which further comprises an adder, and a plurality of multipliers each respectively receiving a delayed input signal (Sin(delayed)) from a secondary output tap of a respective delay cell in the chain and each outputting a correspondingly delayed and weighted, product signal (Pi) to the adder.
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