公开(公告)号：US20160293427A1

公开(公告)日：2016-10-06

申请号：US15043579

申请日：2016-02-14

Applicant: Renesas Electronics Corporation

Inventor： Tatsuyoshi MIHARA ,  Masaaki SHINOHARA

IPC: H01L21/28 ,  H01L29/66 ,  H01L27/115

CPC classification number: H01L21/28282 ,  H01L27/11568 ,  H01L27/11573 ,  H01L29/42344 ,  H01L29/66545 ,  H01L29/66833 ,  H01L29/792

Abstract: The performances of a semiconductor device are improved. In a method for manufacturing a semiconductor device, a first insulation film, a conductive film, a silicon-containing second insulation film, and a third film formed of silicon are sequentially formed at the surface of a control gate electrode. Then, the third film is etched back to leave the third film at the side surface of the control gate electrode via the first insulation film, the conductive film, and the second insulation film, thereby to form a spacer. Then, the conductive film is etched back to form a memory gate electrode formed of the conductive film between the spacer and the control gate electrode, and between the spacer and the semiconductor substrate.

Abstract translation: 提高了半导体器件的性能。 在半导体器件的制造方法中，在控制栅电极的表面依次形成第一绝缘膜，导电膜，含硅第二绝缘膜和由硅形成的第三膜。 然后，通过第一绝缘膜，导电膜和第二绝缘膜将第三膜蚀刻回留在控制栅电极的侧表面处，从而形成间隔物。 然后，将导电膜回蚀以形成由间隔物和控制栅电极之间以及间隔物与半导体衬底之间的导电膜形成的存储栅电极。

公开(公告)号：US20160218040A1

公开(公告)日：2016-07-28

申请号：US15089932

申请日：2016-04-04

Applicant: Renesas Electronics Corporation

Inventor： Koji MAEKAWA ,  Tatsuyoshi MIHARA

IPC: H01L21/8234 ,  H01L21/266 ,  H01L21/265 ,  H01L29/66 ,  H01L21/311

CPC classification number: H01L21/823468 ,  H01L21/26513 ,  H01L21/266 ,  H01L21/31116 ,  H01L21/823418 ,  H01L21/823462 ,  H01L29/0615 ,  H01L29/36 ,  H01L29/66477 ,  H01L29/6653 ,  H01L29/66553 ,  Y10S257/90 ,  Y10S438/90

Abstract: An insulating film and another insulating film are formed over a semiconductor substrate in that order to cover first, second, and third gate electrodes. The another insulating film is etched back to form sidewall spacers over side surfaces of the insulating film. Then, the sidewall spacers over the side surfaces of the insulating films corresponding to the sidewalls of the first and second gate electrodes are removed to leave the sidewall spacers over the side surfaces of the insulating film corresponding to the sidewalls of the third gate electrode. Then, the sidewall spacers and the insulating films are etched back, so that the sidewall spacers are formed of the insulating film over the sidewalls of the first, second, and third gate electrodes.

Abstract translation: 为了覆盖第一，第二和第三栅电极，在半导体衬底上形成绝缘膜和另一绝缘膜。 另一绝缘膜被回蚀刻以在绝缘膜的侧表面上形成侧壁间隔物。 然后，去除与第一和第二栅电极的侧壁相对应的绝缘膜的侧表面上的侧壁间隔物，以使侧壁间隔物超过对应于第三栅电极的侧壁的绝缘膜的侧表面。 然后，侧壁间隔物和绝缘膜被回蚀刻，使得侧壁间隔物由绝缘膜形成在第一，第二和第三栅电极的侧壁上。

公开(公告)号：US20160155747A1

公开(公告)日：2016-06-02

申请号：US14948339

申请日：2015-11-22

Applicant: Renesas Electronics Corporation

Inventor： Tatsuyoshi MIHARA

IPC: H01L27/115

CPC classification number: H01L27/11517 ,  H01L27/11563 ,  H01L27/11565 ,  H01L27/1157 ,  H01L29/42344 ,  H01L29/66833 ,  H01L29/792

Abstract: The reliability and performances of a semiconductor device having a nonvolatile memory are improved. A selection gate electrode is formed over a semiconductor substrate via a first insulation film. Over the opposite side surfaces of the selection gate electrode, second insulation films of sidewall insulation films are formed. Over the semiconductor substrate, a memory gate electrode is formed via a third insulation film having a charge accumulation part. The selection gate electrode and the memory gate electrode are adjacent to each other via the second insulation film and the third insulation film. The second insulation film is not formed under the memory gate electrode. The total thickness of the second insulation film and the third insulation film interposed between the selection gate electrode and the memory gate electrode is larger than the thickness of the third insulation film interposed between the semiconductor substrate and the memory gate electrode.

Abstract translation: 提高了具有非易失性存储器的半导体器件的可靠性和性能。 选择栅电极经由第一绝缘膜形成在半导体衬底之上。 在选择栅电极的相对侧表面上形成侧壁绝缘膜的第二绝缘膜。 在半导体衬底上，通过具有电荷累积部分的第三绝缘膜形成存储栅电极。 选择栅电极和存储栅电极经由第二绝缘膜和第三绝缘膜彼此相邻。 第二绝缘膜不形成在存储栅极下方。 介于选择栅电极和存储栅电极之间的第二绝缘膜和第三绝缘膜的总厚度大于插入在半导体衬底和存储栅电极之间的第三绝缘膜的厚度。