公开(公告)号：US09252200B2

公开(公告)日：2016-02-02

申请号：US14522481

申请日：2014-10-23

Applicant: Renesas Electronics Corporation

Inventor： Shinpei Watanabe ,  Shinichi Uchida ,  Tadashi Maeda ,  Shigeru Tanaka

IPC: H01L49/02 ,  H04B5/00 ,  H01L23/522 ,  H01L23/64 ,  H01L27/06 ,  H01L23/495 ,  H01L23/00 ,  H01L23/62 ,  H01L23/31

CPC classification number: H01L25/0657 ,  H01L23/3185 ,  H01L23/49575 ,  H01L23/5227 ,  H01L23/62 ,  H01L23/645 ,  H01L24/32 ,  H01L24/73 ,  H01L27/0617 ,  H01L27/0922 ,  H01L28/10 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05567 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/92147 ,  H01L2224/92247 ,  H01L2225/06531 ,  H01L2225/06562 ,  H01L2924/1206 ,  H01L2924/181 ,  H01L2924/19042 ,  H04B5/005 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: In a first semiconductor chip, a first multilayer interconnect layer is formed on a first substrate, and a first inductor is formed in the first multilayer interconnect layer. In a second semiconductor chip, a second multilayer interconnect layer is formed on a second substrate. A second inductor is formed in the second multilayer interconnect layer. The first semiconductor chip and the second semiconductor chip overlap each other in a direction in which the first multilayer interconnect layer and the second multilayer interconnect layer face each other. In addition, the first inductor and the second inductor overlap each other when seen in a plan view. At least one end of a first insulating film does not overlap the end of a facing region, in a Y direction.

Abstract translation: 在第一半导体芯片中，在第一基板上形成第一多层互连层，在第一多层互连层中形成第一电感器。 在第二半导体芯片中，在第二基板上形成第二多层互连层。 第二电感器形成在第二多层互连层中。 第一半导体芯片和第二半导体芯片在第一多层互连层和第二多层互连层彼此面对的方向上彼此重叠。 此外，当在平面图中看时，第一电感器和第二电感器彼此重叠。 第一绝缘膜的至少一端在Y方向上不与面对区域的端部重叠。

公开(公告)号：US20150130022A1

公开(公告)日：2015-05-14

申请号：US14522481

申请日：2014-10-23

Applicant: Renesas Electronics Corporation

Inventor： Shinpei Watanabe ,  Shinichi Uchida ,  Tadashi Maeda ,  Shigeru Tanaka

IPC: H01L49/02 ,  H01L27/01 ,  H04B5/00

CPC classification number: H01L25/0657 ,  H01L23/3185 ,  H01L23/49575 ,  H01L23/5227 ,  H01L23/62 ,  H01L23/645 ,  H01L24/32 ,  H01L24/73 ,  H01L27/0617 ,  H01L27/0922 ,  H01L28/10 ,  H01L2224/04042 ,  H01L2224/05554 ,  H01L2224/05567 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/92147 ,  H01L2224/92247 ,  H01L2225/06531 ,  H01L2225/06562 ,  H01L2924/1206 ,  H01L2924/181 ,  H01L2924/19042 ,  H04B5/005 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

Abstract: In a first semiconductor chip, a first multilayer interconnect layer is formed on a first substrate, and a first inductor is formed in the first multilayer interconnect layer. In a second semiconductor chip, a second multilayer interconnect layer is formed on a second substrate. A second inductor is formed in the second multilayer interconnect layer. The first semiconductor chip and the second semiconductor chip overlap each other in a direction in which the first multilayer interconnect layer and the second multilayer interconnect layer face each other. In addition, the first inductor and the second inductor overlap each other when seen in a plan view. At least one end of a first insulating film does not overlap the end of a facing region, in a Y direction.

Abstract translation: 在第一半导体芯片中，在第一基板上形成第一多层互连层，在第一多层互连层中形成第一电感器。 在第二半导体芯片中，在第二基板上形成第二多层互连层。 第二电感器形成在第二多层互连层中。 第一半导体芯片和第二半导体芯片在第一多层互连层和第二多层互连层彼此面对的方向上彼此重叠。 此外，当在平面图中看时，第一电感器和第二电感器彼此重叠。 第一绝缘膜的至少一端在Y方向上不与面对区域的端部重叠。

公开(公告)号：US20140210045A1

公开(公告)日：2014-07-31

申请号：US14148893

申请日：2014-01-07

Applicant: Renesas Electronics Corporation

Inventor： Shinichi Uchida ,  Yasutaka Nakashiba

IPC: H01F21/12 ,  H01L49/02

CPC classification number: H01F21/12 ,  H01F21/10 ,  H01L23/5227 ,  H01L23/645 ,  H01L28/10 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An inductor device includes an insulation layer, an inductor, fixed electrodes, and a movable electrode. The inductor is formed on the insulation layer. The fixed electrodes are provided in positions which do not overlap with the inductor in a planar view. The movable electrode overlaps with the inductor and the fixed electrodes in the planar view, and is separated from the inductor and the fixed electrodes. Further, the movable electrode includes first openings.

Abstract translation: 电感器件包括绝缘层，电感器，固定电极和可动电极。 电感器形成在绝缘层上。 固定电极设置在平面图中不与电感器重叠的位置。 可动电极在平面图中与电感器和固定电极重叠，并且与电感器和固定电极分离。 此外，可动电极包括第一开口。