公开(公告)号：US10892357B2

公开(公告)日：2021-01-12

申请号：US16431642

申请日：2019-06-04

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Ferdinando Iucolano ,  Alessandro Chini

IPC: H01L29/778 ,  H01L29/66 ,  H01L29/06 ,  H01L21/02 ,  H01L29/20 ,  H01L29/205 ,  H01L29/40 ,  H01L29/417 ,  H01L29/423

Abstract: An HEMT device, comprising: a semiconductor body including a heterojunction structure; a dielectric layer on the semiconductor body; a gate electrode; a drain electrode, facing a first side of the gate electrode; and a source electrode, facing a second side opposite to the first side of the gate electrode; an auxiliary channel layer, which extends over the heterojunction structure between the gate electrode and the drain electrode, in electrical contact with the drain electrode and at a distance from the gate electrode, and forming an additional conductive path for charge carriers that flow between the source electrode and the drain electrode.

公开(公告)号：US10516041B2

公开(公告)日：2019-12-24

申请号：US16004257

申请日：2018-06-08

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Ferdinando Iucolano ,  Alessandro Chini

IPC: H01L29/778 ,  H01L29/20 ,  H01L29/423 ,  H01L29/08 ,  H01L29/417 ,  H01L29/66 ,  H01L29/10 ,  H01L29/207

Abstract: An HEMT includes a buffer layer, a hole-supply layer on the buffer layer, a heterostructure on the hole-supply layer, and a source electrode. The hole-supply layer is made of P-type doped semiconductor material, the buffer layer is doped with carbon, and the source electrode is in direct electrical contact with the hole-supply layer, such that the hole-supply layer can be biased to facilitate the transport of holes from the hole-supply layer to the buffer layer.

公开(公告)号：US10396192B2

公开(公告)日：2019-08-27

申请号：US16020807

申请日：2018-06-27

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Ferdinando Iucolano ,  Andrea Severino ,  Maria Concetta Nicotra ,  Alfonso Patti

IPC: H01L29/778 ,  H01L21/02 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/20 ,  H01L21/28 ,  H01L29/205

Abstract: A method for manufacturing a HEMT transistor comprising the steps of: providing a wafer comprising a semiconductor body including a heterojunction structure formed by semiconductor materials that include elements of Groups III-V of the Periodic Table, and a dielectric layer on the semiconductor body; etching selective portions of the wafer, thus exposing a portion of the heterojunction structure; forming an interface layer by a surface reconstruction process, of a semiconductor compound formed by elements of Groups III-V of the Periodic Table, in the exposed portion of the heterojunction structure; and forming a gate electrode, including a gate dielectric and a gate conductive region, on said interface layer.

公开(公告)号：US10381470B2

公开(公告)日：2019-08-13

申请号：US15393945

申请日：2016-12-29

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Ferdinando Iucolano ,  Alessandro Chini

IPC: H01L29/778 ,  H01L21/02 ,  H01L29/20 ,  H01L29/205 ,  H01L29/40 ,  H01L29/66 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423

Abstract: An HEMT device, comprising: a semiconductor body including a heterojunction structure; a dielectric layer on the semiconductor body; a gate electrode; a drain electrode, facing a first side of the gate electrode; and a source electrode, facing a second side opposite to the first side of the gate electrode; an auxiliary channel layer, which extends over the heterojunction structure between the gate electrode and the drain electrode, in electrical contact with the drain electrode and at a distance from the gate electrode, and forming an additional conductive path for charge carriers that flow between the source electrode and the drain electrode.

公开(公告)号：US20170345922A1

公开(公告)日：2017-11-30

申请号：US15393945

申请日：2016-12-29

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Ferdinando Iucolano ,  Alessandro Chini

IPC: H01L29/778 ,  H01L29/205 ,  H01L21/02 ,  H01L29/20 ,  H01L29/66 ,  H01L29/40

CPC classification number: H01L29/7787 ,  H01L21/02458 ,  H01L21/0254 ,  H01L29/0657 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/402 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42376 ,  H01L29/66462 ,  H01L29/66522 ,  H01L29/7786

Abstract: An HEMT device, comprising: a semiconductor body including a heterojunction structure; a dielectric layer on the semiconductor body; a gate electrode; a drain electrode, facing a first side of the gate electrode; and a source electrode, facing a second side opposite to the first side of the gate electrode; an auxiliary channel layer, which extends over the heterojunction structure between the gate electrode and the drain electrode, in electrical contact with the drain electrode and at a distance from the gate electrode, and forming an additional conductive path for charge carriers that flow between the source electrode and the drain electrode.

公开(公告)号：US20170148906A1

公开(公告)日：2017-05-25

申请号：US15159127

申请日：2016-05-19

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Ferdinando Iucolano ,  Alfonso Patti

IPC: H01L29/778 ,  H01L29/20 ,  H01L29/417 ,  H01L29/66 ,  H01L21/02 ,  H01L29/423 ,  H01L29/205

CPC classification number: H01L29/7787 ,  H01L21/0254 ,  H01L29/1045 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/66462 ,  H01L29/7786

Abstract: A normally-off electronic device, comprising: a semiconductor body including a heterostructure that extends over a buffer layer; a recessed-gate electrode, extending in a direction orthogonal to the plane; a first working electrode and a second working electrode at respective sides of the gate electrode; and an active area housing, in the on state, a conductive path for a flow of electric current between the first and second working electrodes. A resistive region extends at least in part in the active area that is in the buffer layer and is designed to inhibit the flow of current between the first and second working electrodes when the device is in the off state. The gate electrode extends in the semiconductor body to a depth at least equal to the maximum depth reached by the resistive region.

公开(公告)号：US20170141208A1

公开(公告)日：2017-05-18

申请号：US15159045

申请日：2016-05-19

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Ferdinando Iucolano ,  Alfonso Patti ,  Alessandro Chini

IPC: H01L29/66 ,  H01L29/205 ,  H01L29/423 ,  H01L29/778

Abstract: A HEMT transistor of the normally off type, including: a semiconductor heterostructure, which comprises at least one first layer and one second layer, the second layer being set on top of the first layer; a trench, which extends through the second layer and a portion of the first layer; a gate region of conductive material, which extends in the trench; and a dielectric region, which extends in the trench, coats the gate region, and contacts the semiconductor heterostructure. A part of the trench is delimited laterally by a lateral structure that forms at least one first step. The semiconductor heterostructure forms a first edge and a second edge of the first step, the first edge being formed by the first layer.