公开(公告)号：US20220352240A1

公开(公告)日：2022-11-03

申请号：US17561074

申请日：2021-12-23

Applicant: Samsung Display Co., LTD.

Inventor： Hyung Il JEON ,  Sung Kook PARK ,  Ki Seong SEO ,  So Yeon YOON ,  Joo Woan CHO

IPC: H01L27/15 ,  H01L33/38 ,  H01L33/50 ,  H01L33/60

Abstract: A display device includes a backplane line disposed on a substrate, a protective layer overlapping the backplane line, a first electrode disposed on the protective layer, a light emitting element electrically connected to the first electrode, and a reflective pattern including a reflective material and disposed between the substrate and the first electrode, the reflective pattern overlaps the backplane line in a plan view.

公开(公告)号：US20220005901A1

公开(公告)日：2022-01-06

申请号：US17348179

申请日：2021-06-15

Applicant: Samsung Display Co., Ltd.

Inventor： Tetsuhiro TANAKA ,  Jung Yub SEO ,  Ki Seong SEO ,  Yeong Gyu KIM ,  Hee Won YOON

IPC: H01L27/32 ,  H01L29/786

Abstract: A display device comprises a base substrate, a lower interlayer dielectric layer, an oxide semiconductor layer including a first channel region, a first drain region disposed on one side of the first channel region, and a first source region, a first gate insulating layer, a first upper gate electrode, an upper interlayer dielectric layer, and a first source electrode and a first drain electrode, wherein the lower interlayer dielectric layer includes a first lower interlayer dielectric layer disposed on the base substrate, and a second lower interlayer dielectric layer disposed on the first lower interlayer dielectric layer, wherein the first lower interlayer dielectric layer includes silicon nitride and the second lower interlayer dielectric layer comprises silicon oxide, and wherein a composition ratio of nitrogen to silicon in the first lower interlayer dielectric layer ranges from 0.8 to 0.89.

公开(公告)号：US20180175178A1

公开(公告)日：2018-06-21

申请号：US15895464

申请日：2018-02-13

Applicant: Samsung Display Co., Ltd.

Inventor： Jung Yun JO ,  Su Bin BAE ,  Ki Seong SEO

IPC: H01L29/66 ,  H01L29/786 ,  H01L29/45 ,  H01L29/417 ,  H01L21/4763 ,  H01L21/02

CPC classification number: H01L29/66969 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/47635 ,  H01L29/41733 ,  H01L29/45 ,  H01L29/78606 ,  H01L29/7869

Abstract: There is provided a method of manufacturing an oxide thin film transistor (TFT). The method includes forming a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, forming an oxide semiconductor layer including a channel layer on the gate insulating layer, forming a source electrode and a drain electrode separated from each other on the oxide semiconductor layer, first plasma processing the substrate on which the source electrode and the drain electrode are formed at a carbon (C) atmosphere, secondly plasma processing the substrate at a nitrogen oxide atmosphere, and sequentially forming a first protective layer and a second protective layer on the substrate.

公开(公告)号：US20170170209A1

公开(公告)日：2017-06-15

申请号：US15445650

申请日：2017-02-28

Applicant: Samsung Display Co., Ltd.

Inventor： Jung Yun JO ,  Ki Seong SEO ,  Eun Jeong CHO

IPC: H01L27/12 ,  H01L29/786

CPC classification number: H01L27/1222 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02667 ,  H01L21/02686 ,  H01L29/66757 ,  H01L29/78675

Abstract: A thin film transistor array panel according to an exemplary embodiment of the present invention includes: an insulating substrate; a polycrystal semiconductor layer formed on the insulating substrate; a buffer layer formed below the polycrystal semiconductor layer and containing fluorine; a gate electrode overlapping the polycrystal semiconductor layer; a source electrode and a drain electrode overlapping the polycrystal semiconductor layer and separated from each other; and a pixel electrode electrically connected to the drain electrode.