公开(公告)号：US5846859A

公开(公告)日：1998-12-08

申请号：US606193

申请日：1996-02-23

申请人： Sang-in Lee

发明人： Sang-in Lee

IPC分类号： H01L27/04 ,  H01L21/02 ,  H01L21/285 ,  H01L21/822 ,  H01L21/8242 ,  H01L27/108

CPC分类号： H01L27/10852 ,  H01L28/55 ,  H01L28/60 ,  H01L21/28568 ,  Y10S148/148

摘要： A capacitor in a semiconductor device having a dielectric film formed of high dielectric material and a manufacturing method therefor are provided. The capacitor consists of electrodes including a dielectric film and an amorphous SiC layer. Thus, the diffusion of oxygen atoms through a grain boundary into an underlayer and the formation of an oxide layer on the surface of the SiC layer can both be prevented, providing for a highly reliable capacitor electrode and an equivalent oxide thickness which is no thicker than required.

摘要翻译： 提供了具有由高介电材料形成的电介质膜的半导体器件中的电容器及其制造方法。 电容器由包括电介质膜和非晶SiC层的电极组成。 因此，可以防止氧原子通过晶界扩散到底层中，并且可以防止在SiC层的表面上形成氧化物层，从而提供高可靠性的电容器电极和等于不比厚度大的氧化物厚度 需要。

公开(公告)号：US5569961A

公开(公告)日：1996-10-29

申请号：US473050

申请日：1995-06-07

申请人： Sang-in Lee

发明人： Sang-in Lee

IPC分类号： H01L21/285 ,  H01L21/441 ,  H01L21/48 ,  H01L21/768 ,  H01L23/485 ,  H01L23/522 ,  H01L23/532 ,  H01L29/41 ,  H01L29/43

CPC分类号： H01L21/76838 ,  H01L21/76843 ,  H01L21/76856 ,  H01L21/76862 ,  H01L21/76876 ,  H01L21/76877 ,  H01L23/485 ,  H01L23/53223 ,  H01L2924/0002 ,  Y10S257/915

摘要： The invention relates to a wiring structure for a semiconductor device and a method for manufacturing the same, which fills up a contact hole of below one half micron. An insulating layer is formed on a semiconductor substrate, and a contact hole is formed in the insulating layer. On the insulating layer, a first metal is deposited via a CVD method to form a CVD metal layer or a CVD metal plug filling up the contact hole. Then, the thus-obtained CVD metal layer or the CVD metal plus is heat-treated in a vacuum at a high temperature below the melting point of the first metal, thereby planarizing the surface of the CVD metal layer. A second metal is deposited via a sputtering method on the CVD metal layer or on the CVD metal plug to thereby form a sputtered metal layer. The contact hole is filled up with the first metal by the CVD method and then a reliable sputtered metal layer is deposited via a sputtering method. The wiring layer can be used for semiconductor devices of the next generation.

摘要翻译： 本发明涉及一种用于半导体器件的布线结构及其制造方法，其填充低于一半微米的接触孔。 在半导体衬底上形成绝缘层，并在绝缘层中形成接触孔。 在绝缘层上，通过CVD法沉积第一金属，以形成填充接触孔的CVD金属层或CVD金属塞。 然后，将如此获得的CVD金属层或CVD金属加热件在低于第一金属熔点的高温下在真空中进行热处理，由此使CVD金属层的表面平坦化。 通过溅射法在CVD金属层或CVD金属插塞上沉积第二种金属，从而形成溅射金属层。 通过CVD法将接触孔填充第一金属，然后通过溅射法沉积可靠的溅射金属层。 布线层可用于下一代的半导体器件。

公开(公告)号：US07304253B2

公开(公告)日：2007-12-04

申请号：US10983590

申请日：2004-11-09

申请人： Sang-in Lee

发明人： Sang-in Lee

IPC分类号： H01H3/00

CPC分类号： H01H25/041

摘要： A switching device of an image recording and replaying apparatus, having: a frame with a button sheet having a guide boss opening positioned in a center of the button sheet and operation boss openings positioned around the guide boss opening, pairs of the operation boss openings being oppositely disposed with respect to the guide boss opening; a switchboard placed on a first side of the frame and having tact switches facing respective operation boss openings; an integrated button disposed to be elastically biased toward a second side of the frame opposite the first side, and having a guide boss inserted into the guide boss opening and operation bosses inserted into respective operation boss openings; and a fixation holder disposed on the guide boss to fix the integrated button to the frame, such that the operation bosses continuously contact with corresponding tact switches.

摘要翻译： 一种图像记录和重放装置的切换装置，具有：具有按钮片的框架，其具有位于按钮片的中心的引导凸起开口和位于引导凸起开口周围的操作凸起开口，成对的操作凸起开口为 相对于导向凸起开口相对设置; 布置在所述框架的第一侧上并且具有面向相应的操作凸起开口的触觉开关的开关板; 集成按钮，被设置为朝向与第一侧相对的框架的第二侧弹性偏置，并且具有插入到引导凸台开口中的引导凸起和插入到相应的操作凸起开口中的操作凸起; 以及设置在所述引导凸台上以将所述集成按钮固定到所述框架的固定架，使得所述操作凸台与相应的轻触开关持续接触。

公开(公告)号：US06376355B1

公开(公告)日：2002-04-23

申请号：US09136798

申请日：1998-08-19

申请人： Mee-young Yoon ,  Sang-in Lee

发明人： Mee-young Yoon ,  Sang-in Lee

IPC分类号： H01L214763

CPC分类号： H01L21/76856 ,  H01L21/76829 ,  H01L21/76843 ,  H01L21/76876 ,  H01L21/76879

摘要： A method for forming a metal interconnection filing a contact hole or a groove having a high aspect ratio. An interdielectric layer pattern having a recessed region corresponding to the contact hole or the groove is formed on a semiconductor substrate, and a barrier metal layer is formed on the entire surface of the resultant structure where the interdielectric layer pattern is formed. An anti-nucleation layer is selectively formed only on the non-recessed region of the barrier metal layer, thereby exposing the barrier metal layer formed on the sidewalls and the bottom of the recessed region. Subsequently, a metal plug is selectively formed in the recessed region, surrounded by the barrier metal layer, thereby forming a metal interconnection for completely filling the contact hole or the groove having a high aspect ratio. A metal liner may be formed instead of the metal plug, followed by forming a metal layer filling the region surrounded by the metal liner, thereby forming metal interconnection for completely filling the contact hole or groove having a high aspect ratio.

摘要翻译： 一种形成具有高纵横比的接触孔或凹槽的金属互连的方法。 在半导体衬底上形成具有与接触孔或凹槽相对应的凹入区域的电介质层图案，并且在形成介电层图案的所得结构的整个表面上形成阻挡金属层。 仅在阻挡金属层的非凹部区域选择性地形成防结晶层，从而露出形成在凹陷区域的侧壁和底部的阻挡金属层。 随后，在由阻挡金属层包围的凹陷区域中选择性地形成金属插塞，从而形成用于完全填充接触孔或具有高纵横比的沟槽的金属互连。 可以形成金属衬垫代替金属插塞，随后形成填充由金属衬垫包围的区域的金属层，从而形成用于完全填充具有高纵横比的接触孔或槽的金属互连。

公开(公告)号：US06211082B1

公开(公告)日：2001-04-03

申请号：US09021462

申请日：1998-02-10

申请人： Bong-young Yoo ,  Byung-Lyul Park ,  Dae-hong Ko ,  Sang-in Lee

发明人： Bong-young Yoo ,  Byung-Lyul Park ,  Dae-hong Ko ,  Sang-in Lee

IPC分类号： H01L2144

CPC分类号： C23C16/08 ,  H01L21/28568

摘要： A tungsten or other metal layer is chemical vapor deposited using a source gas containing tungsten, a reducing gas and a nitrogen-containing gas. The nitrogen-containing gas can act as a surface roughness reducing gas that reduces the roughness of the tungsten layer compared to a tungsten layer that is chemical vapor deposited using the source gas containing tungsten and the reducing gas, but without using the surface roughness reducing gas. Viewed in another way, the nitrogen-containing gas acts as a growth rate controlling gas that produces uniform growth of the tungsten layer in a plurality of directions compared to a tungsten layer that is deposited using the source gas containing tungsten and the reducing gas, but without using the growth rate controlling gas.

摘要翻译： 使用含有钨，还原气体和含氮气体的源气体化学气相沉积钨或其它金属层。 与使用含有钨和还原气体的源气体进行化学气相沉积的钨层相比，含氮气体可以用作表面粗糙度降低气体，其降低钨层的粗糙度，但不使用表面粗糙度还原气体 。 以另一种方式看，与使用含钨和还原气体的源气体沉积的钨层相比，含氮气体充当生长速率控制气体，其产生钨层在多个方向上的均匀生长，但是 而不用生长速率控制气体。

公开(公告)号：US6001683A

公开(公告)日：1999-12-14

申请号：US655122

申请日：1996-05-28

申请人： Sang-in Lee

发明人： Sang-in Lee

IPC分类号： H01L21/768 ,  H01L21/28 ,  H01L21/8239 ,  H01L21/8242 ,  H01L27/108

CPC分类号： H01L27/10873 ,  H01L27/1052

摘要： A method of forming an interconnection by using a landing pad is disclosed. In a semiconductor device having a memory cell portion and a peripheral circuit portion, a refractory metal is used for the bitline instead of the usual polycide, to concurrently form a contact on each active region of an N-type and a P-type, then a landing pad is formed on the peripheral circuit portion when a bitline is formed on the memory cell portion. In such a process, a substantial contact hole for the interconnection is formed on the landing pad so that an aspect ratio of the contact can be lowered. Accordingly, when forming a metal interconnection, the contact hole for the interconnection is easily filled by Al reflow so that the coverage-step of the metal being depositing in the contact hole for the interconnection is enhanced, the contact resistance is reduced. Further, the reliability of the semiconductor device is improved.

摘要翻译： 公开了一种通过使用着陆垫形成互连的方法。 在具有存储单元部分和外围电路部分的半导体器件中，难题金属用于位线而不是通常的多晶硅化物，以在N型和P型的每个有源区上同时形成接触，然后 当在存储单元部分上形成位线时，在外围电路部分上形成一个着陆焊盘。 在这种过程中，用于互连的实质接触孔形成在着陆焊盘上，使得可以降低接触的纵横比。 因此，当形成金属互连时，通过Al回流容易地填充用于互连的接触孔，使得在用于互连的接触孔中沉积的金属的覆盖阶梯增强，接触电阻降低。 此外，提高了半导体器件的可靠性。

公开(公告)号：US5843842A

公开(公告)日：1998-12-01

申请号：US697880

申请日：1996-09-03

申请人： Sang-in Lee ,  Jeong-in Hong ,  Jong-ho Park

发明人： Sang-in Lee ,  Jeong-in Hong ,  Jong-ho Park

IPC分类号： H01L23/52 ,  H01L21/027 ,  H01L21/285 ,  H01L21/3205 ,  H01L21/768 ,  H01L23/485 ,  H01L23/522 ,  H01L23/532 ,  H01L21/441

CPC分类号： H01L21/76843 ,  H01L21/0276 ,  H01L21/28512 ,  H01L21/76855 ,  H01L21/76858 ,  H01L21/76864 ,  H01L21/76877 ,  H01L21/76879 ,  H01L23/485 ,  H01L23/53223 ,  H01L23/53271 ,  H01L2924/0002

摘要： A wiring layer of a semiconductor device having a novel contact structure is disclosed. The semiconductor device includes a semiconductor substrate, an insulating layer having an opening (contact hole) and a first conductive layer formed on the insulating layer which completely fills the opening. The first conductive layer does not produce any Si precipitates in a subsequent heat-treating step for filling the opening with the first conductive layer material. The semiconductor device may further include a second conductive layer having a planarized surface on the first conductive layer. This improves subsequent photolithography. An anti-reflective layer may be formed on the second conductive layer for preventing an unwanted reflection during a photo lithography process. The semiconductor device preferably includes a diffusion barrier layer under the first conductive layer and on the semiconductor substrate, on the insulating layer, and on the inner surface of the opening which prevents a reaction between the first conductive layer and the semiconductor substrate or the insulating layer. A method for forming the wiring layer is also disclosed. Providing a semiconductor device with the wiring layer reduces the leakage current by preventing Al spiking. Since the first conductive layer undergoes a heat-treatment step at a temperature below the melting point, while flowing into the opening and completely filling it with the first conductive layer material, no void is formed in the opening. Good semiconductor device reliability is ensured in spite of the contact hole being less than 1 .mu.m in size and having an aspect ratio greater than 1.0.

摘要翻译： 公开了具有新型接触结构的半导体器件的布线层。 半导体器件包括半导体衬底，具有开口（接触孔）的绝缘层和形成在绝缘层上的完全填充开口的第一导电层。 在随后的用第一导电层材料填充开口的热处理步骤中，第一导电层不产生任何Si沉淀物。 半导体器件还可以包括在第一导电层上具有平坦化表面的第二导电层。 这改善了随后的光刻。 可以在第二导电层上形成抗反射层，以防止在光刻工艺期间不期望的反射。 半导体器件优选地包括在第一导电层下方，半导体衬底上的绝缘层上的扩散阻挡层，以及防止第一导电层与半导体衬底或绝缘层之间的反应的开口内表面 。 还公开了一种用于形成布线层的方法。 提供具有布线层的半导体器件通过防止Al尖峰来减少漏电流。 由于第一导电层在低于熔点的温度下经历热处理步骤，同时流入开口并用第一导电层材料完全填充，因此在开口中不形成空隙。 尽管接触孔的尺寸小于1μm，并且纵横比大于1.0，确保良好的半导体器件的可靠性。

公开(公告)号：US5665659A

公开(公告)日：1997-09-09

申请号：US257420

申请日：1994-06-09

申请人： Sang-in Lee ,  Gil-heyun Choi ,  Young-soo Jeon

发明人： Sang-in Lee ,  Gil-heyun Choi ,  Young-soo Jeon

IPC分类号： H01L21/28 ,  C23C14/04 ,  C23C14/58 ,  H01L21/285 ,  H01L21/321 ,  H01L21/768 ,  C23C14/34 ,  H01L21/324 ,  H01L21/44

CPC分类号： C23C14/5806 ,  C23C14/046 ,  H01L21/28512 ,  H01L21/321 ,  H01L21/76843 ,  H01L21/76856 ,  H01L21/76864 ,  H01L21/76877

摘要： A method for forming a metal layer including the steps of heat treating a semiconductor substrate for a predetermined time at an intermediate temperature between 200.degree. C. and 400.degree. C., then depositing the metal layer on the semiconductor substrate at a temperature below 200.degree. C., in a vacuum, then thermally treating the metal layer at a temperature between 0.6 Tm-1.0 Tm (where Tm is the melting point of the metal layer), without breaking the vacuum, thereby reflowing the grains of the metal layer, and then gradually cooling the metal layer. Alternatively, the intermediate heat-treatment step can be performed after the metal layer is thermally treated, in which case, the metal layer should thereafter be rapidly cooled.

摘要翻译： 一种用于形成金属层的方法，包括以下步骤：在200℃至400℃的中间温度下将半导体衬底热处理预定时间，然后在低于200℃的温度下将金属层沉积在半导体衬底上 在真空中，然后在0.6Tm -1.0Tm（其中Tm是金属层的熔点）的温度下对金属层进行热处理，而不破坏真空，从而回流金属层的晶粒，以及 然后逐渐冷却金属层。 或者，中间热处理步骤可以在金属层被热处理之后进行，在这种情况下，金属层此后应该被快速冷却。

公开(公告)号：US5567987A

公开(公告)日：1996-10-22

申请号：US480975

申请日：1995-06-07

申请人： Sang-in Lee

发明人： Sang-in Lee

IPC分类号： H01L21/285 ,  H01L21/441 ,  H01L21/48 ,  H01L21/768 ,  H01L23/485 ,  H01L23/522 ,  H01L23/532 ,  H01L29/43

CPC分类号： H01L21/76838 ,  H01L21/76843 ,  H01L21/76856 ,  H01L21/76862 ,  H01L21/76876 ,  H01L21/76877 ,  H01L23/485 ,  H01L23/53223 ,  H01L2924/0002 ,  Y10S257/915

摘要： The invention relates to a wiring structure for a semiconductor device and a method for manufacturing the same, which fills up a contact hole of below one half micron. An insulating layer is formed on a semiconductor substrate, and a contact hole is formed in the insulating layer. On the insulating layer, a first metal is deposited via a CVD method to form a CVD metal layer or a CVD metal plug filling up the contact hole. Then, the thus-obtained CVD metal layer or the CVD metal plug is heat-treated in a vacuum at a high temperature below the melting point of the first metal, thereby planarizing the surface of the CVD metal layer. A second metal is deposited via a sputtering method on the CVD metal layer or on the CVD metal plug to thereby form a sputtered metal layer. The contact hole is filled up with the first metal by the CVD method and then a reliable sputtered metal layer is deposited via a sputtering method. The wiring layer can be used for semiconductor devices of the next generation.

摘要翻译： 本发明涉及一种用于半导体器件的布线结构及其制造方法，其填充低于一半微米的接触孔。 在半导体衬底上形成绝缘层，并在绝缘层中形成接触孔。 在绝缘层上，通过CVD法沉积第一金属，以形成填充接触孔的CVD金属层或CVD金属塞。 然后，将如此获得的CVD金属层或CVD金属插塞在低于第一金属的熔点的高温下在真空中进行热处理，由此平坦化CVD金属层的表面。 通过溅射法在CVD金属层或CVD金属插塞上沉积第二种金属，从而形成溅射金属层。 通过CVD法将接触孔填充第一金属，然后通过溅射法沉积可靠的溅射金属层。 布线层可用于下一代的半导体器件。

公开(公告)号：US5552341A

公开(公告)日：1996-09-03

申请号：US164920

申请日：1993-12-10

申请人： Sang-in Lee

发明人： Sang-in Lee

IPC分类号： H01L21/28 ,  C23C14/06 ,  C23C14/24 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532 ,  H01L21/441

CPC分类号： H01L21/76856 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76877 ,  H01L21/76882 ,  H01L23/532 ,  H01L2924/0002 ,  Y10S257/915

摘要： A semiconductor device and manufacturing method thereof having a diffusion barrier layer formed on a semiconductor wafer. The diffusion barrier layer has a surface region provided with a silylation layer which is formed on the diffusion barrier layer by a plasma process using silicon hydride or by a reactive sputtering method using SiH.sub.4. When a metal layer is formed on the silylation layer, the wettability between the diffusion barrier layer and the metal is enhanced and large grains are formed, thereby increasing the step coverage for the contact hole of the metal layer or for the via hole. Additionally, when heat treatment is performed after the metal layer is formed on the silylation layer, the reflow characteristic of the metal layer becomes good, to thereby facilitate the filling of the contact hole or the via hole. When the wiring layer is thus formed, metal wiring having good reliability can be obtained and a subsequent scintering process is rendered unnecessary.

摘要翻译： 一种在半导体晶片上形成扩散阻挡层的半导体器件及其制造方法。 扩散阻挡层具有通过使用氢化硅的等离子体处理或通过使用SiH 4的反应溅射法形成在扩散阻挡层上的甲硅烷基层的表面区域。 当在甲硅烷基层上形成金属层时，扩散阻挡层和金属之间的润湿性增强，并且形成大的晶粒，从而增加金属层或通孔的接触孔的阶梯覆盖。 此外，当在甲硅烷基层上形成金属层之后进行热处理时，金属层的回流特性变好，从而有助于填充接触孔或通孔。 当这样形成布线层时，可以获得具有良好可靠性的金属布线，并且不需要随后的烧结处理。