公开(公告)号：US20150366060A1

公开(公告)日：2015-12-17

申请号：US14453952

申请日：2014-08-07

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Shao-tzu Tang ,  Ying-Chou Tsai

IPC: H05K1/11 ,  H05K3/40

CPC classification number: H05K3/0014 ,  H05K1/116 ,  H05K2201/09118 ,  H05K2201/09545 ,  H05K2201/09563 ,  Y10T29/49167

Abstract: A circuit structure is provided, which includes a plurality of conductive posts, and a plurality of first and second conductive pads formed on two opposite end surfaces of the conductive posts, respectively. A length of each of the first conductive pads is greater than a width of the first conductive pad so as to reduce an occupation area of the first conductive pad along the width and increase a distance between adjacent first conductive pads, thereby increasing the wiring density and meeting the wiring demand.

Abstract translation: 提供了一种电路结构，其包括多个导电柱，以及分别形成在导电柱的两个相对端表面上的多个第一和第二导电垫。 每个第一导电焊盘的长度大于第一导电焊盘的宽度，以便沿着宽度减小第一导电焊盘的占用面积并且增加相邻的第一导电焊盘之间的距离，由此增加布线密度和 满足布线需求。

公开(公告)号：US08810045B2

公开(公告)日：2014-08-19

申请号：US13644561

申请日：2012-10-04

Applicant: Siliconware Precision Industries Co., Ltd.

Inventor： Chi-Ching Ho ,  Yu-Chih Yu ,  Ying-Chou Tsai

IPC: H01L23/28

CPC classification number: H01L21/48 ,  H01L21/4825 ,  H01L21/4828 ,  H01L21/486 ,  H01L21/4875 ,  H01L21/56 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/49827 ,  H01L23/49861 ,  H01L24/83 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/00014

Abstract: A packaging substrate and a semiconductor package each include: a metal board having a first surface and a second surface opposite to the first surface, wherein the first surface has a plurality of first openings for defining a first core circuit layer therebetween, the second surface has a plurality of second openings for defining a second core circuit layer therebetween, each of the first and second openings has a wide outer portion and a narrow inner portion, and the inner portion of each of the second openings is in communication with the inner portion of a corresponding one of the first openings; a first encapsulant formed in the first openings; a second encapsulant formed in the second openings; and a surface circuit layer formed on the first encapsulant and the first core circuit layer.

Abstract translation: 封装基板和半导体封装均包括：具有第一表面和与第一表面相对的第二表面的金属板，其中第一表面具有多个用于在其间限定第一芯电路层的第一开口，第二表面具有 用于在其间限定第二芯电路层的多个第二开口，所述第一开口和所述第二开口中的每一个具有宽的外部部分和窄的内部部分，并且每个所述第二开口的内部部分与所述第二开口的内部部分连通 第一开口中的对应的一个; 形成在第一开口中的第一密封剂; 形成在第二开口中的第二密封剂; 以及形成在第一密封剂和第一芯电路层上的表面电路层。

公开(公告)号：US20130334694A1

公开(公告)日：2013-12-19

申请号：US13644561

申请日：2012-10-04

Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.

Inventor： Chi-Ching Ho ,  Yu-Chih Yu ,  Ying-Chou Tsai

IPC: H05K1/02 ,  B05D3/00 ,  B05D5/12 ,  H01L23/14 ,  H01L21/56

CPC classification number: H01L21/48 ,  H01L21/4825 ,  H01L21/4828 ,  H01L21/486 ,  H01L21/4875 ,  H01L21/56 ,  H01L21/561 ,  H01L23/3128 ,  H01L23/49827 ,  H01L23/49861 ,  H01L24/83 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2924/00014

Abstract: A packaging substrate is provided, including: a metal board having a first surface and a second surface opposite to the first surface, wherein the first surface has a plurality of first openings for defining a first core circuit layer therebetween, the second surface has a plurality of second openings for defining a second core circuit layer therebetween, each of the first and second openings has a wide outer portion and a narrow inner portion, and the inner portion of each of the second openings is in communication with the inner portion of a corresponding one of the first openings; a first encapsulant formed in the first openings; a second encapsulant formed in the second openings; and a surface circuit layer formed on the first encapsulant and the first core circuit layer. The present invention effectively reduces the fabrication cost and increases the product reliability.

Abstract translation: 提供了一种包装衬底，包括：具有第一表面和与第一表面相对的第二表面的金属板，其中第一表面具有多个用于在其间限定第一芯电路层的第一开口，第二表面具有多个 的用于在其间限定第二芯电路层的第二开口，第一和第二开口中的每一个具有宽的外部部分和窄的内部部分，并且每个第二开口的内部部分与相应的第二开口的内部部分连通 第一个开口之一; 形成在第一开口中的第一密封剂; 形成在第二开口中的第二密封剂; 以及形成在所述第一密封剂和所述第一芯电路层上的表面电路层。 本发明有效地降低了制造成本，提高了产品的可靠性。