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公开(公告)号：US20240341034A1
公开(公告)日：2024-10-10
申请号：US18623091
申请日：2024-04-01
Applicant: IBIDEN CO., LTD.
Inventor： Masashi KUWABARA , Susumu KAGOHASHI
CPC classification number: H05K1/116 , H05K1/0242 , H05K1/09 , H05K3/002 , H05K3/0035 , H05K3/0041 , H05K3/108 , H05K3/423 , H05K1/0306 , H05K1/0373 , H05K2201/0209 , H05K2201/0338 , H05K2201/096 , H05K2203/0723
Abstract: A wiring substrate includes a core substrate having a through-hole conductor, a resin insulating layer formed on the core substrate, a conductor layer formed on the insulating layer and including a seed layer and an electrolytic plating layer, and a via conductor formed in the insulating layer. The via conductor electrically connects the through-hole conductor and conductor layer. The via conductor includes the seed layer and electrolytic plating layer extending from the conductor layer. The core substrate includes a glass substrate and has a through hole penetrating through the glass substrate. The through-hole conductor is formed in the through hole. The seed layer is covering inner wall surface of the insulating layer in opening in which the via conductor is formed. The seed layer has a first portion and a second portion electrically connected to the first portion. That part of the first portion is formed on the second portion.
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公开(公告)号：US12114425B2
公开(公告)日：2024-10-08
申请号：US17942442
申请日：2022-09-12
Applicant: Huawei Technologies Co., Ltd.
Inventor： Guodong Zhang , Chong Chen , Jian Zhang , Shaoyong Xiang , Zhijun Qu , Changxing Sun
CPC classification number: H05K1/116 , H05K1/184 , H05K2201/09509 , H05K2201/10901
Abstract: A signal transmission structure includes a circuit board, a chip, and a cable assembly. The chip is assembled on one side of the circuit board, and the cable assembly is assembled on the other side of the circuit board. The cable assembly includes a cable, and the circuit board includes a plurality of conductive holes. The chip is electrically connected to the cable of the cable assembly using the conductive hole to transmit a signal of the chip using the cable.
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公开(公告)号：US20240329090A1
公开(公告)日：2024-10-03
申请号：US18526390
申请日：2023-12-01
Applicant: Schneider Electric USA, Inc.
CPC classification number: G01R15/181 , G01R19/2513 , H05K1/0216 , H05K1/116 , G01R31/52 , H05K2201/09227 , H05K2201/09236 , H05K2201/10151
Abstract: A system and method are provided for energy monitoring. The system and method include a trace current sensor formed on a first printed circuit board (PCB) substrate around at an opening of the first PCB substrate. The opening is configured to receive a portion of an electrical conductor to be monitored by the sensor. The system and method also include a signal conditioner for conditioning an output signal from the sensor. The output signal corresponds to a measurement of current on the conductor. The system and method can further include a processor(s) for measuring energy usage of load(s) connected to the conductor based on the current measurement. The signal conditioner and/or the processor(s) are either on the first PCB substrate or on a separate second PCB substrate which is connected to the first PCB substrate across a flexible connector.
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公开(公告)号：US20240306299A1
公开(公告)日：2024-09-12
申请号：US18595674
申请日：2024-03-05
Applicant: IBIDEN CO., LTD.
Inventor： Toshiki FURUTANI , Kyohei YOSHIKAWA , Takuya INISHI , Jun SAKAI
CPC classification number: H05K1/116 , H05K1/0306 , H05K3/181 , H05K3/16 , H05K2201/032 , H05K2201/09536
Abstract: A wiring substrate includes a core substrate including a through-hole conductor, a resin insulating layer formed on the core substrate, a conductor layer formed on a surface of the resin insulating layer and including a seed layer and an electrolytic plating layer formed on the seed layer, and a via conductor formed in the resin insulating layer such that the via conductor is connected to the through-hole conductor in the core substrate and includes the seed layer and electrolytic plating layer extending from the conductor layer. The core substrate includes a glass substrate such that the through-hole conductor is formed in a through hole penetrating through the glass substrate, and the conductor layer and via conductor are formed such that the seed layer is formed by sputtering and includes an alloy including copper, aluminum, and one or more metals selected from nickel, zinc, gallium, silicon, and magnesium.
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公开(公告)号：US12063737B2
公开(公告)日：2024-08-13
申请号：US17921778
申请日：2021-04-26
Applicant: LG INNOTEK CO., LTD.
Inventor： Hae Sik Kim , Jee Heum Paik
CPC classification number: H05K1/0296 , H04N23/687 , H05K1/116 , H05K2201/0939 , H05K2201/09618 , H05K2201/10151 , H05K2201/10287
Abstract: A circuit board according to an embodiment includes an insulating layer; and a lead pattern portion disposed on the insulating layer, wherein the lead pattern portion includes: a first portion disposed on the insulating layer; and a second portion extending from one end of the first portion; wherein the first portion is disposed overlapping the insulating layer in a vertical direction, wherein the second portion is disposed in an outer region of the insulating layer and does not overlap the insulating layer; and wherein the lead pattern portion has a centerline average roughness in a range of 0.05 μm to 0.5 μm or a 10-point average roughness in a range of 1.0 μm to 5.0 μm.
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Patent Agency Ranking
公开(公告)号：US20240268017A1
公开(公告)日：2024-08-08
申请号：US18407621
申请日：2024-01-09
Applicant: DONGWOO FINE-CHEM CO., LTD.
Inventor： KI HUN SUNG , DAE KYU KIM , HEE JUN PARK , SUNG JOON HONG
CPC classification number: H05K1/0224 , H05K1/116
Abstract: A circuit board includes a core layer, a first via structure penetrating the core layer, a circuit wiring disposed on one surface of the core layer and including a head portion in contact with the first via structure, a connection portion extending from the head portion and an extension portion electrically connected to the head portion through the connection portion, and a first ground pattern disposed on the one surface of the core layer and disposed around the circuit wiring to be spaced apart from the circuit wiring. A shortest distance between the extension portion and the first ground pattern is greater than a shortest distance between the head portion and the first ground pattern.
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公开(公告)号：US20240237194A9
公开(公告)日：2024-07-11
申请号：US18041767
申请日：2022-08-26
Applicant: Honor Device Co., Ltd.
Inventor： Junjie Yang , Erliang Li , Jian Bai , Xiaohang Li
CPC classification number: H05K1/0268 , H05K1/116 , H05K3/3485 , H05K9/0024 , H05K2201/035
Abstract: This application discloses a circuit board and a manufacturing method thereof, and a terminal device, and relates to the technical field of terminals, to resolve the problem of low reliability of connection between a radio frequency front-end circuit and a radio frequency back-end circuit in a circuit board of a terminal device in a related technology. The circuit board includes a substrate and a liquid metal body, where the substrate is provided with a radio frequency front-end circuit, a radio frequency back-end circuit, and a pad group, where the pad group includes a first pad electrically connected to the radio frequency front-end circuit and a second pad electrically connected to the radio frequency back-end circuit, and the second pad is spaced apart from the first pad; and the liquid metal body is arranged at a position of the pad group and connects the first pad to the second pad, so as to electrically connect the radio frequency front-end circuit to the radio frequency back-end circuit. This application may be applied to a terminal device such as a mobile phone.
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公开(公告)号：US20240188216A1
公开(公告)日：2024-06-06
申请号：US18285910
申请日：2022-02-14
Applicant: FICT LIMITED
Inventor： Kenji Iida , Norikazu Ozaki , Taiji Sakai , Takashi Nakagawa , Kenji Takano
CPC classification number: H05K1/116 , H05K3/382 , H05K3/4652 , H05K3/4682 , H05K2201/09509 , H05K2201/096
Abstract: The present invention addresses the problem of providing a circuit board for which the manufacturing process is short and which has a laminate surface having uniform flatness. As a solution to the problem, this method for manufacturing a circuit board includes: manufacturing a three-layer metal (58) having, on one surface thereof, a first metal layer (26) formed in a pattern shape; manufacturing unit structures (60) each having the first metal layer (26), a cured first insulating base material (22) filled with a cured first conductive paste (32), a second metal layer (28), and a semi-cured second insulating base material (24) filled with a semi-cured second conductive paste (36); joining together the first insulating base material (22) in one unit structure (60) among a plurality of the unit structures with the second insulating base material (24) in another unit structure (60); and layering the plurality of unit structures (60).
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公开(公告)号：US12004287B2
公开(公告)日：2024-06-04
申请号：US17789276
申请日：2020-02-06
Applicant: Telefonaktiebolaget LM Ericsson (publ)
Inventor： Pinghua Duan , Lei Zhang , Zhan Ying
CPC classification number: H05K1/0206 , H05K1/116 , H05K2201/10242
Abstract: The present disclosure provides a printed circuit board with a plated through hole. The through hole covered by a solder pad at both ends of the through hole. At least two pins are plugged into the through hole, one of which with its head end being thermal contacted with one of the solder pads. Another pin's head end being thermal contacted with the other solder pad. The at least two pins are thermal contacted with one another. Thermal dissipation rate is increased with the structure of the through hole.
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公开(公告)号：US20240107685A1
公开(公告)日：2024-03-28
申请号：US18475288
申请日：2023-09-27
Applicant: IBIDEN CO., LTD.
Inventor： Susumu KAGOHASHI , Jun SAKAI , Kyohei YOSHIKAWA , Takuya INISHI
CPC classification number: H05K3/4688 , H05K1/0306 , H05K1/0313 , H05K1/116 , H05K3/062 , H05K3/16 , H05K3/4608 , H05K2201/0209 , H05K2201/0212 , H05K2201/0338 , H05K2203/0369
Abstract: A printed wiring board includes a first conductor layer, a resin insulating layer having an opening, a second conductor layer including a seed layer and an electrolytic plating layer formed on the seed layer, and a via conductor including the seed layer and the electrolytic plating layer and connecting the first conductor and second conductor layers. The seed layer has a first portion on the surface of the insulating layer, a second portion on an inner wall surface in the opening of the insulating layer, and a third portion on a portion of the first conductor layer exposed by the opening of the insulating layer such that the first portion is thicker than the second portion and the third portion, the second portion has a first film and a second film electrically connected to the first film, and a portion of the first film is formed on the second film.
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