公开(公告)号：US20130082964A1

公开(公告)日：2013-04-04

申请号：US13633420

申请日：2012-10-02

申请人： Masafumi AGARI ,  Naoki Nakagawa ,  Takeshi Ono ,  Seiichiro Mori ,  Takashi Miyayama ,  Takuji Imamura ,  Tatsuya Nakamura

发明人： Masafumi AGARI ,  Naoki Nakagawa ,  Takeshi Ono ,  Seiichiro Mori ,  Takashi Miyayama ,  Takuji Imamura ,  Tatsuya Nakamura

IPC分类号： G06F3/041

CPC分类号： G06F3/044

摘要： A touch screen includes a base substrate, a bundle of rectangular wirings in a column direction including a plurality of detection column wirings that are electrically connected in common, and a bundle of rectangular wirings in a row direction including a plurality of detection row wirings that are electrically connected in common, the bundle of wirings being formed on the base substrate. Also, a plurality of block areas obtained by dividing an intersection area in which the bundle of wirings in the column direction and the bundle of wirings in the row direction intersect in a plan view are defined, and only the detection column wiring or only the detection row wiring is provided in each of the block areas.

摘要翻译： 触摸屏包括基底，在列方向上包括多个共同电连接的检测列布线的一束矩形布线，以及包括多个检测列布线的行方向的一束矩形布线， 电连接在一起，所述布线束形成在基底基板上。 此外，通过划分其中列方向上的布线束和行方向上的布线束在平面图中相交的交叉区域而获得的多个块区域，并且仅检测列布线或仅检测 在每个块区域中设置行布线。

公开(公告)号：US07847295B2

公开(公告)日：2010-12-07

申请号：US12026794

申请日：2008-02-06

申请人： Hitoshi Nagata ,  Naoki Nakagawa

发明人： Hitoshi Nagata ,  Naoki Nakagawa

IPC分类号： H01L27/14

CPC分类号： H01L29/78606 ,  H01L27/1248 ,  H01L29/66765

摘要： A thin film transistor includes a gate electrode, a gate insulating film formed to cover the gate electrode, a semiconductor layer including a channel region formed over the gate electrode, a source electrode and a drain electrode including a region connected to the semiconductor layer, where at least a part of the region is overlapped with the gate electrode, an upper insulating film formed to cover the semiconductor layer, the source electrode and the drain electrode, where the upper insulating film is directly in contact with the channel region of the semiconductor layer and discharges moisture by a heat treatment and a second upper insulating film formed to cover the first protective film and suppress moisture out-diffusion.

摘要翻译： 薄膜晶体管包括栅电极，形成为覆盖栅电极的栅绝缘膜，包括形成在栅电极上的沟道区的半导体层，源电极和漏电极，其包括连接到半导体层的区域，其中 所述区域的至少一部分与所述栅电极重叠，形成为覆盖所述半导体层，所述源电极和漏电极的上绝缘膜，所述上绝缘膜与所述半导体层的沟道区域直接接触 并通过热处理进行水分排出和形成为覆盖第一保护膜的第二上部绝缘膜，并抑制水分向外扩散。

公开(公告)号：US20100295256A1

公开(公告)日：2010-11-25

申请号：US12863652

申请日：2009-01-08

申请人： Tatsuo Nakajima ,  Naoki Nakagawa ,  Seiji Katayama ,  Yousuke Kawahito

发明人： Tatsuo Nakajima ,  Naoki Nakagawa ,  Seiji Katayama ,  Yousuke Kawahito

IPC分类号： F16J15/52 ,  B32B37/06

CPC分类号： F16D3/845 ,  F16D3/223 ,  F16D3/227 ,  F16D2003/22316 ,  F16D2250/00 ,  F16D2300/12 ,  F16J3/042

摘要： Provided is a mounting structure for a boot for a constant velocity universal joint, which is capable of ensuring a stable sealing performance at low cost. The resin boot (1) for the constant velocity universal joint includes a smaller-diameter end portion (2) and a larger-diameter end portion (3), each of which has a cylindrical shape. The smaller-diameter end portion (2) of the boot (1) is fixed to a shaft (17) constituting an inner member, and the larger-diameter end portion (3) is fixed to an outer joint member (11) serving as an outer member. An inner peripheral surface of the smaller-diameter end portion (2) of the boot (1) is integrally bonded to an outer peripheral surface of a boot-mounting portion (18) of the shaft (17) in an abutting state due to a physical interaction between a resin constituting the boot (1) and a metal constituting the shaft (17). Further, an inner peripheral surface of the larger-diameter end portion (3) of the boot (1) is integrally bonded to an outer peripheral surface of a boot-mounting portion (19) of the outer joint member (11) in an abutting state due to the physical interaction between the resin constituting the boot (1) and the metal constituting the outer joint member (11).

摘要翻译： 本发明提供一种用于等速万向接头的保护罩的安装结构，其能够以低成本确保稳定的密封性能。 用于等速万向接头的树脂罩（1）包括小直径端部（2）和较大直径的端部（3），每个都具有圆柱形形状。 靴子（1）的小直径端部（2）固定在构成内部构件的轴（17）上，大直径端部（3）固定在作为 外部成员。 靴子（1）的较小直径的端部（2）的内周面由于在一个邻接的状态下一体地结合到轴（17）的靴子安装部分（18）的外周表面 构成靴子（1）的树脂与构成轴（17）的金属之间的物理相互作用。 此外，所述护罩（1）的所述大直径端部（3）的内周面与所述外侧接头构件（11）的护罩安装部（19）的外周面一体地接合， 由于构成靴子（1）的树脂与构成外侧接头构件（11）的金属之间的物理相互作用而产生的状态。

公开(公告)号：US20100253647A1

公开(公告)日：2010-10-07

申请号：US12740124

申请日：2008-11-10

申请人： Masafumi Agari ,  Naoki Nakagawa ,  Seiichiro Mori ,  Hiroyuki Murai

发明人： Masafumi Agari ,  Naoki Nakagawa ,  Seiichiro Mori ,  Hiroyuki Murai

IPC分类号： G06F3/045

CPC分类号： G06F3/044 ,  G06F3/0416

摘要： A touch panel capable of calculating touch position coordinates of an indicator with high accuracy in a desired detection time even if a large number of detection wire groups are provided. An oscillator circuit selects one of detection wires selected by a circuit or the like according to a command from a detection control circuit and oscillates. A circuit counts an output signal from the oscillator circuit up to a first count value. A circuit measures a period of the count. A circuit determines that there is a touch when it detects the detection wire of which the measured period is equal to or higher than a threshold value and sends the detection wire giving a maximum value equal to or higher than the threshold value to a circuit as a touch detection wire. The circuit causes the circuit or the like to select the touch detection wire and the detection wires adjacent thereto on both sides, the circuit counts up until the count value becomes a second count value larger than the first count value, and the circuit measures the count period. The circuit performs interpolation on the basis of the count value obtained by subtracting a background capacitance value from a measured value obtained by the circuit, to thereby determine the touch coordinates.

摘要翻译： 即使提供了大量检测线组，能够在期望的检测时间内高精度地计算指示器的触摸位置坐标的触摸面板。 振荡电路根据来自检测控制电路的指令，选择由电路等选择的检测线之一并振荡。 电路将来自振荡器电路的输出信号计数到第一计数值。 电路测量一段时间。 电路确定当检测到测量周期等于或高于阈值的检测线时有触摸，并将给出等于或高于阈值的最大值的检测线发送到电路作为 触摸检测线。 电路使电路等在两侧选择触摸检测线及与其相邻的检测线，电路向上计数，直到计数值变为比第一计数值大的第二计数值，并且电路测量计数 期。 电路根据通过从电路获得的测量值减去背景电容值而得到的计数值进行内插，从而确定触摸坐标。

公开(公告)号：US07612378B2

公开(公告)日：2009-11-03

申请号：US11376414

申请日：2006-03-16

申请人： Yoshihiko Toyoda ,  Naoki Nakagawa ,  Taro Yoshino

发明人： Yoshihiko Toyoda ,  Naoki Nakagawa ,  Taro Yoshino

IPC分类号： H01L29/08

CPC分类号： H01L27/1214 ,  H01L27/3244 ,  H01L29/78624 ,  H01L2029/7863

摘要： A silicon nitride film and a silicon oxide film are formed on a glass substrate. On the silicon oxide film is formed a thin film transistor including a source region, a drain region, a channel region having a predetermined channel length, an LDD region and GOLD region having an impurity concentration higher than the impurity concentration of the channel region and lower than the impurity concentration of the source and drain regions, a gate insulation film, and a gate electrode. The gate electrode is formed to overlap in plane with the channel region and the GOLD region. Accordingly, a semiconductor device and an image display apparatus directed to improving source-drain breakdown voltage are obtained.

摘要翻译： 在玻璃基板上形成氮化硅膜和氧化硅膜。 在氧化硅膜上形成薄膜晶体管，其包括源极区，漏极区，具有预定沟道长度的沟道区，LDD区和杂质浓度高于沟道区的杂质浓度的GOLD区， 比源极和漏极区域的杂质浓度，栅极绝缘膜和栅极电极。 栅电极形成为与沟道区域和GOLD区域平面重叠。 因此，获得了旨在提高源极 - 漏极击穿电压的半导体器件和图像显示装置。

公开(公告)号：US07151675B2

公开(公告)日：2006-12-19

申请号：US10639464

申请日：2003-08-13

申请人： Yuichiro Murata ,  Naoki Nakagawa

发明人： Yuichiro Murata ,  Naoki Nakagawa

IPC分类号： H01R12/16

CPC分类号： H05K1/14 ,  H05K1/023 ,  H05K1/167 ,  H05K2201/044 ,  H05K2201/10022

摘要： A multi-pin connector for connecting a signal line on a backboard side and a signal line on a daughter board side has open pins where the signal lines are not connected. In order to prevent transmission loss on the signal lines caused by these open pins, terminating resistances are connected to both ends of the open pins, and ends of the terminating resistances opposite to the open pins are connected to ground or to a power supply.

摘要翻译： 用于连接背板侧的信号线和子板侧的信号线的多针连接器具有未连接信号线的开路引脚。 为了防止由这些开放引脚引起的信号线上的传输损耗，端接电阻连接到开放引脚的两端，并且与开路引脚相反的端接电阻的端部连接到地或电源。

公开(公告)号：US20050148425A1

公开(公告)日：2005-07-07

申请号：US11029411

申请日：2005-01-06

申请人： Naoki Nakagawa ,  Masaharu Hori ,  Soichi Yagi

发明人： Naoki Nakagawa ,  Masaharu Hori ,  Soichi Yagi

IPC分类号： F03D11/02 ,  F03D11/00 ,  F16C19/28 ,  F16C33/34 ,  F16H1/28 ,  F16H37/04 ,  F16H57/021 ,  F16H13/06

CPC分类号： F16C19/28 ,  F03D80/70 ,  F16C19/505 ,  F16C33/34 ,  F16C2240/40 ,  F16C2360/31 ,  F16C2361/61 ,  F16H2057/085 ,  Y02E10/722

摘要： There is provided a cylindrical roller bearing (1) which includes an inner race (2), an outer race (3) and first, second and third rows of rollers (4A, 4B and 4C) accommodated within an annular bearing space delimited between the inner and outer races (2 and 3) with the second or intermediate row of the rollers (4B) positioned between the first and third rows of the rollers (4A and 4C). The rollers (4A and 4C) of the first and third rows have respective lengths (LA and LC) greater than the length (LB) of the rollers (4B) of the second row.

摘要翻译： 提供一种圆柱滚子轴承（1），其包括内座圈（2），外座圈（3）和容纳在环形轴承空间内的第一，第二和第三排滚子（4A，4B和4C） 在第一和第三排辊（4A和4C）之间，定位在内圈和外圈（2和3）之间，第二或第二排辊（4B）。 第一和第三排的辊子（4A和4C）具有大于长度（L B＆lt; B＆gt; / SUB>）的第二排的辊（4B）。

公开(公告)号：US06738106B1

公开(公告)日：2004-05-18

申请号：US09717040

申请日：2000-11-22

申请人： Manabu Tanahara ,  Naoki Nakagawa

发明人： Manabu Tanahara ,  Naoki Nakagawa

IPC分类号： G02F1136

CPC分类号： G02F1/136213

摘要： The present invention is directed to a liquid crystal display device including: a thin film transistor (TFT) substrate having a plurality of displaying pixels each with a pixel electrode connected to respective TFT; a plurality of gate lines for scanning said TFTs in line-wise manner; a plurality of source lines for applying signal potential of writing picture to the pixels, arranged almost perpendicular with said gate lines in a matrix manner; an opposing substrate interposing a liquid crystal material together with the TFT array substrate therebetween; and a plurality of auxiliary capacitance electrode; wherein each of said pixel electrodes forms an auxiliary capacitance by overlapping with respective auxiliary capacitance electrode, said overlapping is decreased in a direction from a signal input side to a signal transmission end of each gate line to form a difference of auxiliary capacitance value depending on a plurality of vertical band regions, and boundaries of said vertical band regions are formed in a zigzag manner.

摘要翻译： 本发明涉及一种液晶显示装置，包括：具有多个显示像素的薄膜晶体管（TFT）基板，每个显示像素均具有连接到各个TFT的像素电极; 用于以线方式扫描所述TFT的多条栅极线; 多个源极线，用于向像素施加写入图像的信号电位，以矩阵方式布置成与所述栅极线几乎垂直; 相对的基板，与TFT阵列基板一起插入液晶材料; 和多个辅助电容电极; 其中每个所述像素电极通过与相应的辅助电容电极重叠而形成辅助电容，所述重叠在从每个栅极线的信号输入侧到信号传输端的方向上减小，以形成辅助电容值的差异，这取决于 多个垂直带区域，并且所述垂直带区域的边界以锯齿形的方式形成。

公开(公告)号：US06549187B1

公开(公告)日：2003-04-15

申请号：US09594023

申请日：2000-06-15

申请人： Ryouta Matsubara ,  Naoki Nakagawa ,  Satoshi Kohtaka

发明人： Ryouta Matsubara ,  Naoki Nakagawa ,  Satoshi Kohtaka

IPC分类号： G09G336

CPC分类号： G09G3/3614 ,  G09G3/3648 ,  G09G2310/0251 ,  G09G2310/06 ,  G09G2320/0233 ,  G09G2320/0247

摘要： An active matrix liquid crystal display of (2×1) dot inversion driving system, wherein in a case where the active matrix display is driven, voltage is applied to the pixels in such a manner that polarity is changed every source line in the horizontal direction and every two gate lines in the vertical direction. Further, a plurality of pixels is provided with a switching element, and charging characteristics of the pixels are made uniform both at the time of selecting the n-th line gate wire 1 at which the polarity of the source potential is inverted and at the time of selecting the (n+1)th line gate wire 2 at which no inversion is made in the source potential, whereby unevenness in luminance occurring in each line in raster display can be reduced.

摘要翻译： （2×1）点反转驱动系统的有源矩阵液晶显示器，其中在有源矩阵显示被驱动的情况下，以像素的方式施加电压，使得每个源极线在水平方向和每个 两条垂直方向的栅极线。 此外，多个像素设置有开关元件，并且在选择源极电位的极性反转的第n线栅极线1时，像素的充电特性被均匀化，并且在此时 选择不在电位电位进行反转的第（n + 1）行栅极线2，从而可以减少在光栅显示中的各行中发生的亮度的不均匀性。

公开(公告)号：US06525788B1

公开(公告)日：2003-02-25

申请号：US09418008

申请日：1999-10-14

申请人： Naoki Nakagawa ,  Hironori Aoki

发明人： Naoki Nakagawa ,  Hironori Aoki

IPC分类号： G02F1136

CPC分类号： G02F1/133512 ,  G02F1/136227 ,  G02F2001/136218

摘要： The object of the present invention is to provide a TFT array for obtaining a liquid crystal display apparatus of large screen size, of high aperture ratio, and of high precision without degrading the display quality through cross talks or shot blurs. The TFT array of the present invention is a TFT array substrate comprising: a transparent insulating substrate; a plurality of parallel gate electrode lines; a plurality of parallel source electrode lines crossing to the gate electrode lines; a plurality of TFTs located on each crossing point of the gate electrode lines and the source electrode lines; a passivation film formed on the TFTs; a plurality of transparent pixel electrodes formed on said passivation film corresponding to each said TFT and connected to a drain electrode of each said TFT via contact hole; a plurality of floating electrodes which serve as light shielding layer made of a same layer as that of said gate electrode lines formed in a peripheral portion of each said pixel electrode.

摘要翻译： 本发明的目的是提供一种用于获得大屏幕尺寸，高开口率和高精度的液晶显示装置的TFT阵列，而不会通过交叉谈话或镜头模糊而降低显示质量。 本发明的TFT阵列是TFT阵列基板，包括：透明绝缘基板; 多个平行栅电极线; 与栅电极线交叉的多个平行的源电极线; 位于栅电极线和源电极线的每个交叉点上的多个TFT; 形成在TFT上的钝化膜; 多个透明像素电极，形成在与每个所述TFT相对应的所述钝化膜上并连接到每个所述TFT通孔接触孔的漏电极; 多个浮置电极，其用作与形成在每个所述像素电极的周边部分中的所述栅电极线的层相同的遮光层。