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    Semiconductor device and method for forming the same
    31.
    发明授权
    Semiconductor device and method for forming the same 有权

    公开(公告)号：US11437436B2

    公开(公告)日：2022-09-06

    申请号：US17084609

    申请日：2020-10-29

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Wen-Jen Wang ,  Chun-Hung Cheng ,  Chuan-Fu Wang

    IPC: H01L27/24 ,  H01L45/00

    Abstract: A semiconductor device includes a substrate having a memory region and a logic region. A first dielectric layer is disposed on the substrate. A first conductive structure and a second conductive structure are formed in the first dielectric layer and respectively on the memory region and the logic region of the substrate. A memory cell is disposed on the first dielectric layer and directly contacts a top surface of the first conductive structure. A first cap layer is formed on the first dielectric layer and continuously covers a top surface and a sidewall of the memory cell and a top surface of the second conductive structure. A second dielectric layer is formed on the first cap. A third conductive structure is formed in the second dielectric layer and penetrates through the first cap layer to contacts the memory cell.

    RESISTIVE RANDOM-ACCESS MEMORY (RRAM) DEVICE AND FORMING METHOD THEREOF
    32.
    发明申请
    RESISTIVE RANDOM-ACCESS MEMORY (RRAM) DEVICE AND FORMING METHOD THEREOF 有权

    公开(公告)号：US20220271222A1

    公开(公告)日：2022-08-25

    申请号：US17211875

    申请日：2021-03-25

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Shu-Hung Yu ,  Chun-Hung Cheng ,  Chuan-Fu Wang

    IPC: H01L45/00

    Abstract: A resistive random-access memory (RRAM) device includes a bottom electrode, a high work function layer, a resistive material layer, a top electrode and high work function spacers. The bottom electrode, the high work function layer, the resistive material layer and the top electrode are sequentially stacked on a substrate, wherein the resistive material layer includes a bottom part and a top part. The high work function spacers cover sidewalls of the bottom part, thereby constituting a RRAM cell. The present invention also provides a method of forming a RRAM device.

    SEMICONDUCTOR DEVICE AND METHOD FOR PLANARIZING THE SAME
    34.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD FOR PLANARIZING THE SAME 有权

    公开(公告)号：US20210028025A1

    公开(公告)日：2021-01-28

    申请号：US17067409

    申请日：2020-10-09

    Applicant: United Microelectronics Corp.

    Inventor： Chia-Hung Chen ,  Yu-Huang Yeh ,  Chuan-Fu Wang ,  Chin-Chin Tsai

    IPC: H01L21/321 ,  H01L21/3213 ,  H01L29/423 ,  H01L27/11568

    Abstract: A semiconductor device includes a substrate, having a cell region and a core region. A plurality of gate structures is disposed on the substrate in the cell region. Each of the gate structures has a spacer on a sidewall of the gate structures. The gate structure includes a charge storage layer, on the substrate; a first polysilicon layer on the charge storage layer; and a mask layer on the first polysilicon layer, the mask layer comprising a first polishing stop layer on top. A preliminary material layer also with the first polishing stop layer on top is disposed on the substrate at the core region. A second polysilicon layer is filled between the gate structures at the cell region. A second polishing stop layer is on the second polysilicon layer. The first polishing stop layer and the second polishing stop layer are same material and same height.

    Semiconductor memory device and fabrication method thereof
    35.
    发明授权
    Semiconductor memory device and fabrication method thereof 有权

    公开(公告)号：US10707225B2

    公开(公告)日：2020-07-07

    申请号：US16792847

    申请日：2020-02-17

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Wen-Jen Wang ,  Chun-Hung Cheng ,  Chuan-Fu Wang

    IPC: H01L27/115 ,  H01L27/11568 ,  H01L29/792 ,  H01L21/28

    Abstract: A method for fabricating a semiconductor memory device is disclosed. A substrate having a main surface is provided. A memory gate is formed on the main surface of the substrate. The memory has a first sidewall and a second sidewall opposite to the first sidewall. A control gate is formed in proximity to the memory gate. The control gate has a third sidewall directly facing the second sidewall, and a fourth sidewall opposite to the third sidewall. A gap is formed between the second sidewall of the memory gate and the third sidewall of the control gate. A first single spacer structure is formed on the first sidewall of the memory gate and a second single spacer structure on the fourth sidewall of the control gate. A gap-filling layer is formed to fill up the gap.

    RESISTIVE RANDOM ACCESS MEMORY DEVICE AND FABRICATION METHOD THEREOF
    36.
    发明申请
    RESISTIVE RANDOM ACCESS MEMORY DEVICE AND FABRICATION METHOD THEREOF 有权

    公开(公告)号：US20250098557A1

    公开(公告)日：2025-03-20

    申请号：US18380212

    申请日：2023-10-16

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Kai-Jiun Chang ,  Yu-Huan Yeh ,  Chuan-Fu Wang

    IPC: H10N70/00 ,  H10B63/00 ,  H10N70/20

    Abstract: A resistive random access memory device includes a substrate; a dielectric layer disposed on the substrate; a conductive via disposed in the dielectric layer; a metal nitride layer disposed on the conductive via, wherein the metal nitride has a gradient nitrogen concentration along a thickness direction of the metal nitride layer; a resistive switching layer disposed on the metal nitride layer; and a metal oxynitride layer disposed on the resistive switching layer, wherein the metal oxynitride layer has a gradient nitrogen concentration along a thickness direction of the metal oxynitride layer.

    RESISTIVE SWITCHING DEVICE AND FABRICATION METHOD THEREOF
    37.
    发明申请
    RESISTIVE SWITCHING DEVICE AND FABRICATION METHOD THEREOF 有权

    公开(公告)号：US20250048944A1

    公开(公告)日：2025-02-06

    申请号：US18237915

    申请日：2023-08-25

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Kai-Jiun Chang ,  Yu-Huan Yeh ,  Chuan-Fu Wang

    IPC: H10N70/00 ,  H10B63/00 ,  H10N70/20

    Abstract: A resistive switching device includes a substrate, a first dielectric layer on the substrate, a conductive via in the first dielectric layer, and a resistive switching structure embedded in an upper portion of the conductive via. The resistive switching structure includes a top electrode layer having a lower sharp corner, a resistive switching material layer disposed around the lower sharp corner of the top electrode layer, and a bottom electrode layer disposed between the resistive switching material layer and the upper portion of the conductive via.

    SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME
    40.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME 有权

    公开(公告)号：US20220359618A1

    公开(公告)日：2022-11-10

    申请号：US17870814

    申请日：2022-07-21

    Applicant: UNITED MICROELECTRONICS CORP.

    Inventor： Wen-Jen Wang ,  Chun-Hung Cheng ,  Chuan-Fu Wang

    IPC: H01L27/24 ,  H01L45/00

    Abstract: A semiconductor device includes a substrate having a memory region and a logic region. A first dielectric layer is disposed on the substrate. A first conductive structure and a second conductive structure are respectively formed in the first dielectric layer on the memory region and the logic region. A memory cell is formed on the first dielectric layer and directly contacts a top surface of the first conductive structure. A first cap layer continuously covers a top surface and a sidewall of the memory cell and directly contacts a top surface of the second conductive structure. A second dielectric layer is formed on the first cap layer. A third conductive structure penetrates through the second dielectric layer and the first cap layer to contact the memory cell.

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