公开(公告)号：US10120399B1

公开(公告)日：2018-11-06

申请号：US15848357

申请日：2017-12-20

Applicant: Xilinx, Inc.

Inventor： Umanath R. Kamath ,  Edward Cullen ,  John K. Jennings

IPC: G05F1/46 ,  G06F1/20

Abstract: An example method of trimming a voltage reference in an integrated circuit (IC) includes at a first temperature, sequencing through a first plurality of trim codes for a reference circuit of the voltage reference configured to generate a proportional-to-temperature current and a corresponding first control voltage, and a complementary-to-temperature current and a corresponding second control voltage. The method further includes measuring a voltage output of the voltage reference for each of the first plurality of trim codes to obtain first voltage output values. The method further includes at a second temperature, sequencing through a second plurality of trim codes for the reference circuit. The method further includes measuring the voltage output of the voltage reference for each of the second plurality of trim codes to obtain second voltage output values. The method further includes selecting a trim code for the reference circuit based on the first voltage output values and the second voltage output values.

公开(公告)号：US20180226929A1

公开(公告)日：2018-08-09

申请号：US15426917

申请日：2017-02-07

Applicant: Xilinx, Inc.

Inventor： Umanath R. Kamath ,  John K. Jennings ,  Adrian Lynam

IPC: H03F3/45 ,  H03F1/02 ,  H03G3/00 ,  H03G3/30

CPC classification number: H03F3/4508 ,  G01K7/01 ,  G05F3/30 ,  H03F1/0216 ,  H03F3/45475 ,  H03F2200/213 ,  H03F2200/261 ,  H03F2200/468 ,  H03F2203/45514 ,  H03F2203/45544 ,  H03G3/001 ,  H03G3/30

Abstract: A circuit for implementing a multifunction output generator is described. The circuit comprises an amplifier circuit having a first input and a second input; a voltage generator coupled at a first node to a first input of the amplifier circuit; a controllable current source configured to provide a variable current to the first node; and a switching circuit enabling the operation of the amplifier circuit in a first mode for sensing a temperature and a second mode for providing a reference voltage. A method of implementing a multifunction output generator is described.

公开(公告)号：US09245886B2

公开(公告)日：2016-01-26

申请号：US13941419

申请日：2013-07-12

Applicant: Xilinx, Inc.

Inventor： John K. Jennings ,  Ionut C. Cical

IPC: H01L21/70 ,  H01L27/092 ,  H01L29/78 ,  H03K17/06 ,  H03K17/0812 ,  H03K17/693

CPC classification number: H01L27/092 ,  H01L29/78 ,  H03K17/06 ,  H03K17/08122 ,  H03K17/693 ,  H03K2017/066 ,  H03K2217/0054

Abstract: Devices for isolating an input from an output are disclosed. For example, a device includes a first p-type metal oxide semiconductor transistor and a first circuit. A source of the first p-type metal oxide semiconductor transistor is connected to an input of the device. The first circuit is for delivering a signal on the input of the device to a gate of the first p-type metal oxide semiconductor transistor when an enable signal is deactivated and for delivering a ground voltage to the gate of the first p-type metal oxide semiconductor transistor when the enable signal is activated.

Abstract translation: 公开了用于将输入与输出隔离的装置。 例如，器件包括第一p型金属氧化物半导体晶体管和第一电路。 第一p型金属氧化物半导体晶体管的源极连接到器件的输入。 第一电路用于当使能信号被去激活并且将接地电压传送到第一p型金属氧化物半导体晶体管的栅极时将器件的输入端上的信号传送到第一p型金属氧化物半导体晶体管的栅极 半导体晶体管当使能信号被激活时。

公开(公告)号：US20150014779A1

公开(公告)日：2015-01-15

申请号：US13941419

申请日：2013-07-12

Applicant: Xilinx, Inc.

Inventor： John K. Jennings ,  Ionut C. Cical

IPC: H01L27/092 ,  H01L29/78

CPC classification number: H01L27/092 ,  H01L29/78 ,  H03K17/06 ,  H03K17/08122 ,  H03K17/693 ,  H03K2017/066 ,  H03K2217/0054

Abstract: Devices for isolating an input from an output are disclosed. For example, a device includes a first p-type metal oxide semiconductor transistor and a first circuit. A source of the first p-type metal oxide semiconductor transistor is connected to an input of the device. The first circuit is for delivering a signal on the input of the device to a gate of the first p-type metal oxide semiconductor transistor when an enable signal is deactivated and for delivering a ground voltage to the gate of the first p-type metal oxide semiconductor transistor when the enable signal is activated.

Abstract translation: 公开了用于将输入与输出隔离的装置。 例如，器件包括第一p型金属氧化物半导体晶体管和第一电路。 第一p型金属氧化物半导体晶体管的源极连接到器件的输入。 第一电路用于当使能信号被去激活并且将接地电压传送到第一p型金属氧化物半导体晶体管的栅极时将器件的输入端上的信号传送到第一p型金属氧化物半导体晶体管的栅极 半导体晶体管当使能信号被激活时。

公开(公告)号：US20140085003A1

公开(公告)日：2014-03-27

申请号：US13629123

申请日：2012-09-27

Applicant: Xilinx, Inc.

Inventor： Patrick J. Quinn ,  John K. Jennings ,  Darragh Walsh ,  Padraig Kelly

IPC: H03F3/45 ,  H05K13/00

CPC classification number: H03F3/45 ,  H03F1/56 ,  Y10T29/49002

Abstract: A circuit includes an amplifier including a differential input stage including a first input terminal and a second input terminal. The circuit further includes a differential input line coupled to the first input terminal and the second input terminal, and shielding at least partially encompassing the differential input line. The shielding is connected to a node of the differential input stage of the amplifier.

Abstract translation: 电路包括放大器，其包括具有第一输入端和第二输入端的差分输入级。 电路还包括耦合到第一输入端和第二输入端的差分输入线，以及至少部分地包围差分输入线的屏蔽。 屏蔽连接到放大器差分输入级的一个节点。