公开(公告)号：US20180226929A1

公开(公告)日：2018-08-09

申请号：US15426917

申请日：2017-02-07

Applicant: Xilinx, Inc.

Inventor： Umanath R. Kamath ,  John K. Jennings ,  Adrian Lynam

IPC: H03F3/45 ,  H03F1/02 ,  H03G3/00 ,  H03G3/30

CPC classification number: H03F3/4508 ,  G01K7/01 ,  G05F3/30 ,  H03F1/0216 ,  H03F3/45475 ,  H03F2200/213 ,  H03F2200/261 ,  H03F2200/468 ,  H03F2203/45514 ,  H03F2203/45544 ,  H03G3/001 ,  H03G3/30

Abstract: A circuit for implementing a multifunction output generator is described. The circuit comprises an amplifier circuit having a first input and a second input; a voltage generator coupled at a first node to a first input of the amplifier circuit; a controllable current source configured to provide a variable current to the first node; and a switching circuit enabling the operation of the amplifier circuit in a first mode for sensing a temperature and a second mode for providing a reference voltage. A method of implementing a multifunction output generator is described.

公开(公告)号：US10224884B2

公开(公告)日：2019-03-05

申请号：US15426917

申请日：2017-02-07

Applicant: Xilinx, Inc.

Inventor： Umanath R. Kamath ,  John K. Jennings ,  Adrian Lynam

IPC: H03F3/04 ,  H03F3/08 ,  G01K7/00 ,  G01K7/01 ,  G01K7/16 ,  H04L27/00 ,  H03F3/68 ,  H03F3/45 ,  H03F1/02 ,  H03G3/00 ,  H03M1/00 ,  G05F3/30 ,  H03G3/30

Abstract: A circuit for implementing a multifunction output generator is described. The circuit comprises an amplifier circuit having a first input and a second input; a voltage generator coupled at a first node to a first input of the amplifier circuit; a controllable current source configured to provide a variable current to the first node; and a switching circuit enabling the operation of the amplifier circuit in a first mode for sensing a temperature and a second mode for providing a reference voltage. A method of implementing a multifunction output generator is described.

公开(公告)号：US10742254B1

公开(公告)日：2020-08-11

申请号：US16056236

申请日：2018-08-06

Applicant: Xilinx, Inc.

Inventor： Adrian Lynam

IPC: H04B1/525 ,  H03M1/10 ,  H03M1/00 ,  H04B1/04

Abstract: A leakage compensation circuit includes a compensation digital to analog converter (DAC) and an adjustment circuit. The compensation DAC is configured to: receive a first digital signal associated with a transmitter of a transceiver; generate a compensation analog signal using the first digital signal; and provide the compensation analog signal to a receiver of the transceiver. The adjustment circuit is configured to generate the first digital signal by adjusting a second digital signal from the transmitter based on one or more adjustment parameters.

公开(公告)号：US10289178B1

公开(公告)日：2019-05-14

申请号：US15479176

申请日：2017-04-04

Applicant: Xilinx, Inc.

Inventor： Adrian Lynam ,  John K. Jennings ,  Umanath R. Kamath ,  Michael J. Hart ,  James Karp

IPC: G01R19/00 ,  G06F1/20 ,  G05F1/46 ,  H03K17/22 ,  H03K19/003 ,  G01R19/165 ,  G01K13/00

Abstract: Methods and apparatus are described for detecting both single event latch-up (SEL) and electrical overvoltage stress (EOS) using a single, reconfigurable detection circuit. One example circuit capable of detecting a latch-up state and an overvoltage condition generally includes an impedance element coupled to a power supply node; a voltage divider coupled to the power supply node; a multiplexer having a first input coupled to a tap of the voltage divider, a second input coupled to a first portion of the impedance element, and a third input coupled to a second portion of the impedance element; a reference generator; and an analog-to-digital converter (ADC) having a first input coupled to an output of the multiplexer and a second input coupled to an output of the reference generator.