公开(公告)号：US06233732B1

公开(公告)日：2001-05-15

申请号：US08748064

申请日：1996-11-12

申请人： Manabu Matsuyama ,  Yutaka Igarashi ,  KohIchiro Hotta ,  Masakazu Hayashi

发明人： Manabu Matsuyama ,  Yutaka Igarashi ,  KohIchiro Hotta ,  Masakazu Hayashi

IPC分类号： G06F300

CPC分类号： G06F8/41

摘要： A compiling system includes a first unit for converting a source program into an intermediate text formed of intermediate codes, each of the intermediate codes having a portion used to explicitly indicate information regarding a state of computer hardware, the computer hardware being operated in accordance with a machine language program, and a second unit for generating a machine language program using the intermediate codes of the intermediate text. In addition, a compiling system includes a first unit for converting a source program into an intermediate text formed of intermediate codes, each of the intermediate codes having a portion used to define a plurality of values, and a second unit for generating a machine language program using the intermediate codes of the intermediate text.

摘要翻译： 编译系统包括用于将源程序转换为由中间代码形成的中间文本的第一单元，每个中间代码具有用于明确指示关于计算机硬件状态的信息的部分，所述计算机硬件根据 机器语言程序，以及用于使用中间文本的中间代码生成机器语言程序的第二单元。 此外，编译系统包括用于将源程序转换为由中间代码形成的中间文本的第一单元，每个中间代码具有用于定义多个值的部分，以及用于生成机器语言程序的第二单元 使用中间文本的中间代码。

公开(公告)号：US5985393A

公开(公告)日：1999-11-16

申请号：US888532

申请日：1997-07-07

申请人： Sumihisa Akahoshi ,  Yutaka Igarashi ,  Kouji Hirata ,  Masanori Tsujihara ,  Fumiaki Baba ,  Akira Yamada ,  Chisa Kato

发明人： Sumihisa Akahoshi ,  Yutaka Igarashi ,  Kouji Hirata ,  Masanori Tsujihara ,  Fumiaki Baba ,  Akira Yamada ,  Chisa Kato

IPC分类号： B29C39/10 ,  B29D22/00 ,  B29K75/00 ,  B29K105/04 ,  B29L22/00 ,  B65D81/38 ,  C08G18/00 ,  C08G18/08 ,  C08J9/14 ,  C08L75/00 ,  C08L75/04 ,  F25D23/06 ,  F25D23/08

CPC分类号： F25D23/064 ,  F25D2201/126 ,  Y10T428/1352 ,  Y10T428/1376 ,  Y10T428/1386 ,  Y10T428/3154 ,  Y10T428/31573 ,  Y10T428/31605

摘要： A heat insulating box, such as a refrigerator box, comprises a heat insulator and a box member that is in contact with the heat insulator. The heat insulator is formed of a urethane foam using either HCFC-123 (CHCl.sub.2 CF.sub.3) or HCFC-141b (CH.sub.3 CCl.sub.2 F) or both as a forming agent, and the box member is formed of a styrene/acrylonitrile/butadiene terpolymer, a styrene/ethylene-.alpha.-olefinic rubbery copolymer/acrylonitrile terpolymer (AES resin), a styrene/alkyl acrylate ester containing rubbery copolymer/acrylonitrile terpolymer (AAS resin), or a mixture of the AES resin and the AAS resin.

摘要翻译： 诸如冰箱的隔热箱包括隔热件和与隔热件接触的盒构件。 绝热体由使用HCFC-123（CHCl 2 CF 3）或HCFC-141b（CH 3 CCl 2 F）或二者作为成形剂的聚氨酯泡沫形成，盒构件由苯乙烯/丙烯腈/丁二烯三元共聚物，苯乙烯/乙烯 - α-烯烃橡胶共聚物/丙烯腈三元共聚物（AES树脂），含橡胶共聚物/丙烯腈三元共聚物（AAS树脂）的苯乙烯/丙烯酸烷基酯酯，或AES树脂和AAS树脂的混合物。

公开(公告)号：US5707700A

公开(公告)日：1998-01-13

申请号：US348484

申请日：1994-12-02

申请人： Sumihisa Akahoshi ,  Yutaka Igarashi ,  Kouji Hirata ,  Masanori Tsujihara ,  Fumiaki Baba ,  Akira Yamada ,  Chisa Kato

发明人： Sumihisa Akahoshi ,  Yutaka Igarashi ,  Kouji Hirata ,  Masanori Tsujihara ,  Fumiaki Baba ,  Akira Yamada ,  Chisa Kato

IPC分类号： B29C39/10 ,  B29D22/00 ,  B29K75/00 ,  B29K105/04 ,  B29L22/00 ,  B65D81/38 ,  C08G18/00 ,  C08G18/08 ,  C08J9/14 ,  C08L75/00 ,  C08L75/04 ,  F25D23/06 ,  F25D23/08 ,  B65D81/18

CPC分类号： F25D23/064 ,  F25D2201/126 ,  Y10T428/1352 ,  Y10T428/1376 ,  Y10T428/1386 ,  Y10T428/3154 ,  Y10T428/31573 ,  Y10T428/31605

摘要： A heat insulating box, such as a refrigerator box, comprises a heat insulator and a box member that is in contact with the heat insulator. The heat insulator is formed of a urethane foam using either HCFC-123 (CHCl.sub.2 CF.sub.3) or HCFC-141b (CH.sub.3 CCl.sub.2 F) or both as a forming agent, and the box member is formed of an acrylonitrile/ethylene-.varies.-olefinic rubbery polymer/styrene resin (A/epdm/S resin), an acrylonitrile/alkyl acrylate ester rubbery polymer/styrene resin (ASA resin), a mixture of an A/epdm/s resin and an ASA resin, or a mixture of an ASA resin with an acrylonitrile/butadiene/styrene resin.

摘要翻译： 诸如冰箱的隔热箱包括隔热件和与隔热件接触的盒构件。 绝热体由使用HCFC-123（CHCl 2 CF 3）或HCFC-141b（CH 3 CCl 2 F）或二者作为成形剂的氨基甲酸酯泡沫形成，并且该箱构件由丙烯腈/乙烯 - 丙烯 - 丙烯酸橡胶状聚合物/苯乙烯 树脂（A / epdm / S树脂），丙烯腈/丙烯酸烷基酯丙烯酸酯橡胶状聚合物/苯乙烯树脂（ASA树脂），A / epdm / s树脂和ASA树脂的混合物，或ASA树脂与 丙烯腈/丁二烯/苯乙烯树脂。

公开(公告)号：US5572264A

公开(公告)日：1996-11-05

申请号：US386038

申请日：1995-02-09

申请人： Hiroyuki Mizukami ,  Yutaka Igarashi ,  Toshio Nagashima

发明人： Hiroyuki Mizukami ,  Yutaka Igarashi ,  Toshio Nagashima

IPC分类号： H04N5/44 ,  H04N5/52 ,  H04N5/922 ,  H04N11/00 ,  H04N5/46

CPC分类号： H04N5/4446 ,  H04N5/4401 ,  H04N11/002 ,  H04N5/52

摘要： To make it possible to receive a modulated signal which is obtained by suppressing a carrier signal such as a high definition TV signal which is digitally demodulated such as QAM (quadrature amplitude modulation), a receiver of the double super-heterodyne system having the first and second mixers 9 and 13 is a basic constitution. A band pass filter having a flatness in pass band and a small deviation of group delay which will prevent the demodulation of a high definition TV signal from degradation is used a first intermediate frequency filter 11. An SAW filter is used as a second intermediate frequency filter 16. The third mixer 28 for converting a second intermediate frequency signal to a third intermediate frequency signal in frequency is installed and the frequency of the third intermediate frequency signal to be converted is set to a value lower than the frequency of the second intermediate frequency signal. The demodulator 33 for a high definition TV signal is installed so as to demodulate a high definition TV signal included in the third intermediate frequency signal.

摘要翻译： 为了可以接收通过抑制诸如QAM（正交幅度调制）等数字解调的高清晰度电视信号的载波信号获得的调制信号，具有第一和第二超外差系统的接收机 第二混合器9和13是基本构成。 使用具有通带平坦度的带通滤波器和防止高分辨率TV信号的解调降低的群延迟的小偏差，第一中频滤波器11.使用SAW滤波器作为第二中频滤波器 安装用于将第二中频信号转换为频率的第三中频信号的第三混频器28，将要转换的第三中频信号的频率设置为低于第二中频信号的频率 。 用于高清晰度电视信号的解调器33被安装成解调包括在第三中频信号中的高分辨率TV信号。

公开(公告)号：US5355085A

公开(公告)日：1994-10-11

申请号：US672866

申请日：1991-03-20

申请人： Yutaka Igarashi ,  Takao Goto ,  Takehiko Hayashi ,  Yoshiyasu Nakashima ,  Norio Fujimaki ,  Hajime Hayashi ,  Kohtaro Gotoh

发明人： Yutaka Igarashi ,  Takao Goto ,  Takehiko Hayashi ,  Yoshiyasu Nakashima ,  Norio Fujimaki ,  Hajime Hayashi ,  Kohtaro Gotoh

IPC分类号： G01R33/035

CPC分类号： G01R33/0356 ,  Y10S505/846

摘要： A plurality of SQUID flux sensors are supplied with their respective bias currents at the same time from a bias source. A superconducting multiplexer multiplexes output signals of the SQUID flux sensors during an interval of time when the bias currents are supplied to the SQUID flux sensors. A multiplexer, placed in a room-temperature environment, distributes each of the multiplexed output signals of the SQUID flux sensors to a respective one of the output terminals which correspond to the SQUID flux sensors. Each signal which has been output to an individual output terminal is counted by a counter, so that an external magnetic flux to a corresponding SQUID flux sensor is measured.

摘要翻译： 多个SQUID磁通传感器从偏置源同时被提供有它们各自的偏置电流。 超导多路复用器在偏置电流被提供给SQUID磁通传感器的时间间隔期间复用SQUID磁通传感器的输出信号。 放置在室温环境中的多路复用器将SQUID通量传感器的多路复用输出信号中的每一个分配给与SQUID通量传感器相对应的输出端子中的相应一个。 已经输出到各个输出端子的每个信号被计数器计数，从而测量到相应的SQUID磁通量传感器的外部磁通量。

公开(公告)号：US5093618A

公开(公告)日：1992-03-03

申请号：US550171

申请日：1990-07-09

申请人： Takao Goto ,  Yutaka Igarashi ,  Takehiko Hayashi

发明人： Takao Goto ,  Yutaka Igarashi ,  Takehiko Hayashi

IPC分类号： G01R33/035

CPC分类号： G01R33/0354 ,  Y10S505/846

摘要： In a multi-channel SQUID fluxmeter for detecting magnetic flux signals by use of an array of SQUID flux sensors each comprising a digital SQUID for providing a pulse output, multiplexers and the like are appropriately used to allow pulse signals output from the SQUID flux sensors to be switched on a time series basis in order to obtain a magnetic flux signal for each channel. Thus, only one processing circuit need to be provided for a large number of SQUID flux sensors, thus reducing the scale of the fluxmeter and making the device small.

公开(公告)号：US08594605B2

公开(公告)日：2013-11-26

申请号：US13357664

申请日：2012-01-25

申请人： Yusaku Katsube ,  Kosuke Tsuiji ,  Yutaka Igarashi ,  Akio Yamamoto

发明人： Yusaku Katsube ,  Kosuke Tsuiji ,  Yutaka Igarashi ,  Akio Yamamoto

IPC分类号： H04B1/10 ,  H04K3/00

CPC分类号： H03H11/1252 ,  H03H11/1291 ,  H03H2210/012 ,  H03H2210/015 ,  H03H2210/025 ,  H03H2210/028

摘要： The present invention is directed to accurately set a frequency characteristic of a filter integrated in a semiconductor integrated circuit. A semiconductor integrated circuit includes a filter circuit, a cutoff frequency calibration circuit, and a Q-factor calibration circuit. The cutoff frequency calibration circuit adjusts cutoff frequency of the filter circuit to a desired value by adjusting capacitance components of the filter circuit. After adjustment of the cutoff frequency of the filter circuit by the cutoff frequency calibration circuit, the Q-factor calibration circuit adjusts the Q factor of the filter circuit to a desired value by adjusting a resistance component of the filter circuit.

摘要翻译： 本发明旨在精确地设定集成在半导体集成电路中的滤波器的频率特性。 半导体集成电路包括滤波电路，截止频率校准电路和Q因子校准电路。 截止频率校准电路通过调整滤波器电路的电容分量来将滤波器电路的截止频率调整到期望值。 在通过截止频率校准电路调节滤波电路的截止频率之后，Q因子校准电路通过调整滤波器电路的电阻分量来将滤波器电路的Q因子调节到期望值。

公开(公告)号：US08525584B2

公开(公告)日：2013-09-03

申请号：US13180303

申请日：2011-07-11

申请人： Yusaku Katsube ,  Yutaka Igarashi ,  Akio Yamamoto

发明人： Yusaku Katsube ,  Yutaka Igarashi ,  Akio Yamamoto

IPC分类号： H03K5/00

CPC分类号： H03H11/1291 ,  H03J2200/08 ,  H03J2200/10

摘要： The disclosed invention enables the cutoff frequency of a filter to be automatically adjusted to an arbitrary setting value within the adjustment range. An automatic cutoff frequency adjusting circuit includes a voltage/current converter circuit, a charge circuit, a discharge circuit, a digital capacitance having a plurality of electrostatic capacitances, a comparator for comparing a voltage inputted to the digital capacitance with a reference voltage, and a capacitance control circuit for controlling the digital capacitance. The time until the comparator detects that the voltage inputted to the digital capacitance is higher than the reference voltage after a reset signal has become a predetermined logic level is measured, and the digital capacitance is controlled by repeating, under a predetermined condition, processing for obtaining a next setting value of the digital capacitance, based on a measurement result, a target value of the digital capacitance, and the current value of the digital capacitance.

摘要翻译： 所公开的发明使得能够将滤波器的截止频率自动调整到调整范围内的任意设定值。 自动截止频率调节电路包括电压/电流转换器电路，充电电路，放电电路，具有多个静电电容的数字电容，用于将输入到数字电容的电压与参考电压进行比较的比较器，以及 用于控制数字电容的电容控制电路。 在比较器检测到在复位信号已经变为预定逻辑电平之后，比较器检测到输入到数字电容的电压高于参考电压的时间，并且通过在预定条件下重复以获得的处理来控制数字电容 基于测量结果，数字电容的目标值和数字电容的当前值的数字电容的下一个设定值。

公开(公告)号：US08463225B2

公开(公告)日：2013-06-11

申请号：US13353567

申请日：2012-01-19

申请人： Yutaka Igarashi ,  Yusaku Katsube

发明人： Yutaka Igarashi ,  Yusaku Katsube

IPC分类号： H04B1/28

CPC分类号： H04B1/30 ,  H03D2200/0045 ,  H03D2200/0047

摘要： The present invention is provided to shorten the period of DC offset cancellation operation. One of terminals of two calibration resistors is connected to the differential output terminals of an active low pass filter having a filter process and an amplification function, and two input terminals of a voltage comparator and two terminals of a switch are connected to the other terminal of the two calibration resistors. In a calculation period of calculating digital control signals for reducing DC offset voltage, the voltage comparator detects calibration voltage depending on a voltage drop of one of the calibration resistors caused by analog current of a digital-to-analog converter. In a calibration period of reducing the DC offset voltage, the calibration analog current of the digital-to-analog converter responding to the digital control signal is passed to the input side of the filter via the switch.

摘要翻译： 提供本发明以缩短DC偏移消除操作的周期。 两个校准电阻器的一个端子连接到具有滤波处理和放大功能的有源低通滤波器的差分输出端子，电压比较器的两个输入端子和开关的两个端子连接到 两个校准电阻。 在计算用于减小DC偏移电压的数字控制信号的计算周期中，电压比较器根据由数模转换器的模拟电流引起的校准电阻之一的电压降检测校准电压。 在减小DC偏移电压的校准周期中，响应于数字控制信号的数模转换器的校准模拟电流通过开关传递到滤波器的输入侧。

公开(公告)号：US07664311B2

公开(公告)日：2010-02-16

申请号：US11039902

申请日：2005-01-24

申请人： Hiroshi Yamasaki ,  Hiroshi Ootsuki ,  Yutaka Igarashi

发明人： Hiroshi Yamasaki ,  Hiroshi Ootsuki ,  Yutaka Igarashi

IPC分类号： G06K9/00

CPC分类号： G06T7/0006 ,  G01B11/14 ,  G01N21/95684 ,  G01N2021/95646 ,  G06T2207/30141 ,  G06T2207/30152 ,  H05K1/0269 ,  H05K3/3484

摘要： There is provided a component mounting inspecting apparatus which can automatically set a solder bridge inspection region (an inspection point) and output an optimum inspection result of a solder bridge. The component mounting board inspecting apparatus for inspecting a solder bridge of an electronic circuit board, in which a plurality of electrode pads are formed at predetermined spaced intervals and cream solder is applied on the electrode pads, includes a mechanism for automatically determining a distance between adjacent electrode pads and a mechanism for automatically setting a solder bridge inspection point if the distance between the adjacent electrode pads is equal to or shorter than a threshold value.

摘要翻译： 提供了一种可以自动设置焊桥检查区域（检查点）并输出焊接桥的最佳检查结果的部件安装检查装置。 用于检查电子电路板的焊接桥的部件安装板检查装置，其中多个电极焊盘以预定的间隔形成并且膏状焊料被施加在电极焊盘上，包括用于自动确定相邻的 电极焊盘和用于在相邻电极焊盘之间的距离等于或小于阈值时自动设置焊接桥检查点的机构。