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公开(公告)号：US11108457B2
公开(公告)日：2021-08-31
申请号：US16704038
申请日：2019-12-05
Inventor： Ryan E. Long , Thomas R. Vaccaro
Abstract: A method, system, and computer program are described for identifying the presence of narrowband signals within a wide instantaneous bandwidth by exploiting the spatial diversity of the received signals using an array aperture to provide detection capability. For example, the method includes receiving and channelizing digitized signals into signals with a narrow bandwidth of interest. The method further includes estimating covariance matrices associated with the signals, determining a set of Eigenvalues for the covariance matrices, and analyzing each Eigenvalue to determine a rank change estimate. The method further includes identifying one or more of the signals that have a positive rank change estimate, computing a beam forming weight and direction estimate for each signal that has a positive rank change estimate, and outputting an indication of the signals that have a positive rank change estimate including one or more of fine timing information, the beamforming weights, and the direction estimate.
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公开(公告)号：US11108383B1
公开(公告)日：2021-08-31
申请号：US17025049
申请日：2020-09-18
Inventor： David D. Moser , Michael J. Frack , Mark R. Shaffer , Daniel L. Stanley
Abstract: A clock phase control circuit includes a clock input gate module, first and second shift register divider modules, and a multiplexer. The clock input gate module is configured to produce, based on an oscillating input clock signal, first and second intermediate clock signals. The first shift register divider module is configured to produce at least one first phase clock signal based on the first intermediate clock signal, where the at least one first phase clock signal has a different frequency than the first intermediate clock signal. The second shift register divider module is configured to produce at least one second phase clock signal based on the second intermediate clock signal, where the at least one second phase clock signal has a different frequency than the second intermediate clock signal. The multiplexer is configured to produce an output clock signal by selecting one of the first or second phase clock signals.
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公开(公告)号：US11108381B2
公开(公告)日：2021-08-31
申请号：US16425234
申请日：2019-05-29
Inventor： Bradley R. Alford , Nathan R. Broyer , Greg M. Fehling , Hock J. Lee , Jeffrey P. Woodward , John Cummings
Abstract: A digital signal processor is designed to channelize an input signal, and includes a channelizer circuit and a plurality of tuning modules. The channelizer circuit is designed to receive an input signal having a first bandwidth and to channelize the input signal into a first set of channels each having a bandwidth smaller than the first bandwidth as a first output signal and to channelize the input signal into a second set of channels having a bandwidth smaller than the first bandwidth as a second output signal. The plurality of tuning modules are designed to receive one or more channels from the first output signal or the second output signal and to further downsample the one or more channels to a user-defined bandwidth at a user-defined center frequency. Each of the plurality of tuning modules include a plurality of FIR filter blocks and a memory having a plurality of FIR filter coefficients.
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公开(公告)号：US11088877B1
公开(公告)日：2021-08-10
申请号：US16865639
申请日：2020-05-04
Inventor： Masoud Farshchian , William H. Alexander
Abstract: Techniques, systems, architectures, and methods for providing improved feature detection of signals, especially those in relatively high interference regions, thereby allowing for earlier and longer range detection of communications and radar signals are herein provided. The techniques utilize a general framework of total variation denoising, where signals are assumed to be sparse in a combination of their first or higher order derivatives, to increase signal-to-interference ratio, which is followed by cyclostationarity detection, which is used to estimate signal features, including the period of the signals of interest and their modulation type.
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公开(公告)号：US20210239442A1
公开(公告)日：2021-08-05
申请号：US17217971
申请日：2021-03-30
Inventor： Francis M. Feda , John R. Franzini , Gregory S. Notaro
Abstract: Techniques and architecture are disclosed for a system that includes a fuze at a leading end of a projectile body and a fuze setter configured to engage the fuze and to program the same prior to launch. The system, in one example, includes a plurality of electrical contact pads on an exterior surface of a fuze radome housing and a plurality of electrical contact pins on the fuze setter. The electrical contact pads are arranged in a rotationally symmetric pattern that enables an electrical interface to be formed with the electrical contact pins, regardless of the rotational orientation of the fuze. Commutation is performed to rotate signals to the electrical contact pins instead of requiring that the fuze be physically rotated to bring the electrical contact pads into alignment with the electrical contact pins.
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Patent Agency Ranking
公开(公告)号：US11067659B2
公开(公告)日：2021-07-20
申请号：US15380310
申请日：2016-12-15
Inventor： Court E. Rossman , Costin Barbu , Thomas R. Vaccaro
Abstract: A system and method for rank estimation of electromagnetic emitters is provided. One exemplary feature of the system and method includes the use of a Fixed Sigma Gaussian Mixture Model (FSGMM) to determine a rank estimation of electromagnetic emitters. Another exemplary feature of the system and method includes the use of a Gaussian Mixture Model (GMM) clustering approach in conjunction with an Akaike Criterion Information (AIC) to determine a number of clusters and associated statistics of emitters.
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公开(公告)号：US20210218382A1
公开(公告)日：2021-07-15
申请号：US16738441
申请日：2020-01-09
Inventor： Mark D. Hickle
Abstract: Techniques are disclosed for filtering a radio frequency (RF) signal using an N-path bandstop filter with an extended, spurious-free upper passband. In an embodiment, a bandstop filter includes a bank of three switched capacitors in series with the RF signal path through the filter, in contrast to 4- or 8-capacitor banks or other bandstop filters where N is a power of 2. In this 3-path example configuration, an undesirable spurious bandstop notch at the 3rd and 5th harmonics of the clock frequency are eliminated or substantially reduced, improving performance of the filter in the desired passbands while preserving the notch in the desired stopband at high RF signal frequencies. Another N-path bandstop filter embodiment includes a bridged T-coil circuit, which absorbs a shunt capacitance of the bandstop filter into the bridged T-coil circuit.
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公开(公告)号：US11057067B1
公开(公告)日：2021-07-06
申请号：US16846824
申请日：2020-04-13
Inventor： Mark D. Hickle , Robert W. Sepanek , Mark E. Stuenkel
Abstract: Techniques are disclosed for self-interference signal cancellation. A hybrid self-interference cancellation (SIC) circuit is configured to be operatively coupled to a transmitter and a receiver, and includes a tunable time domain filter in series with a tunable frequency domain filter. The tunable time domain filter is configured to generate a time-domain multipath cancellation signal based on a first radio signal transmitted by the transmitter at a first frequency while the receiver is receiving a second radio signal at a second frequency. The first and second frequencies can be the same or different and have similar or different power levels at the antennas. The tunable frequency domain filter, which is in series with the tunable time domain filter, is configured to generate a frequency-domain cancellation signal based on the first radio signal while the receiver is receiving the second radio signal.
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公开(公告)号：US20210191503A1
公开(公告)日：2021-06-24
申请号：US16720130
申请日：2019-12-19
Inventor： Roman KHAZANOVICH
IPC: G06F1/3296 , G06F21/60 , G06F13/40
Abstract: The system and method of externally powered cold key load injects a voltage into a cryptographic computer without disturbing any data pins. There are several mechanical approaches that are viable, a Y cable implementation, a two cable solution, a direct connect solution, and more. The system includes the ability to provide a variable voltage power source to the cryptographic computer.
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公开(公告)号：US20210191136A1
公开(公告)日：2021-06-24
申请号：US16718919
申请日：2019-12-18
Inventor： Jeffrey L. JEW , Ian B. MURRAY , Michael J. SHAW
Abstract: The system and method for combining two optical assemblies into the same volume, particularly when the field of view of the two assemblies are different, so that the overall volume and swap for the system is reduced. This also allows both subsystems to use the same external protective window, reducing overall cost for a system of co-located dissimilar optical systems in a single aperture.
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