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431.发明授权公开(公告)号：US10964627B2
公开(公告)日：2021-03-30
申请号：US16696698
申请日：2019-11-26
Applicant: STMICROELECTRONICS S.R.L.
Inventor： Concetto Privitera , Maurizio Maria Ferrara , Fabio Vito Coppone
IPC: H01L21/44 , H01L21/48 , H01L23/495 , H01L23/34 , H01L23/00
Abstract: Packaged semiconductor device having a frame, of conductive material; a body of semiconductor material, fixed to the frame through a first adhesive layer; a heatsink element, fixed to the body through a second adhesive layer; and a packaging mass surrounding the body and, at least partially, the frame and the heatsink element. The heatsink element is formed by a heatsink die facing, and coplanar to, a main face of the device and by a spacer structure, which includes a pair of pedestals projecting from the perimeter of the heatsink die towards the body and rest on the body.
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公开(公告)号：US10962431B2
公开(公告)日：2021-03-30
申请号：US16220498
申请日：2018-12-14
Applicant: STMicroelectronics S.R.L.
Inventor： Enri Duqi , Sebastiano Conti , Sonia Costantini
Abstract: A pressure sensor designed to detect a value of ambient pressure of the environment external to the pressure sensor includes: a first substrate having a buried cavity and a membrane suspended over the buried cavity; a second substrate having a recess, hermetically coupled to the first substrate so that the recess defines a sealed cavity the internal pressure value of which provides a pressure-reference value; and a channel formed at least in part in the first substrate and configured to arrange the buried cavity in communication with the environment external to the pressure sensor. The membrane undergoes deflection as a function of a difference of pressure between the pressure-reference value in the sealed cavity and the ambient-pressure value in the buried cavity.
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433.发明授权公开(公告)号：US10954121B2
公开(公告)日：2021-03-23
申请号：US16708271
申请日：2019-12-09
Applicant: STMICROELECTRONICS S.R.L.
Inventor： Giorgio Allegato , Laura Oggioni , Matteo Garavaglia , Roberto Somaschini
Abstract: A microelectromechanical device having a first substrate of semiconductor material and a second substrate of semiconductor material having a bonding recess delimited by projecting portions, monolithic therewith. The bonding recess forms a closed cavity with the first substrate. A bonding structure is arranged within the closed cavity and is bonded to the first and second substrates. A microelectromechanical structure is formed in a substrate chosen between the first and second substrates. The device is manufactured by forming the bonding recess in a first wafer; depositing a bonding mass in the bonding recess, the bonding mass having a greater depth than the bonding recess; and bonding the two wafers.
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434.发明申请公开(公告)号：US20210083637A1
公开(公告)日：2021-03-18
申请号：US16984445
申请日：2020-08-04
Applicant: STMicroelectronics S.r.l.
Inventor： Stefano Valle , Flavio Polloni
Abstract: A method of monitoring electrical loads is disclosed. In an embodiment the method includes generating a first voltage signal and a second voltage signal, the second voltage signal in quadrature to the first voltage signal, injecting one of the first voltage signal or the second voltage signal into a signal propagation path towards an electrical load, sensing a current signal flowing through the electrical load as a result of the one of the first voltage signal or the second voltage signal injected into the signal propagation path and processing the first voltage signal, the second voltage signal and the sensed current signal.
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公开(公告)号：US20210081773A1
公开(公告)日：2021-03-18
申请号：US17023144
申请日：2020-09-16
Inventor： Nitin CHAWLA , Giuseppe DESOLI , Manuj AYODHYAWASI , Thomas BOESCH , Surinder Pal SINGH
IPC: G06N3/063 , G06F1/08 , G06F1/324 , G06F9/50 , G06N3/08 , G06F1/3228 , G06F1/3296
Abstract: Systems and devices are provided to increase computational and/or power efficiency for one or more neural networks via a computationally driven closed-loop dynamic clock control. A clock frequency control word is generated based on information indicative of a current frame execution rate of a processing task of the neural network and a reference clock signal. A clock generator generates the clock signal of neural network based on the clock frequency control word. A reference frequency may be used to generate the clock frequency control word, and the reference frequency may be based on information indicative of a sparsity of data of a training frame.
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Patent Agency Ranking
公开(公告)号：US20210072386A1
公开(公告)日：2021-03-11
申请号：US17011867
申请日：2020-09-03
Applicant: STMICROELECTRONICS S.r.l.
Inventor： Delfo Nunziato SANFILIPPO
Abstract: An optical proximity sensor comprises a solid-state photo-electric converter, a biasing circuit for biasing the solid-state photo-electric converter, and a drive circuit. The drive circuit is configured to control the biasing circuit to apply to the photo-electric converter a bias signal modulated between a first value and a second value, the second value different from the first value, wherein a modulated optical signal is emitted by the solid-state photo-electric converter towards a target object. The drive circuit is configured to receive an electrical output signal from the solid-state photo-electric converter, the electrical output signal being a function of a modulated optical signal received at the solid-state photo-electric converter as a result of reflection of the emitted modulated optical signal at the target object. The drive circuit is configured to perform a phase comparison of the modulated bias signal against the electrical output signal and produce, as a result of the phase comparison, a phase shift signal. The drive circuit is configured to compute a distance between the optical proximity sensor and the target object as a function of the phase shift signal.
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公开(公告)号：US20210068739A1
公开(公告)日：2021-03-11
申请号：US17009503
申请日：2020-09-01
Applicant: STMicroelectronics S.r.l.
Inventor： Francesco Rundo , Sabrina Conoci , Concetto Spampinato
Abstract: An embodiment method comprises collecting at least one electrophysiological signal of a human over a limited time duration, and computing a set of electrophysiological signal features. The computing comprises at least one of: providing at least one reference electrophysiological signal and applying dynamic time warping processing to the at least one collected and at least one reference electrophysiological signals, applying stacked-auto-encoder artificial neural network processing to the collected electrophysiological signal, or filtering the electrophysiological signal collected via joint low-pass and high-pass filtering. The method further comprises applying pattern recognition processing to the computed set of features, producing a virtual key signal indicative of an identity of the human, and applying the virtual key signal to a user circuit to switch it between a first state and a second state as a result of the virtual key signal matching an authorized key signal stored in the user circuit.
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公开(公告)号：US10943896B2
公开(公告)日：2021-03-09
申请号：US15965759
申请日：2018-04-27
Applicant: STMICROELECTRONICS S.R.L.
Inventor： Davide Giuseppe Patti
IPC: H01L27/02 , H01L29/10 , H01L29/78 , H01L29/417 , H01L29/66
Abstract: Power MOS device, in which a power MOS transistor has a drain terminal that is coupled to a power supply node, a gate terminal that is coupled to a drive node and a source terminal that is coupled to a load node. A detection MOS transistor has a drain terminal that is coupled to a detection node, a gate terminal that is coupled to the drive node and a source terminal that is coupled to the load node. A detection resistor has a first terminal coupled to the power supply node and a second terminal coupled to the detection node.
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公开(公告)号：US20210067157A1
公开(公告)日：2021-03-04
申请号：US16983596
申请日：2020-08-03
Applicant: STMicroelectronics S.r.l.
Inventor： Andrea Agnes
IPC: H03K17/687 , H03K17/16 , H02J7/00 , H02M3/158
Abstract: In an embodiment, a digital output driver circuit comprises an output stage having first and second transistors. A drive stage is configured to drive control terminals of the first and second transistors and comprising switching circuitry and current generator circuitry. In a first configuration, the driver circuit is configured to connect a control terminal of the second transistor to the reference node to turn off the second transistor; and connect a first capacitance to the current generator circuitry and to a control terminal of the first transistor to turn on the first transistor. In a second configuration, the driver circuit is configured to turn off the first transistor and connect the control terminal of the second transistor to the current generator circuitry and to the second capacitance to turn on the second transistor.
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公开(公告)号：US20210050859A1
公开(公告)日：2021-02-18
申请号：US16993608
申请日：2020-08-14
Applicant: STMicroelectronics S.r.l.
Inventor： Giovanni SICURELLA , Manuela LA ROSA
Abstract: A multiple-input analog-to-digital converter device includes analog-to-digital converter circuits arranged between input nodes and output nodes. The analog-to-digital converter circuits operate over respective conversion times to provide simultaneous conversion of the analog input signals into respective conversion time signals. A time-to-digital converter circuit includes timer circuitry common to the plurality of analog-to-digital converter circuits. The timer circuitry cooperates with the analog-to-digital converter circuits to convert the conversion time signals into digital output signals at the output nodes.
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