公开(公告)号：US20100040303A1

公开(公告)日：2010-02-18

申请号：US12542740

申请日：2009-08-18

Applicant: Angelo Bosco ,  Arcangelo Ranieri Bruna

Inventor： Angelo Bosco ,  Arcangelo Ranieri Bruna

IPC: G06K9/40

CPC classification number: H04N5/3675 ,  G06T5/002 ,  G06T5/005 ,  G06T5/20 ,  G06T7/0004 ,  G06T2207/10024 ,  H04N5/217

Abstract: A method for correcting an image from defects and filtering from Gaussian noise corrects each pixel of the image when it is considered defective and filters it from Gaussian noise in one-pass. The one-pass improves the speed for performing the correcting and filtering. The drawbacks associated with choosing incompatible defect correction and filtering operations are overcome.

Abstract translation: 一种从缺陷中校正图像并从高斯噪声滤波的方法，在被认为有缺陷的情况下校正图像的每个像素，并在一次通过时从高斯噪声中对其进行滤波。 单程提高了执行校正和过滤的速度。 克服了选择不兼容的缺陷校正和过滤操作相关的缺点。

公开(公告)号：US20090257257A1

公开(公告)日：2009-10-15

申请号：US12100958

申请日：2008-04-10

Applicant: Claudio Adragna ,  Aldo Novelli ,  Antonio Borrello ,  Laszlo Huber ,  Brian T. Irving ,  Milan M. Jovanovic

Inventor： Claudio Adragna ,  Aldo Novelli ,  Antonio Borrello ,  Laszlo Huber ,  Brian T. Irving ,  Milan M. Jovanovic

IPC: H02J1/10

CPC classification number: H02M3/1584 ,  H02M2003/1586

Abstract: Control device for a switching converter structure comprising at least a first and a second interleaved converter, wherein the control device is configured to designate one converter as master and at least the other converter as slave, to set a time delay of the operating cycle of the slave converter and to synchronize the master and the at the least one slave converter.

Abstract translation: 一种用于开关转换器结构的控制装置，包括至少第一和第二交错转换器，其中所述控制装置被配置为将一个转换器指定为主机，并且将至少另一转换器指定为从机，以设置所述操作周期的时间延迟 从器件转换器，并使主器件与至少一个从器件转换器同步。

公开(公告)号：US20090186447A1

公开(公告)日：2009-07-23

申请号：US12417461

申请日：2009-04-02

Applicant: Ubaldo Mastromatteo

Inventor： Ubaldo Mastromatteo

IPC: H01L21/50

CPC classification number: B81C1/00269 ,  B81B2207/093 ,  B81C1/00301 ,  H01L21/50 ,  H01L24/81 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/10135 ,  H01L2224/10165 ,  H01L2224/8014 ,  H01L2224/81136 ,  H01L2224/81139 ,  H01L2224/8114 ,  H01L2224/81801 ,  H01L2924/01006 ,  H01L2924/01032 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2224/05644 ,  H01L2924/00014 ,  H01L2224/05655 ,  H01L2224/05666

Abstract: A process for connecting two bodies forming parts of an electromechanical, fluid and optical microsystem, wherein a welding region is formed on a first body; an electrically conductive region and a spacing region are formed on a second body; the spacing region extends near the electrically conductive region and has a height smaller than the electrically conductive region. One of the first and second bodies is turned upside down on the other, and the two bodies are welded together by causing the electrically conductive region to melt so that it adheres to the welding region and collapses until its height becomes equal to that of the spacing region. Thereby it is possible to seal active parts or micromechanical structures with respect to the outside world, self-align the two bodies during bonding, obtain an electrical connection between the two bodies, and optically align two optical structures formed on the two bodies.

Abstract translation: 一种用于连接形成机电，流体和光学微系统的部件的两个主体的方法，其中在第一主体上形成焊接区域; 在第二主体上形成导电区域和间隔区域; 间隔区域在导电区域附近延伸并具有小于导电区域的高度。 第一和第二主体中的一个被另一个上下颠倒，并且两个主体通过使导电区域熔化而被焊接在一起，使得它粘附到焊接区域并且塌陷，直到其高度等于间隔的高度 地区。 因此，可以相对于外界来密封活动部件或微机械结构，在接合期间自对准两个主体，获得两个主体之间的电连接，并且光学对准在两个主体上形成的两个光学结构。

公开(公告)号：US20090073292A1

公开(公告)日：2009-03-19

申请号：US11857315

申请日：2007-09-18

Applicant: Alfio Castorina ,  Alessandro Capra

Inventor： Alfio Castorina ,  Alessandro Capra

IPC: H04N5/335

CPC classification number: H04N5/2353 ,  H04N5/35554

Abstract: A method is provided for obtaining an image with a large dynamic range. An image is acquired such that each image pixel is represented by a plurality of values obtained at the same time but for different integration levels (effective exposures). For each pixel, a representative value is selected among those available, such that it is neither saturated nor blackened.

Abstract translation: 提供了一种用于获得动态范围大的图像的方法。 获取图像，使得每个图像像素由同时获得但对于不同积分水平（有效曝光）获得的多个值表示。 对于每个像素，选择可用的代表值，使得它既不饱和也不变黑。

公开(公告)号：US20090034302A1

公开(公告)日：2009-02-05

申请号：US12181477

申请日：2008-07-29

Applicant: Eliana Cannella ,  Filippo Marino

Inventor： Eliana Cannella ,  Filippo Marino

IPC: H02H7/122

CPC classification number: H02M3/156 ,  H02M1/32 ,  H02M1/36

Abstract: A DC-DC converter including: a switch, having a control terminal receiving a control signal, and a conduction terminal supplying a current; a load, coupled to the conduction terminal of the switch and selectively receiving the current; a control circuit, receiving a clock signal and generating the control signal in synchronism with the clock signal; an overcurrent sensor, coupled to the switch so as to monitor an electrical quantity correlated to the current and to output a protection signal in presence of overcurrent; moreover including overcurrent-protection circuitry, receiving the protection signal and the clock signal and generating a disabling signal for the control circuit if delay between an overcurrent detection and the clock signal is shorter than a detection time.

Abstract translation: 一种DC-DC转换器，包括：具有接收控制信号的控制端子的开关和提供电流的导通端子; 负载，耦合到开关的导通端子并选择性地接收电流; 控制电路，与时钟信号同步地接收时钟信号并产生控制信号; 过电流传感器，耦合到开关，以便监视与电流相关的电量并在存在过电流的情况下输出保护信号; 此外包括过电流保护电路，接收保护信号和时钟信号，并且如果过电流检测与时钟信号之间的延迟比检测时间短，则产生用于控制电路的禁用信号。

公开(公告)号：US20080284631A1

公开(公告)日：2008-11-20

申请号：US12121073

申请日：2008-05-15

Applicant: Mario Chiricosta ,  Philippe Sirito-Olivier ,  Pietro Antonio Paolo Calo

Inventor： Mario Chiricosta ,  Philippe Sirito-Olivier ,  Pietro Antonio Paolo Calo

IPC: H03M1/34

CPC classification number: H04L25/0292 ,  H04L27/0002

Abstract: A digitizer for a digital receiver system includes an input terminal to receive a modulated analog input voltage signal, and an output terminal to provide an output voltage signal being a digital conversion of the input voltage signal. A comparator circuit has an output coupled to the output terminal and includes an operational amplifier having a first input terminal coupled to the input terminal. A threshold generator circuit is between the input terminal and a second input terminal of the at least one operational amplifier, to provide a tunable voltage reference signal thereto. The threshold generator circuit includes a thresholding circuit to determine a threshold voltage value of the modulated analog input voltage signal, and a tunable voltage reference circuit coupled to the thresholding circuit to generate the tunable voltage reference signal as a function of the threshold voltage value of the modulated analog input voltage signal.

Abstract translation: 用于数字接收机系统的数字转换器包括用于接收经调制的模拟输入电压信号的输入端子和输出端子，以提供作为输入电压信号的数字转换的输出电压信号。 比较器电路具有耦合到输出端的输出，并且包括具有耦合到输入端的第一输入端的运算放大器。 阈值发生器电路位于至少一个运算放大器的输入端和第二输入端之间，以向其提供可调参考信号。 阈值发生器电路包括阈值电路，用于确定调制的模拟输入电压信号的阈值电压值，以及耦合到阈值电路的可调电压参考电路，以产生可调电压参考信号，作为阈值电压值的函数 调制模拟输入电压信号。

公开(公告)号：US20080278222A1

公开(公告)日：2008-11-13

申请号：US11779631

申请日：2007-07-18

Applicant: Antonino CONTE ,  Carmelo Ucciardello

Inventor： Antonino CONTE ,  Carmelo Ucciardello

IPC: G05F3/08

CPC classification number: H02M3/073 ,  H02M2003/077

Abstract: A latch-type charge pump circuit is provided having first and second charge pump stages interconnected by an intermediate circuit node. The charge pump circuit includes first pump capacitors respectively coupled between first and second enable terminals and respective first inner circuit nodes, second pump capacitors respectively coupled between the second and first enable terminals and respective second inner circuit nodes, latch transistors coupled between each of the first and second inner circuit nodes and the intermediate circuit node, and a stabilization circuit having at least one stabilization stage coupled between the intermediate circuit node and the first and second enable terminals and connected to control terminals of the latch transistors for supplying them with suitable control signals so as to ensure their correct turn-on and turn-off during a charge sharing period of the charge pump circuit.

Abstract translation: 提供了一种闩锁式电荷泵电路，其具有通过中间电路节点互连的第一和第二电荷泵级。 电荷泵电路包括分别耦合在第一和第二使能端子和相应的第一内部电路节点之间的第一泵电容器，第二泵电容器分别耦合在第二和第一使能端子和相应的第二内部电路节点之间，锁存晶体管耦合在第一 和第二内部电路节点和中间电路节点，以及稳定电路，其具有耦合在中间电路节点与第一和第二使能端子之间的至少一个稳定级并且连接到锁存晶体管的控制端子，以向它们提供合适的控制信号 以确保在电荷泵电路的电荷共享期间其正确的导通和关断。

公开(公告)号：US20080028182A1

公开(公告)日：2008-01-31

申请号：US11829527

申请日：2007-07-27

Applicant: Hyungsang LEE ,  Dae Sik SONG ,  Jacopo Mulatti

Inventor： Hyungsang LEE ,  Dae Sik SONG ,  Jacopo Mulatti

IPC: G06F12/06

CPC classification number: G11C8/04 ,  G11C16/08

Abstract: An address counter for a nonvolatile memory device includes a cascade of cells. Each cell includes an address counting flip-flop that is updated to a value of every newly counted address bit, or latches a column address bit value input by an external user of the memory device during ALE cycles for addressing a start memory location on a selected page. Each cell further includes an additional address loading flip-flop for loading the column address bit value input during ALE cycles for addressing the start memory location on the selected page during the ALE cycles. A logic circuit updates the address counting flip flop to the address bit value during a read confirm cycle in a read sequence, and during a first data input cycle in a program sequence.

公开(公告)号：US20080001295A1

公开(公告)日：2008-01-03

申请号：US11855229

申请日：2007-09-14

Applicant: Simone Alba ,  Alessandro Spandre ,  Barbara Zanderighi

Inventor： Simone Alba ,  Alessandro Spandre ,  Barbara Zanderighi

IPC: H01L23/48

CPC classification number: H01L21/76838 ,  H01L21/0332 ,  H01L21/32139 ,  H01L21/76834

Abstract: The method prevents oxidation or contamination phenomena of conductive interconnection structures in semiconductor devices and includes providing a layer of semiconductor or oxide base, a conductive layer or stack on the base layer, and an antireflection coating (ARC) layer on the conductive layer or stack. The method provides a thin dielectric covering layer on the antireflection coating layer to fill or cover the microfissures existing in the antireflection coating layer.

Abstract translation: 该方法防止半导体器件中的导电互连结构的氧化或污染现象，并且包括在基底层上提供半导体层或氧化物层，导电层或叠层，以及导电层或叠层上的抗反射涂层（ARC）层。 该方法在抗反射涂层上提供薄的电介质覆盖层，以填充或覆盖存在于抗反射涂层中的微裂缝。

公开(公告)号：US20070300116A1

公开(公告)日：2007-12-27

申请号：US11759625

申请日：2007-06-07

Applicant: Marco CASARSA

Inventor： Marco CASARSA

IPC: G01R31/28 ,  G06F11/00

CPC classification number: H03K19/1737 ,  G01R31/318541 ,  H03K3/037

Abstract: An asynchronous set-reset circuit device for testing activity performed by an Automatic Test Patterns Generation tool may include a pair of logic gates having at least two inputs each, and a logic gate structure coupled upstream from the pair of logic gates. The logic gate structure may be for driving one respective input of the pair of logic gates and may have inputs receiving a pair of test command signals. The asynchronous set-reset circuit device may also include a plurality of feedback connections between outputs of the pair of logic gates and respective inputs of the logic gate structure.

Abstract translation: 用于测试由自动测试模式生成工具执行的活动的异步设置复位电路设备可以包括一对具有至少两个输入的逻辑门，以及耦合在该对逻辑门上游的逻辑门结构。 逻辑门结构可以用于驱动一对逻辑门的一个相应输入，并且可以具有接收一对测试命令信号的输入。 异步设置复位电路器件还可以包括在该逻辑门对的输出和逻辑门结构的相应输入之间的多个反馈连接。