Correlating out interactions and profiling the same
    41.
    发明授权
    Correlating out interactions and profiling the same 有权
    相互作用和分析相同

    公开(公告)号:US08244514B2

    公开(公告)日:2012-08-14

    申请号:US12110578

    申请日:2008-04-28

    CPC classification number: H04L67/22 H04L67/1002 H04L67/327

    Abstract: A method and system for correlating out interactions, which occur due to one or a set of specific events, of an application, which is deployed in multiple adjacent tiers in an actual environment is described. First, a simulation environment corresponding to the actual environment is created. Then, specific events are led to the actual environment and the simulation environment. A pattern(s) of interactions, which are related with the specific events, between adjacent tiers in the simulation environment and a large number of interactions between adjacent tiers in the actual environment are obtained. Afterwards, interactions, which are related with the specific events, between adjacent tiers among the obtained interactions between adjacent tiers in the actual environment are correlated using a template of the obtained pattern(s) of interactions, which are related with the specific events, between adjacent tiers in the simulation environment as a template.

    Abstract translation: 描述了在实际环境中部署在多个相邻层中的用于将由于一个或一组特定事件而发生的交互相关联的应用的方法和系统。 首先,创建与实际环境对应的仿真环境。 那么具体的事件就会导致实际的环境和模拟环境。 获得与模拟环境中的相邻层之间的特定事件相关的交互模式以及实际环境中相邻层之间的大量交互。 之后,与实际环境中的相邻层之间获得的相互作用之间的相邻层之间的与具体事件相关的交互将使用获得的与特定事件相关的模式的模板相关联,这些模式与特定事件相关, 模拟环境中的相邻层作为模板。

    Human monoclonal antibodies to protein tyrosine kinase 7 (PTK7) and methods for using anti-PTK7 antibodies
    42.
    发明授权
    Human monoclonal antibodies to protein tyrosine kinase 7 (PTK7) and methods for using anti-PTK7 antibodies 有权
    蛋白酪氨酸激酶7(PTK7)的人单克隆抗体和使用抗PTK7抗体的方法

    公开(公告)号:US08222375B2

    公开(公告)日:2012-07-17

    申请号:US12095986

    申请日:2006-12-08

    Abstract: The present invention provides isolated monoclonal antibodies, particularly human monoclonal antibodies, that specifically bind to PTK7 with high affinity. Nucleic acid molecules encoding the antibodies of the invention, expression vectors, host cells and methods for expressing the antibodies of the invention are also provided. Immunoconjugates, bispecific molecules and pharmaceutical compositions comprising the antibodies of the invention are also provided. The invention also provides methods for detecting PTK7, as well as methods for treating various diseases, including cancer and infectious diseases, using anti-PTK7 antibodies.

    Abstract translation: 本发明提供了以高亲和力特异性结合PTK7的分离的单克隆抗体,特别是人单克隆抗体。 还提供了编码本发明抗体的核酸分子,表达载体,宿主细胞和用于表达本发明的抗体的方法。 还提供了免疫偶联物,双特异性分子和包含本发明抗体的药物组合物。 本发明还提供用于检测PTK7的方法,以及使用抗PTK7抗体治疗各种疾病(包括癌症和感染性疾病)的方法。

    Method of bandwidth control and bandwidth control device
    44.
    发明授权
    Method of bandwidth control and bandwidth control device 有权
    带宽控制和带宽控制装置的方法

    公开(公告)号:US07920592B2

    公开(公告)日:2011-04-05

    申请号:US11642238

    申请日:2006-12-20

    CPC classification number: H04L47/522 H04L47/24 H04L47/50 H04L47/527

    Abstract: A method of bandwidth control and a corresponding bandwidth control device are disclosed, in which a plurality of queues are provided, bandwidth is assigned to each of the queues on the basis of a strict priority scheme, and additional bandwidth is assigned to the queues on the basis of a fair queuing scheme.

    Abstract translation: 公开了一种带宽控制方法和相应的带宽控制装置,其中提供多个队列,基于严格优先级方案,将带宽分配给每个队列,并且将附加带宽分配给队列 公平排队计划的基础。

    METHODS AND SYSTEMS FOR REDUCING CLOCK SKEW IN A GATED CLOCK TREE
    45.
    发明申请
    METHODS AND SYSTEMS FOR REDUCING CLOCK SKEW IN A GATED CLOCK TREE 有权
    用于减少时钟树中的时钟的方法和系统

    公开(公告)号:US20100225353A1

    公开(公告)日:2010-09-09

    申请号:US12397654

    申请日:2009-03-04

    CPC classification number: H03K19/00323 G06F1/10 G06F17/505 G06F2217/62

    Abstract: Systems and methods for synthesizing a gated clock tree with reduced clock skew are provided. A gated clock tree circuit with reduced clock skew may include a clock source and edge-triggered state elements. A gated clock tree disposed between the clock source and state elements may include a level in which each logic gate has a common logic type. Logic gates in the gated clock tree may also be configured as logic-gate buffers. The logic gates may also be configured as NAND-gated equivalents. The clock signal distributed through the gated clock tree may drive both positive-edge-triggered and negative-edge-triggered state elements.

    Abstract translation: 提供了用于合成具有减少的时钟偏移的门控时钟树的系统和方法。 具有减少的时钟偏移的门控时钟树电路可以包括时钟源和边沿触发状态元件。 设置在时钟源和状态元件之间的选通时钟树可以包括其中每个逻辑门具有公共逻辑类型的级别。 门控时钟树中的逻辑门也可以配置为逻辑门缓冲器。 逻辑门也可以被配置为NAND门控等效。 通过门控时钟树分配的时钟信号可以驱动正边沿触发和负边沿触发状态元件。

    METHOD AND MODULE FOR CONTROLLING ROTATION OF A MOTORIZED SPINDLE
    46.
    发明申请
    METHOD AND MODULE FOR CONTROLLING ROTATION OF A MOTORIZED SPINDLE 审中-公开
    用于控制电动旋转的旋转的方法和模块

    公开(公告)号:US20100066291A1

    公开(公告)日:2010-03-18

    申请号:US12233475

    申请日:2008-09-18

    CPC classification number: H02P23/04

    Abstract: In a method and module for controlling rotation of a motorized spindle driven by a driving unit, a sensing unit is adapted for sensing vibration of the spindle and generates a voltage signal corresponding to the vibration of the spindle. A processing unit is coupled to the sensing unit for receiving the voltage signal therefrom, and outputs a control signal corresponding to the voltage signal upon detecting that the voltage signal is greater than a reference voltage corresponding to a predetermined vibration level of the spindle, such that the driving unit adjusts a rotation speed of the spindle in response to the control signal from the processing unit.

    Abstract translation: 在用于控制由驱动单元驱动的电动主轴的旋转的方法和模块中,感测单元适于感测主轴的振动并产生对应于主轴振动的电压信号。 处理单元耦合到感测单元,用于从其接收电压信号,并且在检测到电压信号大于与主轴的预定振动水平相对应的参考电压时,输出与电压信号相对应的控制信号,使得 驱动单元响应于来自处理单元的控制信号来调节主轴的转速。

    ELECTRONIC DEVICE SHELL
    47.
    发明申请
    ELECTRONIC DEVICE SHELL 失效
    电子设备外壳

    公开(公告)号:US20100027200A1

    公开(公告)日:2010-02-04

    申请号:US12340762

    申请日:2008-12-22

    CPC classification number: H05K5/0013 H04M1/0252

    Abstract: A shell of an electronic device includes a front cover, a rear cover, and a latching assembly. The front cover includes two first sidewalls. The rear cover includes two first borders. The latching assembly includes two first latching members, two spacers, and two groups of second latching members. The first latching members define a number of latch-receiving portions. The first latching members are fixed to the inner surface of first sidewall with a corresponding spacer intervened therebetween. The second latching member is mounted to the inner surface. Each of the second latching members includes a sliding pole and a cap. Each of the latch-receiving portion includes a sliding portion forming an entrance for a corresponding second latching member sliding into the latch-receiving portion, and a latching portion communicating with the sliding portion, which is an elongate slot parallel to the length direction of the first latching member.

    Abstract translation: 电子设备的外壳包括前盖,后盖和闩锁组件。 前盖包括两个第一侧壁。 后盖包括两个第一边框。 闩锁组件包括两个第一闩锁构件,两个间隔件和两组第二闩锁构件。 第一闩锁构件限定多个闩锁接收部分。 第一闭锁构件固定在第一侧壁的内表面上,并在其间插入相应的间隔件。 第二闩锁构件安装到内表面。 每个第二闩锁构件包括滑动杆和盖。 每个闩锁接收部分包括滑动部分,其形成滑动进入闩锁接收部分的对应的第二闩锁部件的入口,以及与滑动部分连通的闩锁部分,该滑动部分是平行于 第一闭锁构件。

    CPU frequency regulating circuit
    49.
    发明授权
    CPU frequency regulating circuit 失效
    CPU调频电路

    公开(公告)号:US07543162B2

    公开(公告)日:2009-06-02

    申请号:US11309769

    申请日:2006-09-22

    Applicant: Wen-Sheng Lu

    Inventor: Wen-Sheng Lu

    CPC classification number: G06F1/3203 Y02D10/126

    Abstract: An exemplary CPU frequency regulating circuit includes a detecting circuit, a comparing circuit, and an adjusting circuit. The detecting circuit is coupled to a power circuit of a CPU for receiving and amplifying a load voltage. The comparing circuit is coupled to the detecting circuit for comparing the amplified load voltage with a default voltage. The adjusting circuit is coupled between the comparing circuit and the CPU for selecting a CPU frequency according to a result of the comparison. The CPU frequency regulating circuit detects the load voltage of the power circuit of the CPU for selecting an appropriate frequency to the CPU according to a working condition.

    Abstract translation: 示例性CPU频率调节电路包括检测电路,比较电路和调整电路。 检测电路耦合到CPU的电源电路,用于接收和放大负载电压。 比较电路耦合到检测电路,用于将放大的负载电压与默认电压进行比较。 调整电路连接在比较电路和CPU之间,用于根据比较结果选择CPU频率。 CPU频率调节电路根据工作条件检测CPU的电源电路的负载电压,以对CPU进行适当的频率选择。

    Method and apparatus for optically measuring absolute displacement
    50.
    发明授权
    Method and apparatus for optically measuring absolute displacement 失效
    用于光学测量绝对位移的方法和装置

    公开(公告)号:US07268875B2

    公开(公告)日:2007-09-11

    申请号:US10897503

    申请日:2004-07-23

    CPC classification number: G01D5/344

    Abstract: A method and apparatus using two sets of polarized light detection systems are disclosed for optically measuring absolute displacement. In the first detection system a step motor is controlled to drive an analyzer to trace synchronously the displacement being measured by comparison of the magnitude of the intensity of two orthogonal light beams and then the number of control pulses from the step motor becomes a value of the displacement measured; and by comparison with the magnitude the intensity of a plurality of light beams with phase difference from a plurality of light paths in the second polarized light detection system the section of system operation is ascertain and consequently the absolute displacement is detected and measured.

    Abstract translation: 公开了使用两组偏振光检测系统的方法和装置,用于光学测量绝对位移。 在第一检测系统中,通过比较两个正交光束的强度的大小,控制步进电动机驱动分析仪同步跟踪测量的位移,然后来自步进电动机的控制脉冲的数量变为 位移测量; 并且通过与第二偏振光检测系统中的多个光路的相位差的多个光束的强度的大小进行比较,确定系统操作的部分,因此检测和测量绝对位移。

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