Amino-Functionalized Mesoporous Silica
    42.
    发明申请
    Amino-Functionalized Mesoporous Silica 审中-公开
    氨基官能化介孔二氧化硅

    公开(公告)号:US20080175783A1

    公开(公告)日:2008-07-24

    申请号:US11852680

    申请日:2007-09-10

    Abstract: The present invention relates to amino-functionalized mesoporous silica. The present invention provides amino-functionalized mesoporous silica having hexagonal platelet morphology with short channels perpendicular to the platelet. The lengths of the channels are preferably 10˜1000 nm. The present invention also provides a method for preparing amino-functionalized mesoporous silica having hexagonal platelet morphology comprising a series of steps in sequence which are reactive gel preparation before subjected to the microwave, microwave heating for co-condensation reaction and crystallization, and solvent extraction for surfactant removal. The direct co-condensation approach with microwave heating and adoption of sodium metasilicate as silica source can give great advantage in the view of economy and environment.

    Abstract translation: 本发明涉及氨基官能化介孔二氧化硅。 本发明提供具有六边形血小板形态的氨基官能化介孔二氧化硅,其具有垂直于血小板的短通道。 通道的长度优选为10〜1000nm。 本发明还提供一种制备具有六方晶片形态的氨基官能化介孔二氧化硅的方法,其包括在进行微波,微波加热共缩合反应和结晶之前的反应凝胶制备顺序的一系列步骤,以及溶剂萃取 表面活性剂去除。 采用微波加热和硅酸钠为原料的直接共缩合方法可以在经济和环境方面给予很大的优势。

    Method for forming isolation structure of flash memory device
    43.
    发明申请
    Method for forming isolation structure of flash memory device 审中-公开
    形成闪存器件隔离结构的方法

    公开(公告)号:US20080003739A1

    公开(公告)日:2008-01-03

    申请号:US11647744

    申请日:2006-12-28

    CPC classification number: H01L27/115 H01L21/76224 H01L27/11521

    Abstract: A method for forming an isolation structure of a flash memory device includes providing a substrate structure where a tunnel insulating layer, a conductive layer, and a padding layer are formed, etching the padding layer, the conductive layer, the tunnel insulating layer and the substrate to form a trench, forming a first insulating layer over the substrate structure and filling in a portion of the trench, forming a second insulating layer over the substrate structure, forming a third insulating layer over the substrate structure to fill the trench, polishing the first, second and third insulating layers using the padding layer as a polish stop layer, removing the padding layer and simultaneously recessing the third insulating layer to protrude the first and second insulating layers, and etching the first and second insulating layers while recessing the third insulating layer to form a protective layer on sidewalls of the conductive layer.

    Abstract translation: 一种用于形成闪速存储器件的隔离结构的方法包括提供一种衬底结构,其中形成隧道绝缘层,导电层和衬垫层,蚀刻衬垫层,导电层,隧道绝缘层和衬底 形成沟槽,在所述衬底结构上形成第一绝缘层并填充所述沟槽的一部分,在所述衬底结构上方形成第二绝缘层,在所述衬底结构上方形成第三绝缘层以填充所述沟槽, 使用所述衬垫层作为抛光停止层的第二绝缘层和第三绝缘层,去除所述衬垫层并同时使所述第三绝缘层凹陷以使所述第一绝缘层和所述第二绝缘层突出,并且在使所述第三绝缘层凹陷的同时蚀刻所述第一绝缘层和所述第二绝缘层 以在导电层的侧壁上形成保护层。

    Method for forming wall oxide layer and isolation layer in flash memory device
    44.
    发明授权
    Method for forming wall oxide layer and isolation layer in flash memory device 失效
    在闪速存储器件中形成壁氧化物层和隔离层的方法

    公开(公告)号:US07279394B2

    公开(公告)日:2007-10-09

    申请号:US11016436

    申请日:2004-12-17

    Inventor: Seung Cheol Lee

    Abstract: Disclosed herein are methods for forming wall oxide films in flash memory devices and methods for forming isolation films. After trenches are formed in the substrate, an ISSG (In-Situ Steam Generation) oxidization process is performed to form wall oxide films on sidewalls of the trenches. This process prohibits formation of facets at the top and bottom edge portions of the trenches. Thus, the top edges of the trenches are rounded. Furthermore, the ISSG oxidization process is performed at a low temperature for a relatively short time. Therefore, thermal stress due to carrying out an oxidization process for a long time is reduced and a dislocation phenomenon is thus prevented from occurring.

    Abstract translation: 本文公开了在快闪存储器件中形成壁氧化膜的方法和用于形成隔离膜的方法。 在衬底中形成沟槽之后,进行ISSG(原位蒸汽生成)氧化处理以在沟槽的侧壁上形成壁氧化膜。 该过程禁止在沟槽的顶部和底部边缘部分形成小面。 因此,沟槽的顶部边缘是圆形的。 此外,ISSG氧化过程在较短的时间内在低温下进行。 因此,长时间进行氧化处理引起的热应力降低,从而防止发生位错现象。

    Adaptive DCT/IDCT apparatus based on energy and method for controlling the same
    45.
    发明授权
    Adaptive DCT/IDCT apparatus based on energy and method for controlling the same 失效
    基于能量的自适应DCT / IDCT装置及其控制方法

    公开(公告)号:US07142598B2

    公开(公告)日:2006-11-28

    申请号:US10395616

    申请日:2003-03-24

    CPC classification number: H04N19/14 H04N19/122 H04N19/132 H04N19/176

    Abstract: Adaptive DCT/IDCT apparatus based on energy and method for controlling the same. The adaptive DCT/IDCT apparatus relates to a coding unit of a MPEG4/H.263 video coder, and performs an image processing operation with a high image quality at a high speed by calculating energy values for respective blocks and a mean energy value of the whole image. The apparatus includes an energy calculator for receiving an input image, dividing the input image into blocks of predetermined size, calculating energy values for respective blocks and a mean energy value, and comparing the energy values with the mean energy value; a DCT unit for dividing the input image into predetermined blocks, and performing a DCT operation on the divided blocks; an image coefficient processor for receiving DCT coefficients for respective blocks from the DCT unit according to a result of the comparison of the block's energy value and the mean energy value, and rearranging the DCT coefficients; and an IDCT unit for receiving rearranged DCT coefficients from the image coefficient processor, performing an IDCT operation on the rearranged DCT coefficients, and creating a restored image.

    Abstract translation: 基于能量的自适应DCT / IDCT装置及其控制方法。 自适应DCT / IDCT装置涉及MPEG4 / H.263视频编码器的编码单元,并且通过计算各个块的能量值和高分辨率的平均能量值,以高速执行具有高图像质量的图像处理操作 整体形象 该装置包括用于接收输入图像的能量计算器,将输入图像划分成预定尺寸的块,计算各个块的能量值和平均能量值,并将能量值与平均能量值进行比较; DCT单元,用于将输入图像分割成预定块,并对分割块进行DCT运算; 图像系数处理器,用于根据块的能量值与平均能量值的比较结果,从DCT单元接收各个块的DCT系数,并重新排列DCT系数; 以及IDCT单元,用于从图像系数处理器接收重新排列的DCT系数,对重新排列的DCT系数执行IDCT操作,以及创建恢复的图像。

    Method of manufacturing semiconductor device
    46.
    发明授权
    Method of manufacturing semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号:US06913976B2

    公开(公告)日:2005-07-05

    申请号:US10659814

    申请日:2003-09-11

    CPC classification number: H01L29/7881 H01L21/28247 H01L21/28273

    Abstract: Disclosed is a method of manufacturing the semiconductor devices. The method comprising the steps of forming a gate electrode on a semiconductor substrate, depositing an oxide film for a spacer on the gate electrode, implementing an anisotropic dry etch process for the oxide film for the spacer to form spacers at the sidewalls of the gate electrode, and implementing a rapid thermal annealing process for the spacers under an oxygen atmosphere in order to segregate hydrogen contained within the spacers toward the surface. Therefore, hydrogen contained within the spacer oxide film is not diffused into the tunnel oxide film and the film quality of the tunnel oxide film is thus improved. As a result, program or erase operation characteristics of the flash memory device and a retention characteristic of the flash memory device could be improved.

    Abstract translation: 公开了半导体器件的制造方法。 该方法包括以下步骤:在半导体衬底上形成栅电极,在栅电极上沉积用于间隔物的氧化物膜,实现用于间隔物的氧化膜的各向异性干蚀刻工艺,以在栅电极的侧壁处形成间隔物 并且在氧气氛下实施用于间隔物的快速热退火工艺,以便将包含在间隔物内的氢气朝向表面分离。 因此,间隔氧化膜中所含的氢不会扩散到隧道氧化膜中,因此隧道氧化膜的膜质量得到改善。 结果,可以提高闪速存储器件的编程或擦除操作特性以及闪速存储器件的保持特性。

    Method of manufacturing a semiconductor device by RTA process in nitrogen atmosphere
    47.
    发明授权
    Method of manufacturing a semiconductor device by RTA process in nitrogen atmosphere 失效
    在氮气氛下通过RTA工艺制造半导体器件的方法

    公开(公告)号:US06893981B2

    公开(公告)日:2005-05-17

    申请号:US10610628

    申请日:2003-07-02

    CPC classification number: H01L29/66825 H01L29/42324

    Abstract: Disclosed is a method of manufacturing a semiconductor device. A gate is formed on a given region of a semiconductor substrate. Spacers are then formed using DCS-HTO or TEOS. Hydrogen remaining within the spacers is removed by a RTA process under nitrogen atmosphere and nitride films are formed on the spacers at the same time. In case of a flash memory device, a retention characteristic can be improved. A process of forming the nitride film additionally required in a subsequent contact hole formation process may be omitted. The sheet resistance of the gate could be improved by promoting growth of a crystal grain of a tungsten silicide film constituting a control gate.

    Abstract translation: 公开了半导体器件的制造方法。 栅极形成在半导体衬底的给定区域上。 然后使用DCS-HTO或TEOS形成间隔物。 通过RTA工艺在氮气氛下除去留在间隔物内的氢,同时在间隔物上形成氮化物膜。 在闪速存储器件的情况下,可以提高保持特性。 可以省略在随后的接触孔形成处理中另外需要的形成氮化物膜的工艺。 通过促进构成控制栅极的硅化钨膜的晶粒的生长,可以提高栅极的薄层电阻。

    Method of expanding a digital image
    48.
    发明申请
    Method of expanding a digital image 审中-公开
    扩展数字图像的方法

    公开(公告)号:US20050100246A1

    公开(公告)日:2005-05-12

    申请号:US10978781

    申请日:2004-11-01

    Inventor: Seung-Cheol Lee

    CPC classification number: G06T3/4007

    Abstract: A method of expanding a digital image for preventing the discontinuity of an expanded image due to the change of the image signal using four pixels rather than two pixels as in the conventional method in analyzing the image signal. The method includes a first step of dividing an input image in the unit of four adjacent pixels, and dividing the four pixels into three sections; a second step of determining an interpolation function between the second and third pixels among the four adjacent pixels by analyzing the digital image every three sections; a third step of setting coordinate values for image expansion using the interpolation function determined at the second step; and a fourth step of obtaining an expanded image of the digital image by repeating the second and third steps until a last line of the digital image is processed.

    Abstract translation: 一种扩展数字图像的方法,用于防止由于在分析图像信号时像传统方法中使用四个像素而不是两个像素的图像信号的变化而导致的扩展图像的不连续性。 该方法包括以四个相邻像素为单位划分输入图像并将四个像素划分为三个部分的第一步骤; 通过每三个部分分析数字图像来确定四个相邻像素中的第二和第三像素之间的内插函数的第二步骤; 使用在第二步骤确定的插值函数来设置用于图像扩展的坐标值的第三步骤; 以及通过重复第二和第三步骤直到数字图像的最后一行被处理来获得数字图像的展开图像的第四步骤。

    H.263/MPEG video encoder for efficiently controlling bit rates and method of controlling the same
    49.
    发明申请
    H.263/MPEG video encoder for efficiently controlling bit rates and method of controlling the same 有权
    用于有效控制比特率的H.263 / MPEG视频编码器及其控制方法

    公开(公告)号:US20050063461A1

    公开(公告)日:2005-03-24

    申请号:US10925623

    申请日:2004-08-25

    Abstract: An H.263/MPEG video encoder using DCT in a mobile communication terminal. The H.263/MPEG video encoder controls a quantization value using granularity analysis by motion estimation and efficiently controls bit rates. The H.263/MPEG video encoder performs DCT for an input image (N−1), quantizes the input image to output the input image as a video stream, decodes the quantized signal by means of inverse quantization (IQ) and inverse discrete cosine transform (IDCT), and performs motion estimation in comparison with a next input image (N). The H.263/MPEG video encoder includes a granularity analyzing section for analyzing granularity using a result of performing the motion estimation, a granularity control section for controlling a quantization value for the quantization according to an analysis result of the granularity analyzing section, and a frame rate control section for controlling a frame speed of an output of the video stream.

    Abstract translation: 一种在移动通信终端中使用DCT的H.263 / MPEG视频编码器。 H.263 / MPEG视频编码器通过运动估计使用粒度分析来控制量化值,并有效地控制比特率。 H.263 / MPEG视频编码器对输入图像(N-1)进行DCT,对输入图像进行量化,将输入图像输出为视频流,通过逆量化(IQ)和反相离散余弦对量化信号进行解码 变换(IDCT),并且与下一个输入图像(N)进行运动估计。 H.263 / MPEG视频编码器包括:使用执行运动估计的结果分析粒度的粒度分析部分;粒度控制部分,用于根据粒度分析部分的分析结果控制量化量化值;以及 帧速控制部分,用于控制视频流的输出的帧速度。

    MPEG-4 encoder using H.263 multimedia chip
    50.
    发明申请
    MPEG-4 encoder using H.263 multimedia chip 失效
    MPEG-4编码器采用H.263多媒体芯片

    公开(公告)号:US20050025373A1

    公开(公告)日:2005-02-03

    申请号:US10702745

    申请日:2003-11-06

    Abstract: An MPEG-4 encoder utilizing an H.263 multimedia chip. The MPEG-4 encoder includes a DC (Direct Current) predictor for predicting a DC component of the image frame encoded by an H.263 standard upon receiving a prescribed MPEG-4 quantization value, and an MPEG-4 reconstruction image memory for converting the H.263 reconstruction image into an MPEG-4 reconstruction image, and storing the MPEG-4 reconstruction image. The MPEG-4 encoder removes spatial redundancy from source image data entered in frame units using a prescribed H.263 quantization value, predicts a DC component of an image frame having no spatial redundancy using a prescribed MPEG-4 quantization value, performs a VLC (Variable Length Coding) process on the image frame using the predicted DC component, and outputs the VLC-processed image frame in the form of an MPEG-4 bit stream. The MPEG-4 encoder reconstructs the image frame having no spatial redundancy, stores the reconstructed image frame, converts the reconstructed image frame into an MPEG-4 frame, stores the MPEG-4 frame, compares the stored image frame with a newly-entered next frame, and removes temporal redundancy according to a result of the comparison.

    Abstract translation: 一种使用H.263多媒体芯片的MPEG-4编码器。 MPEG-4编码器包括DC(直流)预测器,用于在接收到规定的MPEG-4量化值时预测由H.263标准编码的图像帧的DC分量,以及MPEG-4重建图像存储器,用于将 H.263重建图像转换为MPEG-4重建图像,并存储MPEG-4重建图像。 MPEG-4编码器使用规定的H.263量化值从以帧为单位输入的源图像数据中去除空间冗余,使用规定的MPEG-4量化值预测没有空间冗余的图像帧的DC分量,执行VLC( 可变长度编码)处理,并且以MPEG-4比特流的形式输出VLC处理的图像帧。 MPEG-4编码器重建没有空间冗余的图像帧,存储重建的图像帧,将重建的图像帧转换成MPEG-4帧,存储MPEG-4帧,将存储的图像帧与新输入的下一个 并根据比较结果去除时间冗余。

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