公开(公告)号：US06642109B2

公开(公告)日：2003-11-04

申请号：US10283073

申请日：2002-10-30

申请人： Seung Cheol Lee ,  Sang Wook Park

发明人： Seung Cheol Lee ,  Sang Wook Park

IPC分类号： H01L218247

CPC分类号： H01L27/115 ,  H01L27/11521

摘要： A method of manufacturing a flash memory cell in which an ion implantation process is performed before a cleaning process for etching a protrusion of a trench insulating film to a nipple shape. As a result, the etch rate at a portion except for portions in which a moat will occur along the trench insulating film is increased. Therefore, generation of the moat in the trench insulating film can be prevented and spacing of the floating gate can be optimized.

公开(公告)号：US07259078B2

公开(公告)日：2007-08-21

申请号：US11016437

申请日：2004-12-17

申请人： Seung Cheol Lee ,  Sang Wook Park ,  Pil Geun Song

发明人： Seung Cheol Lee ,  Sang Wook Park ,  Pil Geun Song

IPC分类号： H01L21/76

CPC分类号： H01L27/11526 ,  H01L21/76224 ,  H01L21/823462 ,  H01L21/823481 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/11546

摘要： Disclosed herein is a method for forming an isolation film of a semiconductor memory device. According to the disclosure, in a pre-treatment cleaning process performed before a tunnel oxide film is formed, a SC-1 cleaning process is performed at a temperature ranging from 60° C. to 70° C. Therefore, oxide films in a cell region and a peripheral region are recessed even in the SC-1 cleaning process as well as a DHF cleaning process. A DHF cleaning time can be thus reduced. Accordingly, the method can minimize loss of a silicon substrate by DHF and can thus control the depth of a moat.

摘要翻译： 本文公开了一种用于形成半导体存储器件的隔离膜的方法。 根据公开内容，在形成隧道氧化膜之前进行的预处理清洗处理中，在60℃〜70℃的温度范围内进行SC-1清洗工序。因此，电池中的氧化膜 区域和外围区域即使在SC-1清洁处理以及DHF清洁过程中也是凹陷的。 因此可以减少DHF清洗时间。 因此，该方法可以通过DHF使硅衬底的损耗最小化，从而可以控制护城河的深度。

公开(公告)号：US07211484B2

公开(公告)日：2007-05-01

申请号：US10745008

申请日：2003-12-23

申请人： Seung Cheol Lee ,  Sang Wook Park

发明人： Seung Cheol Lee ,  Sang Wook Park

IPC分类号： H01L21/336 ,  H01L21/8242 ,  C09K13/00

CPC分类号： H01L27/11526 ,  H01L27/105 ,  H01L27/11546

摘要： Disclosed is a method of manufacturing a flash memory device. In a flash memory device using a SA-STI scheme, a trench for isolation is buried with oxide. A field oxide film is then formed by means of a polishing process. Next, field oxide films of a cell region and a low-voltage transistor region are selectively etched by a given thickness. As EFH values of the cell region, the low-voltage transistor region and the high-voltage transistor region become same or similar, it is possible to secure stability of a subsequent process.

摘要翻译： 公开了一种制造闪速存储器件的方法。 在使用SA-STI方案的闪存器件中，用氧化物掩埋用于隔离的沟槽。 然后通过抛光工艺形成场氧化膜。 接下来，选择性地蚀刻单元区域和低电压晶体管区域的场氧化膜一定厚度。 作为单元区域的EFH值，低电压晶体管区域和高压晶体管区域变得相同或相似，可以确保后续处理的稳定性。

公开(公告)号：US07015097B2

公开(公告)日：2006-03-21

申请号：US10887260

申请日：2004-07-08

申请人： Seung Cheol Lee ,  Sang Wook Park ,  Pil Geun Song

发明人： Seung Cheol Lee ,  Sang Wook Park ,  Pil Geun Song

IPC分类号： H01L21/336

CPC分类号： H01L27/11539 ,  H01L27/11526 ,  H01L27/11536 ,  H01L27/11541 ,  H01L27/11543

摘要： Provided relates to a method of a flash memory device, which performs a first rapid thermal oxidation process at a H2 rich atmosphere for recovering an etched damage during a gate forming process, and performs a second rapid thermal oxidation process at the H2 rich atmosphere for ion-activating after performing an ion implantation process for forming a cell transistor junction and a peripheral circuit transistor junction. As a result of those processes, a Si-dangling bond cut off during a gate etching process has a Si—H combination structure and the whole processing time is reduced, and thus an abnormal oxidation caused at an edge of an ONO layer and a tunnel oxide film, which can make it possible to prevent a smiling phenomena of the ONO layer and a bird's beak phenomena of the tunnel oxide film.

摘要翻译： 本发明涉及一种闪存器件的方法，其在H 2富含气氛下进行第一快速热氧化处理，以在栅极形成工艺期间回收蚀刻损伤，并执行第二快速热氧化 在进行用于形成单元晶体管结的离子注入工艺和外围电路晶体管结的离子激活之后，在富H 2气氛下进行离子激活。 作为这些工艺的结果，在栅极蚀刻工艺期间切断的Si-悬挂键具有Si-H组合结构，并且整个处理时间减少，因此在ONO层和隧道的边缘处引起异常氧化 氧化膜，能够防止ONO层的微笑现象和隧道状氧化膜的鸟喙现象。

公开(公告)号：US06780743B2

公开(公告)日：2004-08-24

申请号：US10631200

申请日：2003-07-31

申请人： Sang Wook Park ,  Seung Cheol Lee ,  Jung Il Cho

发明人： Sang Wook Park ,  Seung Cheol Lee ,  Jung Il Cho

IPC分类号： H01L218247

CPC分类号： H01L27/11521 ,  H01L27/115

摘要： Disclosed is a method of forming a floating gate in a date flash memory device on which first and second polysilicon films are stacked. After the first polysilicon film is formed, a SiH4 gas is introduced to decompose SiH4 and SiO2 into Si and H2 and Si and O2. A N2 anneal process is then implemented so that the decomposed H2 gas and O2 gas react to a N2 gas and are then outgassed. Next, a SiH4 gas and a PH3 gas are introduced to form the second polysilicon film. A native oxide film within the interface of the first polysilicon film and the second polysilicon film is removed to improve characteristics of the data flash memory device.

摘要翻译： 公开了在第一和第二多晶硅膜堆叠的日期闪存器件中形成浮置栅极的方法。 在形成第一多晶硅膜之后，引入SiH 4气体以将SiH 4和SiO 2分解成Si和H 2以及Si和O 2。 然后实施N2退火工艺，使得分解的H 2气体和O 2气体与N 2气体反应，然后脱气。 接着，引入SiH 4气体和PH 3气体，形成第二多晶硅膜。 在第一多晶硅膜和第二多晶硅膜的界面内的自然氧化膜被去除以改善数据闪存器件的特性。

公开(公告)号：US06348377B2

公开(公告)日：2002-02-19

申请号：US09867602

申请日：2001-05-31

申请人： Cha Deok Dong ,  Seung Cheol Lee ,  Sang Wook Park ,  Dong Jin Kim

发明人： Cha Deok Dong ,  Seung Cheol Lee ,  Sang Wook Park ,  Dong Jin Kim

IPC分类号： H01L218242

CPC分类号： H01L28/91 ,  H01L21/76895 ,  H01L28/84

摘要： A cylindrical storage electrode in a semiconductor device is manufactured by forming a contact hole in a poly oxide film and by forming a first thin film on the film and in the hole. Next, a core oxide film and an anti-reflective coating film are formed on the first thin film to determine the height of the cylinder. A pattern is then formed by etching the anti-reflective coating film, core oxide film and the first thin film such that the poly oxide film is exposed. A second thin film is formed on the overall resultant structure, and a tungsten silicide layer is formed on the second thin film. Inner and outer walls of the cylinder are then formed by blanket-etching the tungsten silicide film and the second thin film such that the core oxide film is exposed. After the core oxide film is removed, a selective metastable polysilicon (SMPS) process is performed so that different grain growths are generated at the inner and outer walls of the cylinder. A storage electrode is then formed by annealing the cylinder. By depositing an amorphous silicon film on the inner wall of the cylinder-type capacitor and Si-rich tungsten silicide film on the outer wall, the surface area of the inner wall expands through normal SMPS and a rugged tungsten silicide film is formed on the outer wall. Spacing between cells is preserved, while generation of a bridge is prevented.

摘要翻译： 半导体器件中的圆柱形存储电极通过在多氧化物膜中形成接触孔并在膜上和孔中形成第一薄膜来制造。 接下来，在第一薄膜上形成芯氧化膜和抗反射涂膜，以确定气缸的高度。 然后通过蚀刻抗反射涂膜，芯氧化物膜和第一薄膜使得暴露多晶氧化物膜形成图案。 在总体结构上形成第二薄膜，在第二薄膜上形成硅化钨层。 然后通过对硅化钨膜和第二薄膜进行毯式蚀刻来形成圆筒的内壁和外壁，使得芯氧化膜暴露。 在去除核心氧化物膜之后，进行选择性亚稳态多晶硅（SMPS）工艺，使得在圆筒的内壁和外壁处产生不同的晶粒生长。 然后通过使圆筒退火形成存储电极。 通过在圆筒型电容器的内壁和外壁上的富Si硅化钨膜上沉积非晶硅膜，内壁的表面积通过正常的SMPS膨胀，并且在外部形成坚固的硅化钨膜 壁。 保留了单元间的间隔，同时防止了桥的产生。

公开(公告)号：US06913976B2

公开(公告)日：2005-07-05

申请号：US10659814

申请日：2003-09-11

申请人： Seung Cheol Lee ,  Sang Wook Park

发明人： Seung Cheol Lee ,  Sang Wook Park

IPC分类号： H01L21/8247 ,  H01L21/28 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  H10L21/336

CPC分类号： H01L29/7881 ,  H01L21/28247 ,  H01L21/28273

摘要： Disclosed is a method of manufacturing the semiconductor devices. The method comprising the steps of forming a gate electrode on a semiconductor substrate, depositing an oxide film for a spacer on the gate electrode, implementing an anisotropic dry etch process for the oxide film for the spacer to form spacers at the sidewalls of the gate electrode, and implementing a rapid thermal annealing process for the spacers under an oxygen atmosphere in order to segregate hydrogen contained within the spacers toward the surface. Therefore, hydrogen contained within the spacer oxide film is not diffused into the tunnel oxide film and the film quality of the tunnel oxide film is thus improved. As a result, program or erase operation characteristics of the flash memory device and a retention characteristic of the flash memory device could be improved.

摘要翻译： 公开了半导体器件的制造方法。 该方法包括以下步骤：在半导体衬底上形成栅电极，在栅电极上沉积用于间隔物的氧化物膜，实现用于间隔物的氧化膜的各向异性干蚀刻工艺，以在栅电极的侧壁处形成间隔物 并且在氧气氛下实施用于间隔物的快速热退火工艺，以便将包含在间隔物内的氢气朝向表面分离。 因此，间隔氧化膜中所含的氢不会扩散到隧道氧化膜中，因此隧道氧化膜的膜质量得到改善。 结果，可以提高闪速存储器件的编程或擦除操作特性以及闪速存储器件的保持特性。

公开(公告)号：US06893981B2

公开(公告)日：2005-05-17

申请号：US10610628

申请日：2003-07-02

申请人： Sang Wook Park ,  Seung Cheol Lee

发明人： Sang Wook Park ,  Seung Cheol Lee

IPC分类号： H01L21/8247 ,  H01L21/336 ,  H01L27/115 ,  H01L29/423 ,  H01L29/788 ,  H01L29/792 ,  H01L21/31 ,  H01L21/469

CPC分类号： H01L29/66825 ,  H01L29/42324

摘要： Disclosed is a method of manufacturing a semiconductor device. A gate is formed on a given region of a semiconductor substrate. Spacers are then formed using DCS-HTO or TEOS. Hydrogen remaining within the spacers is removed by a RTA process under nitrogen atmosphere and nitride films are formed on the spacers at the same time. In case of a flash memory device, a retention characteristic can be improved. A process of forming the nitride film additionally required in a subsequent contact hole formation process may be omitted. The sheet resistance of the gate could be improved by promoting growth of a crystal grain of a tungsten silicide film constituting a control gate.

摘要翻译： 公开了半导体器件的制造方法。 栅极形成在半导体衬底的给定区域上。 然后使用DCS-HTO或TEOS形成间隔物。 通过RTA工艺在氮气氛下除去留在间隔物内的氢，同时在间隔物上形成氮化物膜。 在闪速存储器件的情况下，可以提高保持特性。 可以省略在随后的接触孔形成处理中另外需要的形成氮化物膜的工艺。 通过促进构成控制栅极的硅化钨膜的晶粒的生长，可以提高栅极的薄层电阻。

公开(公告)号：US07067389B2

公开(公告)日：2006-06-27

申请号：US10887258

申请日：2004-07-08

申请人： Seung Cheol Lee ,  Sang Wook Park

发明人： Seung Cheol Lee ,  Sang Wook Park

IPC分类号： H01L21/76

CPC分类号： H01L27/11543 ,  H01L21/823462 ,  H01L27/105 ,  H01L27/11526

摘要： The present invention discloses a method for forming an element isolation film of a semiconductor device, comprising the steps of: sequentially forming a pad oxide film, a pad nitride film and a mask oxide film on a semiconductor substrate on which a first region for forming a high voltage device and a second region for forming a low voltage device or a flash memory cell are defined; etching the mask oxide film, the pad nitride film and the pad oxide film in the first region and the mask oxide film in the second region, and forming an oxide film for the high voltage device in the first region; removing the residual pad nitride film in the second region; removing the nitride film and partially removing the oxide film for the high voltage device in the first region, wherein the oxide film for the high voltage device has a third thickness; removing the residual pad oxide film in the second region; partially removing the oxide film for the high voltage device in the first region according to a cleaning process, wherein the oxide film for the high voltage device has a third thickness; and forming a tunnel oxide film over the resulting structure, wherein a gate oxide film for a high voltage device including the oxide film for the high voltage device and the tunnel oxide film is formed in the first region, and the tunnel oxide film for the low voltage device and cell is formed in the second region.

摘要翻译： 本发明公开了一种形成半导体器件的元件隔离膜的方法，包括以下步骤：在半导体衬底上依次形成衬垫氧化膜，衬垫氮化物膜和掩模氧化物膜，在半导体衬底上形成第一区域 定义高压装置和用于形成低电压装置或闪存单元的第二区域; 在所述第一区域中蚀刻所述掩模氧化膜，所述衬垫氮化物膜和所述衬垫氧化物膜，并且在所述第二区域中蚀刻所述掩模氧化物膜，并且在所述第一区域中形成用于所述高电压器件的氧化物膜; 去除所述第二区域中的所述残留的衬垫氮化物膜; 去除所述氮化物膜并部分地去除所述第一区域中的所述高电压器件的氧化物膜，其中所述高压器件的氧化物膜具有第三厚度; 去除所述第二区域中的残余衬垫氧化物膜; 根据清洁过程，部分去除第一区域中的高电压器件的氧化膜，其中用于高压器件的氧化物膜具有第三厚度; 并在所得到的结构上形成隧道氧化膜，其中在第一区域中形成用于包括用于高压器件的氧化物膜和隧道氧化物膜的高电压器件的栅极氧化膜，并且用于低电压的隧道氧化物膜 电压装置和电池形成在第二区域中。

公开(公告)号：US06908805B2

公开(公告)日：2005-06-21

申请号：US10739649

申请日：2003-12-18

申请人： Jung Il Cho ,  Seung Cheol Lee ,  Sang Wook Park

发明人： Jung Il Cho ,  Seung Cheol Lee ,  Sang Wook Park

IPC分类号： H01L21/336 ,  H01L21/316 ,  H01L21/8234 ,  H01L27/088 ,  H01L21/8238

CPC分类号： H01L21/823462

摘要： The present invention is provided to manufacture a dual gate oxide film. According to the present invention, it is possible to obtain a high-quality NO gate oxide film for high voltage and a high-quality NO gate oxide film for low voltage where nitrogen is distributed uniformly in the entire oxide films by carrying out a rapid annealing process in an inert atmosphere after carrying out an NO annealing process in order to prevent a phenomenon that nitrogen is not distributed uniformly and segregated in a gate oxide film for high voltage due to application of the NO annealing process after forming a gate oxide film for low voltage.

摘要翻译： 提供本发明以制造双栅氧化膜。 根据本发明，可以获得用于高电压的高质量NO栅极氧化物膜和用于低电压的高质量NO栅极氧化物膜，其中氮通过进行快速退火而在整个氧化物膜中均匀分布 在进行NO退火处理之后，在惰性气氛中进行处理，以防止由于在形成低氧化物膜的栅极氧化膜之后施加NO退火工艺，氮不均匀地分布在高电压的栅极氧化膜中分离 电压。