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    Electronic device with foveated display system
    42.
    发明授权
    Electronic device with foveated display system 有权

    公开(公告)号：US10885883B2

    公开(公告)日：2021-01-05

    申请号：US16477155

    申请日：2018-01-18

    Applicant: Apple Inc.

    Inventor： Ivan Knez ,  Chun-Yao Huang

    IPC: G09G5/391 ,  G06F3/01 ,  G09G3/20

    Abstract: An electronic device may have a display. A gaze detection system may gather information on a user's point of gaze on the display. Based on the point-of-gaze information, control circuitry in the electronic device may produce image data for an image with areas of different resolutions. A full-resolution portion of the image may overlap the point of gaze. Lower resolution portions of the image may surround the full-resolution portion. The display may have a pixel array. The pixel array may include rows and columns of pixels. Data lines may be used to supply data to the columns of pixels in accordance with row selection signals supplied to the rows of pixels. Display driver circuitry may be used to display the image using the pixel array. The display driver circuitry may have row selection circuitry and column expander circuitry that are responsive to a resolution mode selection signal.

    Pixel array antialiasing to accommodate curved display edges
    44.
    发明授权
    Pixel array antialiasing to accommodate curved display edges 有权

    公开(公告)号：US10409118B1

    公开(公告)日：2019-09-10

    申请号：US15498356

    申请日：2017-04-26

    Applicant: Apple Inc.

    Inventor： Pei-En Chang ,  Szu-Hsien Lee ,  Hsin-Ying Chiu ,  Chun-Yao Huang ,  Kyung Wook Kim ,  Shih Chang Chang ,  Hossein Nemati

    IPC: G02F1/1343 ,  G02F1/1335 ,  G02F1/1333 ,  H01L27/32 ,  G02F1/133

    Abstract: An electronic device may have a housing and a display in the housing. The display may have one or more curved edges such as curved edges associated with rounded corners in the display and housing. The display may have an array of pixels. The display may include full-strength pixels and may have a band of antialiasing pixels having selectively reduced strengths to visually smooth content displayed along the curved edges. The pixels may be organic light-emitting diode pixels, liquid crystal display pixels, or other display pixels. Organic light-emitting diode pixels may have drive transistors and associated organic light-emitting diodes. Selectively elevated series or opaque light blocking structures of selectively reduced areas may be used to selectively reduce the strength of the antialiasing pixels. Liquid crystal display pixels may include electrodes of different shapes and/or opaque layer openings of different sizes to form antialiasing pixels in desired patterns.

    Display gate driver circuits with dual pulldown transistors
    45.
    发明授权
    Display gate driver circuits with dual pulldown transistors 有权

    公开(公告)号：US10037738B2

    公开(公告)日：2018-07-31

    申请号：US14862071

    申请日：2015-09-22

    Applicant: Apple Inc.

    Inventor： Rungrot Kitsomboonloha ,  Chun-Yao Huang ,  Kyung Wook Kim ,  Shih Chang Chang ,  Szu-Hsien Lee

    IPC: G09G3/36 ,  G09G3/3225 ,  G09G3/20

    CPC classification number: G09G3/3674 ,  G09G3/20 ,  G09G3/3225 ,  G09G3/3648 ,  G09G2300/0408 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/0291

    Abstract: A display is provided that includes an array of display pixels and gate driver circuitry for providing data and gate line signals to the display pixels. Gate driver circuitry may include gate driver circuits that generate the gate line signals. A gate driver circuit may include at least a buffer transistor, a bootstrapping capacitor coupled to the buffer transistor, a pulldown transistor coupled in series with the buffer transistor, and an isolation transistor coupled to the gate of the pulldown transistor. The buffer transistor may directly receive a first clock signal, whereas the isolation transistor may directly receive a second clock signal that is complementary to the first clock signal. The pulldown transistor is substantially larger than the buffer transistor. The buffer transistor is substantially larger than the isolation transistor. Configured as such, clock loading is minimized while the pulldown transistor is sized to provide the desired fall time performance.

    Display Gate Driver Circuits with Dual Pulldown Transistors
    49.
    发明申请
    Display Gate Driver Circuits with Dual Pulldown Transistors 审中-公开
    显示具有双下拉晶体管的栅极驱动器电路

    公开(公告)号：US20170004790A1

    公开(公告)日：2017-01-05

    申请号：US14862071

    申请日：2015-09-22

    Applicant: Apple Inc.

    Inventor： Rungrot Kitsomboonloha ,  Chun-Yao Huang ,  Kyung Wook Kim ,  Shih Chang Chang ,  Szu-Hsien Lee

    IPC: G09G3/36 ,  G09G3/32

    CPC classification number: G09G3/3674 ,  G09G3/20 ,  G09G3/3225 ,  G09G3/3648 ,  G09G2300/0408 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/0291

    Abstract: A display is provided that includes an array of display pixels and gate driver circuitry for providing data and gate line signals to the display pixels. Gate driver circuitry may include gate driver circuits that generate the gate line signals. A gate driver circuit may include at least a buffer transistor, a bootstrapping capacitor coupled to the buffer transistor, a pulldown transistor coupled in series with the buffer transistor, and an isolation transistor coupled to the gate of the pulldown transistor. The buffer transistor may directly receive a first clock signal, whereas the isolation transistor may directly receive a second clock signal that is complementary to the first clock signal. The pulldown transistor is substantially larger than the buffer transistor. The buffer transistor is substantially larger than the isolation transistor. Configured as such, clock loading is minimized while the pulldown transistor is sized to provide the desired fall time performance.

    Abstract translation: 提供了一种显示器，其包括用于向显示像素提供数据和栅极线信号的显示像素阵列和栅极驱动器电路。 栅极驱动器电路可以包括产生栅极线信号的栅极驱动器电路。 栅极驱动器电路可以包括至少缓冲晶体管，耦合到缓冲晶体管的自举电容器，与缓冲晶体管串联耦合的下拉晶体管，以及耦合到下拉晶体管的栅极的隔离晶体管。 缓冲晶体管可以直接接收第一时钟信号，而隔离晶体管可以直接接收与第一时钟信号互补的第二时钟信号。 下拉晶体管实质上大于缓冲晶体管。 缓冲晶体管基本上大于隔离晶体管。 如此配置，时钟负载最小化，而下拉晶体管的尺寸设置为提供所需的下降时间性能。

    Displays with radio-frequency identifiers
    50.
    发明授权
    Displays with radio-frequency identifiers 有权
    用射频标识符显示

    公开(公告)号：US09466018B2

    公开(公告)日：2016-10-11

    申请号：US14699417

    申请日：2015-04-29

    Applicant: Apple Inc.

    Inventor： Kwang Soon Park ,  Ming-Chin Hung ,  Chun-Yao Huang ,  Shih Chang Chang ,  Ming-Yuh Hsu

    IPC: H04Q5/22 ,  G06K19/077 ,  G02F1/1335 ,  G02F1/1368 ,  G02F1/133 ,  G06K7/10 ,  G02F1/1333

    CPC classification number: G06K19/0772 ,  G02F1/13306 ,  G02F1/133512 ,  G02F1/133528 ,  G02F1/1368 ,  G02F2001/133388 ,  G06K7/10198

    Abstract: A display may have an active area surrounded by an inactive border area. The display may be a liquid crystal display having a liquid crystal layer sandwiched between a color filter layer and a thin-film transistor layer. An upper polarizer may have a polarized central region that overlaps the active area of the display. The upper polarizer may also have an unpolarized portion in the inactive border area overlapping the border structures. The border structures may include colored material such as a white layer on the inner surface of the thin-film transistor layer. Binary information may be embedded into an array of programmable resonant circuits. The binary information may be a display identifier or other information associated with a display. The programmable resonant circuits may be tank circuits with adjustable capacitors, fuses, or other programmable components.

    Abstract translation: 显示器可以具有被非活动边界区域包围的活动区域。 显示器可以是具有夹在滤色器层和薄膜晶体管层之间的液晶层的液晶显示器。 上偏振器可以具有与显示器的有效区域重叠的偏振中心区域。 上偏振器还可以在非边界区域中具有与边界结构重叠的非偏振部分。 边界结构可以在薄膜晶体管层的内表面上包括诸如白色层的着色材料。 二进制信息可嵌入到可编程谐振电路阵列中。 二进制信息可以是与显示器相关联的显示标识符或其他信息。 可编程谐振电路可以是具有可调电容器，保险丝或其他可编程元件的储能电路。

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