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16 条记录 (耗时 0.014 秒)

    Gate line layout configuration
    1.
    发明授权
    Gate line layout configuration 有权

    公开(公告)号：US10170072B2

    公开(公告)日：2019-01-01

    申请号：US14860397

    申请日：2015-09-21

    申请人： APPLE INC.

    发明人： Byung Duk Yang ,  Chun-Yao Huang ,  Kyung Wook Kim ,  Patrick B. Bennett ,  Shih Chang Chang ,  Wonjae Choi ,  Hao-Lin Chiu ,  Kwang Soon Park ,  Xinyu Zhu

    IPC分类号： G09G5/00 ,  G09G3/20 ,  G02F1/1345

    摘要： A display device may include pixels and source lines that provide data line signals to the pixels. The display device may also include gate lines that provide gate signals to switches associated with the pixels. The display device may also include vertical gate lines disposed generally parallel to the source lines and coupled to the gate lines at cross point nodes. The display device may also include compensation lines, such that each compensation line is proximate to a respective vertical gate line. The compensation lines may transmit compensation signals having an opposite polarity as compared to respective gate signals to reduce or eliminate a kickback voltage on at least one of the plurality of pixels.

    SYSTEMS AND METHODS FOR DRIVING AN ELECTRONIC DISPLAY USING A RAMP DAC
    2.
    发明申请
    SYSTEMS AND METHODS FOR DRIVING AN ELECTRONIC DISPLAY USING A RAMP DAC 审中-公开

    公开(公告)号：US20180337687A1

    公开(公告)日：2018-11-22

    申请号：US15600356

    申请日：2017-05-19

    申请人： Apple Inc.

    发明人： Adam Adjiwibawa ,  David W. Lum ,  Wonjae Choi ,  Hynwoo Nho ,  Hopil Bae ,  Injae Hwang ,  Bryce T. Bradford ,  Jie Won Ryu ,  Hung Sheng Lin

    IPC分类号： H03M1/66 ,  H03M1/80 ,  G09G3/20

    摘要： A display device may include rows of pixels that displays image data on a display, data lines coupled to the rows of pixels, and a digital-to-analog converter (DAC) that outputs a ramp voltage signal including a data voltage to be depicted on a first pixel of the rows of pixels. The display device may also include a capacitor that receives the ramp voltage signal via the DAC and a circuit that sends a control signal to a circuit component that causes the DAC to couple to the capacitor via one of the data lines for a duration of time that comprises a first time when the ramp voltage signal is below the data voltage and a second time when the ramp voltage signal is approximately equal to the data voltage. The capacitor is coupled to the DAC when the ramp voltage signal is greater than zero.

    Systems and methods for driving an electronic display using a ramp DAC
    6.
    发明授权
    Systems and methods for driving an electronic display using a ramp DAC 有权

    公开(公告)号：US10715168B2

    公开(公告)日：2020-07-14

    申请号：US15600356

    申请日：2017-05-19

    申请人： Apple Inc.

    发明人： Adam Adjiwibawa ,  David W. Lum ,  Wonjae Choi ,  Hynwoo Nho ,  Hopil Bae ,  Injae Hwang ,  Bryce T. Bradford ,  Jie Won Ryu ,  Hung Sheng Lin

    IPC分类号： H03H11/26 ,  H03M1/66 ,  G09G3/20

    摘要： A display device may include rows of pixels that displays image data on a display, data lines coupled to the rows of pixels, and a digital-to-analog converter (DAC) that outputs a ramp voltage signal including a data voltage to be depicted on a first pixel of the rows of pixels. The display device may also include a capacitor that receives the ramp voltage signal via the DAC and a circuit that sends a control signal to a circuit component that causes the DAC to couple to the capacitor via one of the data lines for a duration of time that comprises a first time when the ramp voltage signal is below the data voltage and a second time when the ramp voltage signal is approximately equal to the data voltage. The capacitor is coupled to the DAC when the ramp voltage signal is greater than zero.

    LOAD ADAPTIVE POWER MANAGEMENT FOR A DISPLAY PANEL
    7.
    发明申请
    LOAD ADAPTIVE POWER MANAGEMENT FOR A DISPLAY PANEL 有权
    用于显示面板的负载自适应电源管理

    公开(公告)号：US20160358526A1

    公开(公告)日：2016-12-08

    申请号：US14732764

    申请日：2015-06-07

    申请人： Apple Inc.

    发明人： Chaohao Wang ,  Wonjae Choi ,  Sandro H. Pintz ,  Paolo Sacchetto

    IPC分类号： G09G3/20

    CPC分类号： G09G3/20 ,  G06F1/3234 ,  G06F1/3265 ,  G09G3/3208 ,  G09G3/3614 ,  G09G2330/021 ,  G09G2330/022 ,  G09G2360/08 ,  G09G2360/16 ,  G09G2360/18 ,  Y02B70/16

    摘要： This application relates to systems, methods, and apparatus for optimizing the operations of a power converter of a display panel based on image data to be output by the display panel. The power converter can include one or more switches that can be activated or deactivated based on the image data in order to shift a power efficiency of the power converter. Power efficiency is shifted as a result of balancing an amount of charge necessary for a load with an amount of resistance created when activating switches of the power converter. Therefore, by dynamically altering a configuration of a power converter based on image data, power efficiency of the power converter can be improved.

    摘要翻译： 本申请涉及基于要由显示面板输出的图像数据来优化显示面板的功率转换器的操作的系统，方法和装置。 功率转换器可以包括可以基于图像数据激活或去激活的一个或多个开关，以便移动功率转换器的功率效率。 由于功率转换器启动开关时产生的电阻量平衡负载所需的电荷量，因此电力效率转移。 因此，通过基于图像数据动态地改变功率转换器的配置，可以提高功率转换器的功率效率。

    FOVEATED DISPLAY
    10.
    发明申请
    FOVEATED DISPLAY 审中-公开

    公开(公告)号：US20190172399A1

    公开(公告)日：2019-06-06

    申请号：US16323751

    申请日：2017-08-14

    申请人： Apple Inc.

    发明人： Cheng Chen ,  Jason C. Sauers ,  Fletcher R. Rothkopf ,  David W. Lum ,  Chun-Yao Huang ,  Enkhamgalan Dorjgotov ,  Graham B. Myhre ,  Bennett S. Wilburn ,  Paolo Sacchetto ,  Shih Chang Chang ,  Wonjae Choi ,  Cheuk Chi Lo

    IPC分类号： G09G3/3266 ,  G09G3/3275 ,  G09G3/36

    摘要： An electronic device such as a head-mounted device may have displays. The display may have regions of lower (L) and higher (M, H) resolution to reduce data bandwidth and power consumption for the display while preserving satisfactory image quality. Data lines may be shared by lower and higher resolution portions of a display or different portions of a display with different resolutions may be supplied with different numbers of data lines. Data line length may be varied in transition regions between lower resolution and higher resolution portions of a display to reduce visible discontinuities between the lower and higher resolution portions. The lower and higher resolution portions of the display may be dynamically adjusted using dynamically adjustable gate driver circuitry and dynamically adjustable data line driver circuitry.