公开(公告)号：US06369685B1

公开(公告)日：2002-04-09

申请号：US09462403

申请日：2000-01-07

Applicant: Johann Milavec ,  Alain Chapuis

Inventor： Johann Milavec ,  Alain Chapuis

IPC: H01F500

CPC classification number: H01F27/2804 ,  H01F2027/2809

Abstract: The invention relates to a multi-layer planar inductance coil on a portion of a first plate-shaped support (10) which has a plurality of first conducting layers (14) which extend substantially parallel to each other and which is designed for holding and contacting further electronic components (32), wherein at least one conducting layer (14) of the first support, which forms a first electrical winding, is arranged for co-operation with a core (24) which is provided for guiding a magnetic flux and which is to be arranged in the portion, wherein at least one second plate-shaped support (20; 22; 44; 54) with a plurality of second conducting layers (16; 18) which extend substantially parallel to each other is so arranged in the portion parallel to the first support (10) that at least one conducting layer (16) of the second support, which provides a second electrical winding, can inductively co-operate with the core (24) and the first electrical winding.

Abstract translation: 本发明涉及在第一板状支撑件（10）的一部分上的多层平面电感线圈，该第一板状支撑件（10）具有多个第一导电层（14），该第一导电层基本上彼此平行地延伸，并且被设计用于保持和接触 进一步的电子部件（32），其中形成有第一电绕组的第一支撑件的至少一个导电层（14）布置成与用于引导磁通量的芯（24）配合，并且其中 布置在该部分中，其中具有基本上彼此平行延伸的多个第二导电层（16; 18）的至少一个第二板状支撑件（20; 22; 44; 54）被布置在 平行于第一支撑件（10）的部分，提供第二电线圈的第二支撑件的至少一个导电层（16）可以与芯子（24）和第一电线圈感应地协作。

公开(公告)号：US08766221B1

公开(公告)日：2014-07-01

申请号：US12957162

申请日：2010-11-30

Applicant: Alain Chapuis

Inventor： Alain Chapuis

IPC: G02B27/00

CPC classification number: H04B10/802

Abstract: A system and method are provided for bidirectional communications between a master device and one or more slave devices. Each slave device is coupled to first and second opto-isolators which are effective to provide galvanic isolation of the slave device from the master device. An encoder circuit is coupled between the master device and the first opto-isolators. A decoder circuit is coupled between the master device and the second opto-isolators. The master device generates transmissions to the slave devices along a first low logic path including the encoder and the first opto-isolators, wherein the decoder and the second opto-isolators are non-responsive to signals on the first path. The slave devices generate transmissions to the master device along a second low logic path including the second opto-isolators and the decoder, wherein the encoder and the first opto-isolators are non-responsive to signals on the second path.

Abstract translation: 提供了一种用于主设备和一个或多个从设备之间的双向通信的系统和方法。 每个从设备耦合到第一和第二光隔离器，其有效地从主设备提供从设备的电隔离。 编码器电路耦合在主设备和第一光隔离器之间。 解码器电路耦合在主设备和第二光隔离器之间。 主设备沿着包括编码器和第一光隔离器的第一低逻辑路径产生到从设备的传输，其中解码器和第二光隔离器对第一路径上的信号不响应。 从设备沿着包括第二光隔离器和解码器的第二低逻辑路径产生到主设备的传输，其中编码器和第一光隔离器对第二路径上的信号不响应。

公开(公告)号：US08179705B2

公开(公告)日：2012-05-15

申请号：US12127726

申请日：2008-05-27

Applicant: Alain Chapuis

Inventor： Alain Chapuis

IPC: H02M7/797

CPC classification number: H02M3/28 ,  H02J1/08 ,  H02J2001/008 ,  H02M2001/0012 ,  H02M2001/0048 ,  H02M2001/007 ,  H02M2001/008 ,  Y02B70/1491

Abstract: A power subsystem is actively optimized to improve total subsystem efficiency in a way that is responsive to changes in load requirements, power supply variations, and subsystem temperature variations. Detailed, multidimensional power loss models are developed for constituent devices which are then combined into a power subsystem containing a controller and circuity for measuring device operating parameters such as input and output voltage, output current, and temperature. Operating parameters are continually monitored, and set points are correspondingly changed based on the detailed power loss models to achieve maximum overall efficiency for the instantaneous operating state of the system.

Abstract translation: 电力子系统被积极优化，以提高总体子系统效率，以响应负载要求，电源变化和子系统温度变化的变化。 开发了详细的多维功率损耗模型，用于组成设备，然后将其组合到包含控制器和电路的电源子系统中，用于测量设备运行参数，如输入和输出电压，输出电流和温度。 操作参数被不断监控，设定点根据详细的功率损耗模型相应改变，以实现系统瞬时运行状态的最大总体效率。

公开(公告)号：US07743266B2

公开(公告)日：2010-06-22

申请号：US11781878

申请日：2007-07-23

Applicant: Alain Chapuis

Inventor： Alain Chapuis

IPC: G06F1/26 ,  G05F1/10

CPC classification number: H02M3/157

Abstract: A method and system is provided for optimizing the digital filter compensation coefficients of a digitally controlled switched mode power supply within a distributed power system. A power control system comprises at least one point-of-load (POL) regulator having a power conversion circuit adapted to convey power to a load and a digital controller coupled to the power conversion circuit though a feedback loop. The digital controller is adapted to provide a pulse width modulated control signal to the power switch responsive to a feedback measurement of an output of the power conversion circuit. The digital controller further comprises a digital filter having a transfer function defined by plural filter coefficients. The digital controller periodically stores a successive one of a plurality of samples of the feedback measurement. A serial data bus operatively connects the POL regulator to a system controller. The system controller retrieves each successive stored sample from the digital controller via the serial data bus. After retrieving a pre-determined number of the samples, the system controller calculates optimized filter coefficients for the digital filter and communicates the optimized filter coefficients to the digital controller. The digital controller thereafter uses the optimized filter coefficients in the digital filter.

Abstract translation: 提供了一种用于优化分布式电力系统内的数字控制开关模式电源的数字滤波器补偿系数的方法和系统。 功率控制系统包括至少一个负载点（POL）调节器，其具有适于通过反馈回路将能量传递给负载的功率转换电路和耦合到功率转换电路的数字控制器。 数字控制器适于响应于功率转换电路的输出的反馈测量而向电源开关提供脉宽调制控制信号。 数字控制器还包括具有由多个滤波器系数定义的传递函数的数字滤波器。 数字控制器周期性地存储反馈测量的多个样本中的连续的一个。 串行数据总线将POL调节器可操作地连接到系统控制器。 系统控制器通过串行数据总线从数字控制器检索每个连续存储的样本。 在获取预定数量的样本之后，系统控制器计算数字滤波器的优化滤波器系数，并将优化的滤波器系数传送给数字控制器。 数字控制器此后使用数字滤波器中的优化滤波器系数。

公开(公告)号：US07554778B2

公开(公告)日：2009-06-30

申请号：US11930065

申请日：2007-10-30

Applicant: Alain Chapuis

Inventor： Alain Chapuis

IPC: H02H7/00

CPC classification number: G06F1/30 ,  G06F1/26 ,  G06F1/28 ,  H02H7/261

Abstract: A power control system comprises a plurality of power control groups, with each group comprising a plurality of individual point-of-load regulators each adapted to provide respective regulated voltage outputs. The point-of-load regulators may be selected for inclusion in a power control groups based on characteristics of loads supplied by the point-of-load regulators. An intermediate bus controller is coupled to each of said power control groups through a serial data bus interface common to each group and an OK status line for each respective group. A front end regulator provides an intermediate bus voltage to each of the plurality of power control groups and to the intermediate bus controller. The plurality of point-of-load regulators of each group each further comprises a respective fault manager adapted to detect fault conditions and selectively communicate notifications of the fault conditions to other ones of the plurality of point-of-load regulators of the group and to the intermediate bus controller. This way, a common response to the fault conditions is taken by the point-of-load regulators of the group and other groups. A method for managing faults in the power control system is also disclosed.

Abstract translation: 功率控制系统包括多个功率控制组，每个组包括多个单独的负载点调节器，每个调整点适于提供相应的稳压电压输出。 可以根据由负载点调节器提供的负载特性，选择负载点调节器以包含在功率控制组中。 中间总线控制器通过每个组共同的串行数据总线接口和每个相应组的OK状态线耦合到每个所述功率控制组。 前端调节器为多个功率控制组和中间总线控制器中的每一个提供中间总线电压。 每个组的多个负载点调节器每个进一步包括相应的故障管理器，其适于检测故障状况并且选择性地将故障状况的通知传达到该组的多个负载点调节器中的其他一个，并且 中间总线控制器。 这样，对于故障条件的一个共同的响应是由组和其他组的负载点调节器来实现的。 还公开了一种用于管理功率控制系统中的故障的方法。

公开(公告)号：US07373527B2

公开(公告)日：2008-05-13

申请号：US10328154

申请日：2002-12-23

Applicant: Alain Chapuis

Inventor： Alain Chapuis

IPC: G06F1/00 ,  G05F1/00 ,  H02J3/14

CPC classification number: H02M3/285 ,  H02J1/102 ,  H02M3/1584 ,  Y10T307/391

Abstract: A system and method for providing interleaving point-of-load (POL) regulators such that each regulator's switching cycle is phase displaced with respect to those of other POL regulators in the array is disclosed. As a result, the aggregate input and/or output reflected ripple and noise of the input, output, or both is reduced. Each regulator in the array is associated with an unique address. A serial data-line writes the phase spacing programmed to each addressable POL regulator in the array. The present invention permits phase displacement of POL regulators without limitation to the input and output voltages of each of the regulators in the array. The array of POL regulators may also operate in a phase displaced mode with only a single control line. The need for separate controllers and multiple control lines is thereby eliminated.

Abstract translation: 公开了一种用于提供交织负载点（POL）调节器的系统和方法，使得每个调节器的开关周期相对于阵列中的其他POL调节器的切换周期是相位移位的。 结果，减少了输入，输出或两者的反射纹波和噪声的总输入和/或输出。 数组中的每个调节器与唯一的地址相关联。 串行数据线将编程的相位间隔写入阵列中的每个可寻址POL调节器。 本发明允许POL调节器的相位偏移，而不限于阵列中每个调节器的输入和输出电压。 POL调节器的阵列也可以以仅具有单个控制线的相移模式操作。 因此消除了对单独的控制器和多个控制线的需要。

公开(公告)号：US20080042632A1

公开(公告)日：2008-02-21

申请号：US11876756

申请日：2007-10-22

Applicant: Alain Chapuis ,  Shuyu Lei

Inventor： Alain Chapuis ,  Shuyu Lei

IPC: H03M1/12 ,  G05F1/10

CPC classification number: H02M3/1588 ,  H02M3/157 ,  H03M1/48 ,  Y02B70/1466

Abstract: A self-tracking analog-to-digital converter includes a digital-to-analog converter (DAC) adapted to provide a variable reference voltage, a windowed flash analog-to-digital converter (ADC) adapted to provide an error signal ek corresponding to a difference between an input voltage Vi and the variable reference voltage, and digital circuitry adapted to generate suitable control signals for the DAC based on the error signal ek. More particularly, the digital circuitry includes a first digital circuit adapted to provide a first function value f(ek) in response to the error signal ek, the first function value f(ek) representing an amount of correction to be applied to the variable reference voltage. A second digital circuit is adapted to provide a counter that combines the first function value f(ek) with a previous counter state Nk to provide a next counter state Nk+1, the next counter state Nk+1 being applied as an input to the digital-to-analog converter. A third digital circuit is adapted to scale the previous counter state Nk by a factor M and combine the scaled counter state M·Nk with the error signal ek to provide a digital output value Dk representing the input voltage Vi.

Abstract translation: 自跟踪模数转换器包括适于提供可变参考电压的数模转换器（DAC），适用于提供误差信号e 。 更具体地说，数字电路包括第一数字电路，其适于响应于误差信号提供第一函数值f（e k k k），第一函数值 f（e，k）表示要应用于可变参考电压的校正量。 第二数字电路适于提供将第一函数值f（e）与前一个计数器状态N N k N组合的计数器，以提供下一个计数器状态N < SUB> k + 1 ，下一个计数器状态N k + 1被作为数字模拟转换器的输入。 第三数字电路适于将先前的计数器状态N＆gt; k乘以因子M，并将经缩放的计数器状态MN＆lt;＆gt;和误差信号e＆ / SUB>以提供表示输入电压V i i i的数字输出值D 。

公开(公告)号：US20070069706A1

公开(公告)日：2007-03-29

申请号：US11605045

申请日：2006-11-27

Applicant: Alain Chapuis ,  Dennis Roark

Inventor： Alain Chapuis ,  Dennis Roark

IPC: G05F1/00

CPC classification number: H02M3/157 ,  H02M3/1588 ,  H02M2001/0012 ,  Y02B70/1466

Abstract: A switched mode voltage regulator has a digital control system that includes dual digital control loops. The voltage regulator comprises at least one power switch adapted to convey power between respective input and output terminals of the voltage regulator and a digital controller adapted to control operation of the power switches responsive to an output of the voltage regulator. The digital controller further comprises dual digital control loops in which a first control loop provides high speed with lower regulation accuracy and a second control loop has high accuracy with lower speed. Thus, the digital control system provides the advantages of both high speed and high regulation accuracy.

Abstract translation: 开关式电压调节器具有包括双数字控制回路的数字控制系统。 电压调节器包括至少一个电源开关，其适于在电压调节器的相应输入和输出端子之间传送功率，以及数字控制器，其适于根据电压调节器的输出来控制功率开关的操作。 数字控制器还包括双数字控制回路，其中第一控制回路以较低的调节精度提供高速度，并且第二控制回路具有较低精度的较低速度。 因此，数字控制系统具有高速度和高调节精度的优点。

公开(公告)号：US07049798B2

公开(公告)日：2006-05-23

申请号：US10293001

申请日：2002-11-13

Applicant: Alain Chapuis ,  Mahesh N. Thaker

Inventor： Alain Chapuis ,  Mahesh N. Thaker

IPC: G05F1/40

CPC classification number: H02J1/08 ,  H02J13/0003 ,  H02J2001/008 ,  H02M1/00

Abstract: A system and method is provided for using a point-on-load (“POL”) control unit to program and/or monitor a POL regulator. Specifically, in one embodiment of the present invention, a power supply controller is adapted to provide initial-configuration data to at least one POL regulator. A POL control unit (located within the POL regulator) then stores at least a portion of the initial-configuration data in a storage device and uses at least a portion of the initial-configuration data to produce an output. The POL control unit is further adapted to store fault-monitoring data in the storage device and provide at least a portion of the fault-monitoring data to the controller. If the provided portion violates a known parameter, the controller (or POL control unit) may respond by perform a particular action (e.g., disable the POL regulator, etc.). In another embodiment of the present invention, the POL regulator further includes at least one sensor circuit adapted to produce fault monitoring data, or data that can be used to determine the fault-monitoring data. In another embodiment of the invention, the initial-configuration data and the fault-monitoring data are transmitted over a serial data bus.

Abstract translation: 提供了一种用于使用点对点（“POL”）控制单元编程和/或监视POL调节器的系统和方法。 具体地，在本发明的一个实施例中，电源控制器适于向至少一个POL调节器提供初始配置数据。 POL控制单元（位于POL调节器内）然后将至少一部分初始配置数据存储在存储设备中，并且使用至少一部分初始配置数据来产生输出。 POL控制单元还适于将故障监视数据存储在存储设备中，并且将至少一部分故障监视数据提供给控制器。 如果所提供的部分违反已知参数，则控制器（或POL控制单元）可以通过执行特定动作（例如，禁用POL调节器等）来进行响应。 在本发明的另一个实施例中，POL调节器还包括适于产生故障监测数据的至少一个传感器电路，或可用于确定故障监测数据的数据。 在本发明的另一个实施例中，初始配置数据和故障监视数据通过串行数据总线发送。

公开(公告)号：US06958592B2

公开(公告)日：2005-10-25

申请号：US10724509

申请日：2003-11-26

Applicant: Alain Chapuis

Inventor： Alain Chapuis

IPC: H02M1/00 ,  G05F1/40 ,  H02M20060101 ,  H02M1/38 ,  H02M3/158

CPC classification number: H02M1/38 ,  H02M3/1588 ,  H03K17/165 ,  Y02B70/1466

Abstract: A switched mode power supply comprises a first switch coupled to an input power source, a second switch coupled to ground, and an output filter coupled to a phase node defined between the first and second switches. The first and second switches are responsive to a pulse width modulated signal to thereby regulate power provided to the output filter. A controller is provided in a feedback loop that monitors operation of the first and second switches and delays activation of one of the first and second switches to preclude simultaneous conduction. The controller comprises at least one delay control circuit adapted to delay delivery of the pulse width modulated signal to at least one of the first and second switches. The delay control circuit detects a phase difference between state transitions of the first and second switches and provides a delay corresponding to a magnitude of the phase difference.