公开(公告)号：US08301979B2

公开(公告)日：2012-10-30

申请号：US12574982

申请日：2009-10-07

申请人： Eran Sharon ,  Idan Alrod ,  Ariel Navon ,  Opher Lieber

发明人： Eran Sharon ,  Idan Alrod ,  Ariel Navon ,  Opher Lieber

IPC分类号： G11C29/00

CPC分类号： H03M13/6591 ,  G06F11/1072 ,  H03M13/1108 ,  H03M13/1128 ,  H03M13/1142 ,  H03M13/45

摘要： Data stored in memory is decoded using iterative probabilistic decoding and multiple decoders. A first decoder attempts to decode a representation of a codeword. If the attempt is unsuccessful, a second decoder attempts to decode the representation of a codeword. The second decoder may have a lower resolution than the first decoder. Probability values such as logarithmic likelihood ratio (LLR) values may be clipped in the second decoder. This approach can overcome trapping sets while exhibiting low complexity and high performance. Further, it can be implemented on existing decoders such as those used in current memory devices.

摘要翻译： 使用迭代概率解码和多个解码器对存储在存储器中的数据进行解码。 第一解码器尝试对码字的表示进行解码。 如果尝试不成功，则第二解码器尝试对码字的表示进行解码。 第二解码器可以具有比第一解码器更低的分辨率。 诸如对数似然比（LLR）值之类的概率值可以在第二解码器中被裁剪。 这种方法可以克服陷阱集，同时表现出低复杂性和高性能。 此外，它可以在诸如当前存储器件中使用的解码器之类的现有解码器上实现。

公开(公告)号：US08289781B2

公开(公告)日：2012-10-16

申请号：US13031221

申请日：2011-02-20

申请人： Simon Litsyn ,  Idan Alrod ,  Eran Sharon

发明人： Simon Litsyn ,  Idan Alrod ,  Eran Sharon

IPC分类号： G11C11/34

CPC分类号： G11C16/10 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/28 ,  G11C2211/5634

摘要： Each of a plurality of flash memory cells is programmed to a respective one of L≧2 threshold voltage states within a threshold voltage window. Values of parameters of threshold voltage functions are adjusted in accordance with comparisons of the threshold voltages of some or all of the cells to two or more of m≧2 threshold voltage intervals within the threshold voltage window. Reference voltages for reading the cells are selected based on the values. Alternatively, the m threshold voltage intervals span the threshold voltage window, and respective threshold voltage states are assigned to the cells based on numbers of cells whose threshold voltages are in the intervals, without re-reading the cells.

摘要翻译： 多个闪存单元中的每一个被编程为阈值电压窗口内的L≥2个阈值电压状态中的相应一个。 根据阈值电压窗口内的一些或所有单元的阈值电压与两个或多个m≥2个阈值电压间隔的比较，来调整阈值电压函数的参数值。 基于这些值来选择用于读取单元的参考电压。 或者，m阈值电压间隔跨越阈值电压窗口，并且基于阈值电压处于间隔中的单元的数量而将各个阈值电压状态分配给单元，而不重新读取单元。

公开(公告)号：US20120079178A1

公开(公告)日：2012-03-29

申请号：US13311599

申请日：2011-12-06

申请人： Simon LITSYN ,  Eran Sharon ,  Idan Alrod

发明人： Simon LITSYN ,  Eran Sharon ,  Idan Alrod

IPC分类号： G06F12/02

CPC分类号： G11C11/5628 ,  G06F11/1072 ,  G11C7/1006 ,  G11C16/3404 ,  G11C16/3463 ,  G11C29/00 ,  G11C2211/5641

摘要： To store bits in one or more cells, an adaptive mapping of bits to ranges of a physical parameter of the cell(s) is provided, in accordance with respective initial values of the physical parameter, by steps including encoding the bits as a codeword by partitioning the bits into subsets and finding a factor bit string such that the codeword is a concatenation of the factor bit string and separate Galois field products of all the subsets with the factor bit string. The initial values of the physical parameter are adjusted accordingly as needed.

摘要翻译： 为了将比特存储在一个或多个小区中，根据物理参数的相应初始值，通过以下步骤提供比特到小区的物理参数的范围的自适应映射：包括通过以下步骤将比特编码为码字： 将这些比特分成子集并找到因子比特串，使得码字是因子比特串和所有子集的单独Galois域乘积与因子比特串的级联。 根据需要相应调整物理参数的初始值。

公开(公告)号：US08125833B2

公开(公告)日：2012-02-28

申请号：US12964286

申请日：2010-12-09

申请人： Eran Sharon ,  Idan Alrod ,  Mark Shlick

发明人： Eran Sharon ,  Idan Alrod ,  Mark Shlick

IPC分类号： G11C16/04

CPC分类号： G11C16/10 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/28 ,  G11C2211/5634

摘要： A data storage device includes a controller and storage elements. The controller is configured to read a threshold voltage of each of a plurality of the storage elements to generate read threshold data and to assign reference voltages defining each of a plurality of voltage threshold states based on the read threshold data.

摘要翻译： 数据存储装置包括控制器和存储元件。 控制器被配置为读取多个存储元件中的每一个的阈值电压以产生读取阈值数据，并且基于读取的阈值数据分配定义多个电压阈值状态中的每一个的参考电压。

公开(公告)号：US08040737B2

公开(公告)日：2011-10-18

申请号：US12886262

申请日：2010-09-20

申请人： Idan Alrod ,  Eran Sharon

发明人： Idan Alrod ,  Eran Sharon

IPC分类号： G11C11/34 ,  G11C16/04

CPC分类号： G11C16/26 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/349

摘要： A technique for performing read operations with reduced errors in a memory device such as flash memory. An automatic gain control approach is used in which cells which have experienced data retention loss are read by a fine M-level quantizer which uses M-1 read threshold voltage levels. In one approach, M-quantized threshold voltage values are multiplied by a gain to obtain gain-adjusted threshold voltage values, which are quantized by an L-level quantizer, where L

摘要翻译： 一种用于在诸如闪速存储器的存储器件中执行具有减少的错误的读取操作的技术。 使用自动增益控制方法，其中经历数据保持损耗的单元由使用M-1读阈值电压电平的精细M级量化器读取。 在一种方法中，将M量化的阈值电压值乘以增益以获得增益调整的阈值电压值，其由L电平量化器量化，其中L

公开(公告)号：US20110252288A1

公开(公告)日：2011-10-13

申请号：US13122469

申请日：2009-12-16

申请人： Eran Sharon ,  Idan Alrod

发明人： Eran Sharon ,  Idan Alrod

IPC分类号： G06F11/08 ,  G06F11/00

CPC分类号： G06F11/1048 ,  G06F11/1072

摘要： Methods of writing data to and reading data from memory devices and systems for writing and reading data are disclosed. In a particular embodiment, a method includes writing data bits a first time into a memory. Auxiliary parity bits are written in the memory, where the auxiliary parity bits are computed based on the data bits. Subsequent to writing the data bits a first time and writing the auxiliary parity bits, the data bits are written a second time into the memory. Writing the data bits the first time and writing the data bits the second time are directed to one or more storage elements at a common physical address in the memory. Subsequent to writing the data bits the second time, the auxiliary parity bits are discarded while maintaining the data bits in the memory.

摘要翻译： 公开了将数据写入和读取数据的方法，用于从存储器件和系统读取和读取数据。 在特定实施例中，一种方法包括将数据位第一次写入存储器。 辅助奇偶校验位写入存储器中，其中辅助奇偶校验位基于数据位计算。 在第一次写入数据位并写入辅助奇偶校验位之后，将数据位第二次写入存储器。 第一次写入数据位，并将数据位第二次写入存储器中公共物理地址的一个或多个存储元件。 在第二次写数据位之后，辅助奇偶校验位被丢弃，同时保持存储器中的数据位。

公开(公告)号：US07990766B2

公开(公告)日：2011-08-02

申请号：US12612733

申请日：2009-11-05

申请人： Simon Litsyn ,  Eran Sharon ,  Idan Alrod

发明人： Simon Litsyn ,  Eran Sharon ,  Idan Alrod

IPC分类号： G11C11/34 ,  G11C16/04 ,  G06F13/00

CPC分类号： G11C16/10 ,  G06F11/1072 ,  G11C7/1006 ,  G11C11/56 ,  G11C11/5628 ,  G11C16/0483 ,  G11C16/34 ,  G11C29/42 ,  G11C2211/5641

摘要： To store a plurality of input bits, the bits are mapped to a corresponding programmed state of one or more memory cells and the cell(s) is/are programmed to that corresponding programmed state. The mapping may be many-to-one or may be an “into” generalized Gray mapping. The cell(s) is/are read to provide a read state value that is transformed into a plurality of output bits, for example by maximum likelihood decoding or by mapping the read state value into a plurality of soft bits and then decoding the soft bits.

公开(公告)号：US20110157981A1

公开(公告)日：2011-06-30

申请号：US12650270

申请日：2009-12-30

申请人： Eran Sharon ,  Idan Alrod

发明人： Eran Sharon ,  Idan Alrod

IPC分类号： G11C16/04 ,  G11C16/06

CPC分类号： G11C11/5642 ,  G11C16/26 ,  G11C16/3422

摘要： A method for reading an addressed cell of a memory system comprises applying at least two different voltage levels to a control gate of a memory cell in an array of memory cells, wherein the memory cell is adjacent to and in electrical field communication with the addressed memory cell. A threshold voltage of the addressed memory cell is measured at each of the at least two different applied voltage levels. At least two of the measured threshold voltages of the addressed memory cell are converted to one or more bit values stored in the addressed memory cell. The bit values are provided to a host of the memory system. An apparatus implementing the method is also disclosed.

摘要翻译： 用于读取存储器系统的寻址单元的方法包括将至少两个不同的电压电平施加到存储器单元阵列中的存储器单元的控制栅极，其中存储器单元与寻址存储器相邻并且与电场通信 细胞。 在所述至少两个不同的施加电压电平中的每一个处测量寻址的存储器单元的阈值电压。 所寻址的存储器单元的测量的阈值电压中的至少两个被转换为存储在寻址的存储单元中的一个或多个位值。 位值被提供给存储器系统的主机。 还公开了一种实现该方法的装置。

公开(公告)号：US07876621B2

公开(公告)日：2011-01-25

申请号：US11941946

申请日：2007-11-18

申请人： Eran Sharon ,  Idan Alrod ,  Mark Shlick

发明人： Eran Sharon ,  Idan Alrod ,  Mark Shlick

IPC分类号： G11C16/04

CPC分类号： G11C16/10 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/28 ,  G11C2211/5634

摘要： Each of a plurality of flash memory cells is programmed to a respective one of L≧2 threshold voltage states within a threshold voltage window. A histogram is constructed by determining how many of some or all of the cells have threshold voltages in each of two or more of m≧2 threshold voltage intervals within the threshold voltage window. Reference voltages for reading the cells are selected based on estimated values of shape parameters of the histogram. Alternatively, the cells are read relative to reference voltages that define m≧2 threshold voltage intervals that span the threshold voltage window, to determine numbers of at least a portion of the cells whose threshold voltages are in each of two or more of the threshold voltage intervals. Respective threshold voltage states are assigned to the cells based on the numbers without re-reading the cells.

摘要翻译： 多个闪存单元中的每一个被编程为阈值电压窗口内的L≥2个阈值电压状态中的相应一个。 通过确定在阈值电压窗口内的两个或多个m≥2个阈值电压间隔中的每一个中的一些或全部单元中有多少个具有阈值电压来构造直方图。 基于直方图的形状参数的估计值来选择用于读取单元的参考电压。 或者，相对于限定跨越阈值电压窗口的m≥2个阈值电压间隔的参考电压来读取单元，以确定其阈值电压在阈值电压中的两个或更多个中的每一个中的至少一部分单元的数量 间隔 基于数字将各个阈值电压状态分配给单元，而不重新读取单元。

公开(公告)号：US07844877B2

公开(公告)日：2010-11-30

申请号：US11514182

申请日：2006-09-01

申请人： Simon Litsyn ,  Eran Sharon ,  Idan Alrod ,  Menahem Lasser

发明人： Simon Litsyn ,  Eran Sharon ,  Idan Alrod ,  Menahem Lasser

IPC分类号： H03M13/00

CPC分类号： H03M13/2927 ,  G06F11/1068 ,  H03M13/1111 ,  H03M13/152 ,  H03M13/1545 ,  H03M13/2903 ,  H03M13/2906 ,  H03M13/3715 ,  H03M13/6362

摘要： Data bits to be encoded are split into a plurality of subgroups. Each subgroup is encoded separately to generate a corresponding codeword. Selected subsets are removed from the corresponding codewords, leaving behind shortened codewords, and are many-to-one transformed to condensed bits. The final codeword is a combination of the shortened codewords and the condensed bits. A representation of the final codeword is decoded by being partitioned to a selected subset and a plurality of remaining subsets. Each remaining subset is decoded separately. If one of the decodings fails, the remaining subset whose decoding failed is decoded at least in part according to the selected subset. If the encoding and decoding are systematic then the selected subsets are of parity bits.

摘要翻译： 要编码的数据位被分割成多个子组。 每个子组被分别编码以产生相应的码字。 所选择的子集从相应的码字中移除，留下缩短的码字，并且被多对一地转换成浓缩比特。 最终码字是缩短的码字和浓缩比特的组合。 最终码字的表示被分割成选定的子集和多个剩余子集。 每个剩余子集被单独解码。 如果解码失败之一，则解码失败的剩余子集至少部分地根据所选子集进行解码。 如果编码和解码是系统的，则所选择的子集是奇偶校验位。