Abstract:
Display panel redundancy schemes and methods of operation are described. In an embodiment, and display panel includes an array of drivers (e.g. microdrivers), each of which including multiple portions to independently receive control and pixel bits. In an embodiment, each driver portion is to control a group of redundant emission elements.
Abstract:
A display device may include pixels that display image data. The display device may also include a circuit that receives pixel data having a gray level for at least one pixel, such that the pixel data corresponds to a frame of the image data and the frame includes sub-frames. The pixel data causes the circuit to provide at least one current pulse to the at least one pixel according to a first order of the sub-frames. The circuit may also receive a second order of the sub-frames, such that the second order is mapped with respect to the first order, and at least one current pulse is provided to the at least one pixel according to the second order. As such, visual artifacts depicted on the display are reduced.
Abstract:
An electronic device includes a display having a reference array that includes a first pixel. The display also includes a first emission power supply coupled to the first pixel. The display further includes an active array having a second pixel. The display also includes a second emission power supply coupled to the second pixel.
Abstract:
A device includes a resistor string that includes a plurality resistors with voltage taps disposed therebetween. The device may select one particular voltage tap of the plurality of voltage taps based on received gray level data for a pixel of a display. The device also includes a first amplifier that may be coupled to a first terminal end of the resistor string. The device additionally includes a second amplifier that may be coupled to a second terminal end of the resistor string, wherein the plurality of voltage taps may each supply a tap voltage derived from a voltage between the first amplifier and the second amplifier, wherein any tap amplifier of the device coupled to a voltage tap of the plurality of voltage taps provides a reference voltage thereto.
Abstract:
A touch screen display may include gate line driver circuitry coupled to a display pixel array. The display may be provided with intra-frame pausing (IFP) capabilities, where touch or other operations may be performed during one or more intra-frame blanking intervals. In one suitable arrangement, a gate driver may be operable in a high impedance mode, where the output of the gate driver is left floating during touch or IFP intervals. In another suitable arrangement, the gate driver may be operable in an IFP reduced stress mode, where a digital pass gate in the gate driver is deactivated during IFP intervals. In yet another suitable arrangement, the gate driver may be operable in an all-gate-high (AGH) power-down mode, where the output of each gate driver in the driver circuitry is driven high in parallel when the displayed is being powered off. These arrangements may be implemented in any suitable combination.
Abstract:
Devices and methods for reducing or eliminating image artifacts are provided. By way of example, a method of preventing an occurrence of an image artifact on a display panel may include generating a first gate signal to be supplied to a first gate of a first transistor, generating a second gate signal to be supplied to a second gate of a second transistor, and adjusting a falling edge rate of the first gate signal or a rising edge rate of the second gate signal to reduce a voltage drop associated with row pixels of the display panel. Adjusting the falling edge rate of the first gate signal or the rising edge rate of the second gate signal include decreasing the falling edge rate of the first gate signal or the rising edge rate of the second gate signal during a period of time in which the first gate signal falls.
Abstract:
Methods and devices employing circuitry for reducing power usage of a touch-sensitive display are provided. In one example, a method for reducing power usage of a touch-sensitive display may include receiving power for the display of an electronic device. The method may also include powering a touch subsystem and a display subsystem of the display. The method may include, in a standard display mode, receiving synchronization signals at a first rate. A frame of data is stored on pixels of the display subsystem between each synchronization signal. The method may also include, in a low power display mode, receiving synchronization signals at a second rate. The second rate is less than the first rate. The method may include detecting a touch of the display via the touch subsystem between each synchronization signal.
Abstract:
Methods and devices employing mura prevention circuitry, are provided. In one example, a method may include supplying a first voltage pathway between a common electrode driver and a common electrode of an electronic display device and supplying a second voltage pathway between the common electrode driver and ground. Mura prevention circuitry may be supplied that activates the first voltage pathway when the electronic display device is turned on and an activation gate signal is provided from a gate corresponding to the common electrode driver. Further, the mura prevention circuitry may activate the second voltage pathway when the electronic display device is turned off or no activation gate signal is provided from the gate corresponding to the common electrode driver.
Abstract:
Integrated touch screens are provided including drive lines formed of grouped-together circuit elements of a thin film transistor layer and sense lines formed between a color filter layer and a material layer that modifies or generates light. The common electrodes (Vcom) in the TFT layer can be grouped together during a touch sensing operation to form drive lines. Sense lines can be formed on a separate layer dedicated to only touch hardware.
Abstract:
An electronic display system has a light transmissive panel, a region of display elements on the panel, and source lines coupled to the display elements. A demultiplexor circuit has multiple groups of pass gates. Each pass gate has a pair of complimentary on-panel transistors, and the signal outputs of each group are connected to a respective group of the source lines. A display driver integrated circuit (IC) receives video data and timing control signals. A signal input of each group of pass gates is connected to a respective output pin of the driver IC. The display driver IC provides digital timing control signals to control the pass gates of the demultiplexor circuit. Other embodiments are also described.