公开(公告)号：US20230178560A1

公开(公告)日：2023-06-08

申请号：US17921322

申请日：2021-05-28

Applicant: BOE Technology Group Co., Ltd.

Inventor： Lizhong WANG ,  Tianmin ZHOU ,  Hehe HU

IPC: H01L27/12

CPC classification number: H01L27/1225 ,  H01L27/127

Abstract: The present disclosure provides a thin-film transistor and a method for manufacturing same, and an array substrate and a display panel. The thin-film transistor includes: a substrate; an oxide nanowire, which extends in a direction perpendicular to the substrate, and includes a first end face facing toward the substrate, a second end face facing away from the substrate, and a side surface; a gate insulting layer; a gate electrode; a passivation layer; a source electrode, which is located at the same side of the substrate as the oxide nanowire, an orthographic projection of the source electrode on the substrate does not overlap with an orthographic projection of the passivation layer on the substrate, and the source electrode is connected with the first end face of the oxide nanowire; and a drain electrode is in contact with the second end face of the oxide nanowire.

公开(公告)号：US20230060645A1

公开(公告)日：2023-03-02

申请号：US17800389

申请日：2021-05-27

Applicant: BOE Technology Group Co., Ltd.

Inventor： Jiayu HE ,  Ce NING ,  Zhengliang LI ,  Hehe HU ,  Jie HUANG ,  Kun ZHAO ,  Nianqi YAO

IPC: H01L29/786 ,  H01L27/12 ,  H01L29/24 ,  H01L29/49 ,  H01L21/02 ,  H01L21/443 ,  H01L29/66

Abstract: A metal oxide thin film transistor is provided and includes a gate, a gate insulating layer, an active layer and a source-drain metal layer stacked on a side of a backplane, the active layer and the gate are provided on both sides of the gate insulating layer, the source-drain metal layer is provided on a side of the active layer away from the backplane, the active layer includes: a first metal oxide semiconductor layer provided on a side of the gate insulating layer away from the gate; a second metal oxide semiconductor layer provided on a surface of the first metal oxide semiconductor layer away from the gate.

公开(公告)号：US20220352283A1

公开(公告)日：2022-11-03

申请号：US17429935

申请日：2020-11-13

Applicant: BOE Technology Group Co., Ltd.

Inventor： Jiayu HE ,  Ce NING ,  Zhengliang LI ,  Hehe HU ,  Jie HUANG ,  Nianqi YAO ,  Xue LIU

IPC: H01L27/32 ,  H01L51/56

Abstract: An organic electroluminescent display substrate is provided, which includes a base substrate, and a light-emitting unit and a light-sensing unit arranged on the base substrate, wherein the light-sensing unit is arranged on a light-emitting side of the light-emitting unit, and configured for sensing an intensity of light emitted from the light-emitting unit; a first planarization layer is arranged between the light-sensing unit and the light-emitting unit; the light-sensing unit comprises a first thin film transistor and a photosensitive sensor arranged sequentially in that order in a direction away from the base substrate, and a second planarization layer is arranged between the photosensitive sensor and the first thin film transistor. A display panel, a display device and a method for manufacturing the organic electroluminescent display substrate are further provided.

公开(公告)号：US20220278162A1

公开(公告)日：2022-09-01

申请号：US17410677

申请日：2021-08-24

Applicant: BOE Technology Group Co., Ltd.

Inventor： Jiayu HE ,  Ce NING ,  Zhengliang LI ,  Hehe HU ,  Jie HUANG ,  Nianqi YAO ,  Kun ZHAO

IPC: H01L27/146 ,  H01L27/12

Abstract: An array substrate includes a substrate, the array substrate includes a display region and a detection region. And the detection region includes a thin film transistor located on the substrate and a photodiode located on one side of the thin film transistor away from the substrate, and the array substrate further includes a first inorganic protective layer, an organic protective layer and a second inorganic protective layer located between the thin film transistor and the photodiode. And the first inorganic protective layer, the organic protective layer and the second inorganic protective layer are stacked in sequence in a direction away from the substrate, and an orthographic projection of the photodiode on the substrate is within the range of the orthographic projection of the organic protective layer on the substrate.

公开(公告)号：US20220186359A1

公开(公告)日：2022-06-16

申请号：US17485170

申请日：2021-09-24

Applicant: BOE Technology Group Co., Ltd.

Inventor： Nianqi YAO ,  Ce NING ,  Zhengliang LI ,  Hehe HU ,  Dapeng XUE ,  Lizhong WANG ,  Shuilang DONG ,  Jie HUANG ,  Jiayu HE ,  Lubin SHI ,  Yancai LI

IPC: C23C14/50

Abstract: A fixture, a tray and a sputtering system. The fixture is internally provided with a support structure and a clamping structure connected with each other, wherein the clamping structure is configured to clamp a to-be-sputtered substrate; an orthographic projection of the clamping structure on a plane where the support structure is located and the support structure share an superimposed area and are separate in non-superimposed areas; wherein the support structure located in the non-superimposed area and/or the clamping structure located in the non-superimposed area has a first hollowed structure. The fixture is internally provided with the first hollowed structure, such that a part of an area of the to-be-sputtered substrate covered by the fixture may be exposed via the first hollowed structure when the fixture holds the to-be-sputtered substrate, so as to reduce the area of the to-be-sputtered substrate covered by the fixture.

公开(公告)号：US20210129140A1

公开(公告)日：2021-05-06

申请号：US16647386

申请日：2019-09-24

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xiaochen MA ,  Guangcai YUAN ,  Ce NING ,  Xin GU ,  Hehe HU

IPC: B01L3/00 ,  B01L9/00 ,  G01N21/63 ,  G01N21/05

Abstract: A microfluidic channel structure and a fabrication method thereof, a microfluidic detecting device and a detecting method thereof are disclosed. The microfluidic channel structure includes a support portion; a foundation portion, provided on the support portion and including a first foundation and a second foundation spaced apart from each other; and a channel defining portion, provided on a side of the foundation portion that is away from the support portion and including a first channel layer and a second channel layer, the first channel layer covering the first foundation and the second channel layer covering the second foundation have a gap therebtween to define a microfluidic channel; and the first channel layer and the second channel layer are made of a same material.

公开(公告)号：US20190123069A1

公开(公告)日：2019-04-25

申请号：US16166356

申请日：2018-10-22

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Wei YANG ,  Hehe HU ,  Xinhong LU

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/66

Abstract: The present disclosure relates to array substrate, preparation method thereof and display panel. An array substrate comprises: a first thin film transistor and a second thin film transistor over a substrate; wherein the first thin film transistor comprises a first portion of a first insulating layer, the first insulating layer comprises a first recess corresponding to the second thin film transistor, and the second thin film transistor is located in the first recess; and wherein a thickness of a second portion of the first insulating layer, which is below the bottom of the first recess, is smaller than that of the first portion of the first insulating layer.

公开(公告)号：US20170243901A1

公开(公告)日：2017-08-24

申请号：US15322460

申请日：2015-11-05

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Hehe HU

IPC: H01L27/12 ,  H01L21/3213 ,  H01L29/423 ,  H01L21/027

Abstract: The present disclosure provides a thin film transistor array substrate, a method for manufacturing the same and a display device. The method includes forming, on a substrate, a gate electrode, a common electrode, a gate insulation layer, an active layer and a source-drain metal layer, and forming, on the resultant substrate, a pixel electrode and a passivation layer by one patterning process.

公开(公告)号：US20250151504A1

公开(公告)日：2025-05-08

申请号：US19017860

申请日：2025-01-13

Applicant: BOE Technology Group Co., Ltd.

Inventor： Guangcai YUAN ,  Hehe HU ,  Changhan HSIEH ,  Wei YANG ,  Liwen DONG ,  Jiayu HE ,  Dongfei HOU ,  Zhen ZHANG ,  Ce NING ,  Xin GU ,  Zhengliang LI

IPC: H10K10/46 ,  G02F1/1333 ,  G02F1/1362 ,  H10K19/10

Abstract: An array substrate includes a base substrate, a first conductive layer, a first electrode, an organic planarization layer and an organic active layer. The first conductive layer is provided on a side of the base substrate. The first electrode is provided on a side of the first conductive layer away from the base substrate, an orthographic projection of the first electrode on the base substrate overlapping an orthographic projection of the drain electrode on the base substrate. The organic planarization layer is provided on a side of the first electrode away from the base substrate, first via holes being provided in the organic planarization layer. The organic active layer is provided on a side of the organic planarization layer away from the base substrate, the organic active layer being connected to the source electrode by a first via hole and connected to the drain electrode by a first via hole.

公开(公告)号：US20250089303A1

公开(公告)日：2025-03-13

申请号：US18292558

申请日：2022-06-30

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Lizhong WANG ,  Guangcai YUAN ,  Ce NING ,  Hehe HU ,  Nianqi YAO ,  Dongfang WANG ,  Zhengliang LI ,  Liping LEI ,  Chen XU

IPC: H01L29/786 ,  G09G3/20 ,  G11C19/28 ,  H01L29/08

Abstract: A thin film transistor, a shift register unit, a gate driving circuit and a display panel are provided. The M source branches and the N drain branches extend along a first direction and are arranged at intervals; in each of the P source-drain units, the M source branches and the N drain branches are alternately arranged, and M is greater than or equal to N; a semiconductor layer includes sub-channel regions between one drain branch and one source branch adjacent to each other; a sum of widths of the sub-channel regions of the P source-drain units in the first direction is W, and an average length of the sub-channel regions of the P source-drain units in a direction perpendicular to the first direction is L; 12≤W/L≤400, P, M and N are integers greater than or equal to 1, and P×N≥4.