公开(公告)号：US07634672B2

公开(公告)日：2009-12-15

申请号：US11505973

申请日：2006-08-18

Applicant: Wen-Juin Huang ,  Chung-Ching Huang

Inventor： Wen-Juin Huang ,  Chung-Ching Huang

IPC: G06F1/26

CPC classification number: G06F1/3228

Abstract: A power saving method applied to a central processing unit under a non-snooping sleeping state with a bus master request from a peripheral device is presented. In accordance with the present invention, first prohibit the central processing unit from fetching instruction. Then drive the central processing unit entering a snooping sleeping state and enabling the arbiter for transferring the bus master request to the central processing unit. After the central processing unit completes the bus master request, the arbiter is disabled and the central processing unit is driven to leave the snooping sleeping state and return back to the non-snooping sleeping state. Therefore, the power consumed by the central processing unit is reduced so as to save power.

Abstract translation: 提出了一种在具有来自外围设备的总线主机请求的非窥探睡眠状态下应用于中央处理单元的省电方法。 根据本发明，首先禁止中央处理单元取出指令。 然后驱动中央处理单元进入窥探休眠状态，并允许仲裁器将总线主控请求传送到中央处理单元。 中央处理单元完成总线主机请求后，仲裁器被禁止，中央处理单元被驱动离开窥探休眠状态并返回到非窥探睡眠状态。 因此，中央处理单元消耗的功率降低，从而节省功率。

公开(公告)号：US20070208929A1

公开(公告)日：2007-09-06

申请号：US11560924

申请日：2006-11-17

Applicant: Hao-Lin Lin ,  Chung-Ching Huang

Inventor： Hao-Lin Lin ,  Chung-Ching Huang

IPC: G06F9/00

CPC classification number: G06F9/4411

Abstract: A device information management system comprises an application device and a BIOS ROM. The BIOS ROM comprises at least one specific region storing device information for the application device. The specific region is not used by a BIOS and not within a calculation range for checksum calculation. The BIOS ROM further comprises an index recording an address of the specific region. The application device reads the index from the BIOS ROM, and reads the device information from the specific region according to the index.

Abstract translation: 设备信息管理系统包括应用设备和BIOS ROM。 BIOS ROM包括用于应用设备的至少一个特定区域存储设备信息。 特定区域不被BIOS使用，不在校验和计算的计算范围内。 BIOS ROM还包括记录特定区域的地址的索引。 应用程序设备从BIOS ROM读取索引，并根据索引从特定区域读取设备信息。

公开(公告)号：US20060103625A1

公开(公告)日：2006-05-18

申请号：US11268009

申请日：2005-11-07

Applicant: Lu-Kang Mao ,  Yu-Lin Chu ,  Chung-Ching Huang

Inventor： Lu-Kang Mao ,  Yu-Lin Chu ,  Chung-Ching Huang

IPC: G09G5/00

CPC classification number: H04N5/85 ,  G06F3/0489 ,  H04N5/4403 ,  H04N5/44582 ,  H04N21/42204 ,  H04N21/42646 ,  H04N21/4312 ,  H04N21/441 ,  H04N2005/4442

Abstract: In an electric appliance system, an electric appliance for performing designated functions and first and second remote controllers are included. The first remote controller is optionally triggered for controlling a first group of the designated functions, and the second remote controller is optionally triggered for controlling a second group of the designated functions. The second group includes at least one designated function included in the first group and at least one designated function excluded from the first group.

Abstract translation: 在电器系统中，包括用于执行指定功能的电器以及第一和第二遥控器。 可选地，第一遥控器被触发用于控制指定功能的第一组，并且可选地触发第二遥控器以控制第二组指定功能。 第二组包括包括在第一组中的至少一个指定功能和从第一组中排除的至少一个指定功能。

公开(公告)号：US20050086407A1

公开(公告)日：2005-04-21

申请号：US10945000

申请日：2004-09-20

Applicant: Tony Ho ,  Chung-Ching Huang ,  Norman Chung

Inventor： Tony Ho ,  Chung-Ching Huang ,  Norman Chung

IPC: G06F1/32 ,  G06F13/24 ,  G06F13/40

CPC classification number: G06F13/24 ,  G06F13/4027 ,  G06F2213/0024 ,  Y02D10/14 ,  Y02D10/151

Abstract: An interruption control system includes a first input/output interruption controller, a second input/output interruption controller, and an interruption control device bus. The first input/output interruption controller is coupled to a first peripheral device and a south bridge chip, and asserts a wake-up signal to the south bridge chip in response to a first interrupt signal issued by the first peripheral device so as to deactivate a power-saving state of the computer system. The second input/output interruption controller is coupled to a second peripheral device and a north bridge chip, and asserts a third interrupt signal in response to a second interrupt signal issued by the second peripheral device. Via the interruption control device bus, the third interrupt signal is transmitted from the second input/output interruption controller to the first input/output interruption controller, wherein the first input/output interruption controller asserts the wake-up signal to deactivate the power-saving state of the computer system in response to the third interrupt signal.

Abstract translation: 中断控制系统包括第一输入/输出中断控制器，第二输入/输出中断控制器和中断控制设备总线。 第一输入/输出中断控制器耦合到第一外围设备和南桥芯片，并且响应于由第一外围设备发出的第一中断信号而向南桥芯片发出唤醒信号，以便使第 计算机系统的省电状态。 第二输入/输出中断控制器耦合到第二外围设备和北桥芯片，并且响应于由第二外围设备发出的第二中断信号而断言第三中断信号。 通过中断控制装置总线，第三中断信号从第二输入/输出中断控制器发送到第一输入/输出中断控制器，其中第一输入/输出中断控制器断言唤醒信号以去激活省电 计算机系统的状态响应于第三中断信号。

公开(公告)号：US06711642B2

公开(公告)日：2004-03-23

申请号：US09878882

申请日：2001-06-11

Applicant: Chung-Ching Huang

Inventor： Chung-Ching Huang

IPC: G06F1324

CPC classification number: G06F13/24

Abstract: A method and a chipset for supporting a system management mode interrupt of a multi-processor system. While the central processing is accessing the specified input/output port defined by the chipset, the chipset detects the specified input/output port at the peripheral component interface bus and extracts the trap data to store into the chipset. Therefore, while entering the system management mode, a first central processing unit executes a proper operation according to the trap data of the chipset, and a second central processing unit stands by until the proper operation is completed by the first central processing unit. Thus, when the central processing units in a multi-processor system enters the system management mode, the first central processing unit can access the parameters from chipset even though the system management interrupt is induced by the second central processing unit and the parameters are stored in the second CPU's state dump area. In this way, the error, that the first central processing unit does not know which parameters stored in the first central processing unit's state dump area or the second central processing unit's state dump area should be accessed, can be completely resolved.

Abstract translation: 一种用于支持多处理器系统的系统管理模式中断的方法和芯片组。 当中央处理正在访问由芯片组定义的指定输入/输出端口时，芯片组检测外围组件接口总线上的指定输入/输出端口，并提取陷阱数据以存储到芯片组中。 因此，当进入系统管理模式时，第一中央处理单元根据芯片组的陷阱数据执行适当的操作，并且第二中央处理单元待机直到第一中央处理单元完成正确的操作。 因此，当多处理器系统中的中央处理单元进入系统管理模式时，即使系统管理中断由第二中央处理单元引起并且参数被存储在第一中央处理单元中，第一中央处理单元也可以从芯片组访问参数 第二个CPU的状态转储区域。 以这种方式，可以完全解决第一中央处理单元不知道存储在第一中央处理单元的状态转储区域或第二中央处理单元的状态转储区域中的参数的错误。