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    SEMICONDUCTOR SWITCHING DEVICE AND METHOD OF MAKING THE SAME
    41.
    发明申请
    SEMICONDUCTOR SWITCHING DEVICE AND METHOD OF MAKING THE SAME 失效
    半导体开关器件及其制造方法

    公开(公告)号：US20120313194A1

    公开(公告)日：2012-12-13

    申请号：US13155757

    申请日：2011-06-08

    申请人： Chih-Chao Yang ,  Stephan A. Cohen ,  Baozhen Li

    发明人： Chih-Chao Yang ,  Stephan A. Cohen ,  Baozhen Li

    IPC分类号： H01L27/14 ,  H01L21/02

    CPC分类号： B82Y10/00 ,  H01L23/5252 ,  H01L29/413 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A switching device including a first dielectric layer having a first top surface, two conductive features embedded in the first dielectric layer, each conductive feature having a second top surface that is substantially coplanar with the first top surface of the first dielectric layer, and a set of discrete islands of a low diffusion mobility metal between the two conductive features. The discrete islands of the low diffusion mobility metal may be either on the first top surface or embedded in the first dielectric layer. The electric conductivity across the two conductive features of the switching device increases when a prescribed voltage is applied to the two conductive features. A method of forming such a switching device is also provided.

    摘要翻译： 一种开关装置，包括具有第一顶表面的第一介电层，嵌入在第一介电层中的两个导电特征，每个导电特征具有与第一介电层的第一顶表面基本上共面的第二顶表面，以及一组 在两个导电特征之间的低扩散迁移率金属的离散岛。 低扩散迁移率金属的离散岛可以在第一顶表面上或嵌入在第一介电层中。 当规定的电压施加到两个导电特征时，开关装置的两个导电特征的电导率增加。 还提供了一种形成这种开关装置的方法。

    Determining critical current density for interconnect
    42.
    发明授权
    Determining critical current density for interconnect 失效
    确定互连的临界电流密度

    公开(公告)号：US08232809B2

    公开(公告)日：2012-07-31

    申请号：US12620955

    申请日：2009-11-18

    申请人： Chad M. Burke ,  Cathryn J. Christiansen ,  Baozhen Li

    发明人： Chad M. Burke ,  Cathryn J. Christiansen ,  Baozhen Li

    IPC分类号： G01R31/02 ,  G01R31/26

    CPC分类号： G01R31/2858

    摘要： Solutions for determining a critical current density of a line are disclosed. In one embodiment a method of determining a critical current density in a line includes: applying a temperature condition to each of a plurality of samples including the line; calculating a cross-sectional area of the line for each of the plurality samples using data about an electrical resistance of the line over each of the temperature conditions; measuring an electrical current reading through the line for each of the plurality of samples; determining a current density through the line for each of the plurality of samples by dividing each electrical current reading by each corresponding cross-sectional area; determining an electromigration (EM) failure time for each of the plurality of samples; and determining the critical current density of the line using the current density and the plurality of EM failure times.

    摘要翻译： 公开了用于确定线的临界电流密度的解决方案。 在一个实施例中，确定线路中的临界电流密度的方法包括：将温度条件应用于包括线路的多个样本中的每一个; 使用关于在每个温度条件下的线的电阻的数据来计算多个样本中的每个样本的线的横截面面积; 测量所述多个样本中的每一个的所述线的电流读数; 通过将每个电流读数除以每个对应的横截面积来确定通过所述多个样品中的每一个的所述线的电流密度; 确定所述多个样本中的每一个的电迁移（EM）故障时间; 以及使用电流密度和多个EM故障时间确定线路的临界电流密度。

    ELECTROMIGRATION RESISTANT VIA-TO-LINE INTERCONNECT
    44.
    发明申请
    ELECTROMIGRATION RESISTANT VIA-TO-LINE INTERCONNECT 有权
    通过电路互连连接

    公开(公告)号：US20100164116A1

    公开(公告)日：2010-07-01

    申请号：US12344838

    申请日：2008-12-29

    申请人： Baozhen Li ,  Paul S. McLaughlin ,  Timothy D. Sullivan

    发明人： Baozhen Li ,  Paul S. McLaughlin ,  Timothy D. Sullivan

    IPC分类号： H01L23/52 ,  H01L21/4763 ,  H01L23/48 ,  H01L21/768

    CPC分类号： H01L21/76816 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/53238 ,  H01L23/53252 ,  H01L23/53266 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A liner-to-liner direct contact is formed between an upper metallic liner of a conductive via and a lower metallic liner of a metal line below. The liner-to-liner contact impedes abrupt electromigration failures and enhances electromigration resistance of the metal interconnect structure. The at least one dielectric material portion may include a plurality of dielectric material portions arranged to insure direct contact of between the upper metallic liner and the lower metallic liner. Alternatively, the at least one dielectric material portion may comprise a single dielectric portion of which the area has a sufficient lateral overlap with the area of the conductive via to insure that a liner-to-liner direct contact is formed within the range of allowed lithographic overlay variations.

    摘要翻译： 在导电通孔的上金属衬套和下面的金属线的下金属衬垫之间形成衬管到衬垫直接接触。 衬套到衬垫接触件阻止突然的电迁移故障并增强金属互连结构的电迁移阻力。 所述至少一个电介质材料部分可以包括多个电介质材料部分，其布置成确保上金属衬垫和下金属衬垫之间的直接接触。 或者，所述至少一个介电材料部分可以包括单个电介质部分，其中该区域具有与导电通孔的面积的足够的横向重叠，以确保在允许的光刻的范围内形成衬管到衬垫的直接接触 重叠变化。

    MICROELECTRONIC STRUCTURE INCLUDING HIGH CURRENT DENSITY RESISTOR
    48.
    发明申请
    MICROELECTRONIC STRUCTURE INCLUDING HIGH CURRENT DENSITY RESISTOR 审中-公开
    微电子结构包括高电流密度电阻

    公开(公告)号：US20070284662A1

    公开(公告)日：2007-12-13

    申请号：US11423232

    申请日：2006-06-09

    申请人： Anil K. Chinthakindi ,  Baozhen Li ,  Gerald R. Matusiewicz

    发明人： Anil K. Chinthakindi ,  Baozhen Li ,  Gerald R. Matusiewicz

    IPC分类号： H01L27/12

    CPC分类号： H01L27/0629 ,  H01L28/20

    摘要： A microelectronic structure and a method for fabricating the microelectronic structure include a resistor located and formed over a substrate. A conductor contact layer contacts the resistor. A maximum length of the conductor contact layer is determined using a Blech constant to avoid electromigration of a conductor material that comprises the conductor contact layer.

    摘要翻译： 微电子结构和用于制造微电子结构的方法包括位于衬底上并形成的电阻器。 导体接触层接触电阻。 使用Blech常数确定导体接触层的最大长度，以避免包含导体接触层的导体材料的电迁移。