公开(公告)号：US20050176037A1

公开(公告)日：2005-08-11

申请号：US11009171

申请日：2004-12-10

Applicant: Ubaldo Mastromatteo ,  Flavio Villa ,  Gabriele Barlocchi

Inventor： Ubaldo Mastromatteo ,  Flavio Villa ,  Gabriele Barlocchi

IPC: B01J19/00 ,  B01L3/00 ,  B01L7/00 ,  B81B1/00 ,  G01N21/64 ,  C12Q1/68 ,  C12M1/34 ,  H01L21/00

CPC classification number: G01N21/6428 ,  B01J19/0093 ,  B01J2219/0097 ,  B01L3/502707 ,  B01L3/502715 ,  B01L7/52 ,  B01L2200/12 ,  B01L2300/0654 ,  B01L2300/0816 ,  G01N21/6454

Abstract: An integrated semiconductor chemical microreactor for real-time polymerase chain reaction (PCR) monitoring, has a monolithic body of semiconductor material; a number of buried channels formed in the monolithic body; an inlet trench and an outlet trench for each buried channel; and a monitoring trench for each buried channel, extending between the inlet and outlet trenches thereof from the top surface of the monolithic body to the respective buried channel. Real-time PCR monitoring is carried out by channeling light beams into the buried channels, possibly through one of the inlet or outlet trenches, whereby the light beams impinge on the fluid therein and collecting the emergent light coming out from the monitoring trench.

Abstract translation: 一种用于实时聚合酶链反应（PCR）监测的集成半导体化学微反应器，具有半导体材料的整体; 形成在整体式主体中的多个埋入通道; 用于每个掩埋通道的入口沟槽和出口沟槽; 以及用于每个掩埋通道的监测沟槽，其在其入口和出口沟槽之间从单体主体的顶表面延伸到相应的掩埋通道。 通过将光束通过入口或出口沟槽中的一个引入到掩埋通道中，从而使光束照射在其中的流体并收集从监测沟槽出来的出射光，从而进行实时PCR监测。

公开(公告)号：US06759132B2

公开(公告)日：2004-07-06

申请号：US10295767

申请日：2002-11-14

Applicant: Ubaldo Mastromatteo ,  Pietro Corona ,  Flavio Villa ,  Gabriele Barlocchi

Inventor： Ubaldo Mastromatteo ,  Pietro Corona ,  Flavio Villa ,  Gabriele Barlocchi

IPC: B32B900

CPC classification number: G11B7/1362 ,  G02B5/08 ,  G02B6/4214 ,  G11B7/123 ,  Y10T428/12528

Abstract: Method for manufacturing electromagnetic radiation reflecting devices, said method comprising the steps of: a) providing a silicon substrate defined by at least one first free surface, b) forming on said first surface a layer of protective material provided with an opening which exposes a region of the first free surface, and c)etching the region of the free surface by means of an anisotropic agent to remove at least one portion of the substrate and define a second free surface of the substrate inclined in relation to said first surface. Furthermore, said first free surface is parallel to the crystalline planes {110} of silicon substrate and said step (c) comprises a progressing step of the anisotropic agent such that the second free surface resulting from the etching step is parallel to the planes {100} of said substrate.

Abstract translation: 用于制造电磁辐射反射装置的方法，所述方法包括以下步骤：a）提供由至少一个第一自由表面限定的硅衬底，b）在所述第一表面上形成一层保护材料，所述保护材料层具有暴露区域 的第一自由表面，以及c）借助于各向异性剂蚀刻所述自由表面的区域以去除所述衬底的至少一部分并且限定所述衬底相对于所述第一表面倾斜的第二自由表面。 此外，所述第一自由表面平行于硅衬底的晶面{110}，并且所述步骤（c）包括各向异性剂的进行步骤，使得由蚀刻步骤产生的第二自由表面平行于平面{100 }。

公开(公告)号：US06670257B1

公开(公告)日：2003-12-30

申请号：US09545260

申请日：2000-04-07

Applicant: Gabriele Barlocchi ,  Flavio Villa

Inventor： Gabriele Barlocchi ,  Flavio Villa

IPC: H01L2176

CPC classification number: H01L21/2007 ,  H01L21/30608 ,  H01L21/3086 ,  H01L21/76251 ,  H01L21/76262 ,  H01L21/764

Abstract: A method of forming buried cavities in a wafer of monocrystalline semiconductor material with at least one cavity formed in a substrate of monocrystalline semiconductor material by timed TMAH etching silicon; covering the cavity with a material inhibiting epitaxial growth; and growing a monocrystalline epitaxial layer above the substrate and the cavities. Thereby, the cavity is completely surrounded by monocrystalline material. Starting from this wafer, it is possible to form a thin membrane. The original wafer must have a plurality of elongate cavities or channels, parallel and adjacent to one another. Trenches are then excavated in the epitaxial layer as far as the channels, and the dividers between the channels are removed by timed TMAH etching.

Abstract translation: 在单晶半导体材料的晶片中形成掩埋空穴的方法，其中至少一个腔通过定时的TMAH蚀刻硅在单晶半导体材料的衬底中形成; 用抑制外延生长的材料覆盖空腔; 以及在衬底和空腔上生长单晶外延层。 因此，腔体被单晶材料完全包围。 从该晶片开始，可以形成薄膜。 原始晶片必须具有彼此平行并相邻的多个细长空腔或通道。 然后在外延层中挖沟直到沟道，并且通过定时TMAH蚀刻去除沟道之间的分隔线。

公开(公告)号：US06529140B1

公开(公告)日：2003-03-04

申请号：US09085887

申请日：1998-05-27

Applicant: Herbert Sax ,  Bruno Murari ,  Flavio Villa ,  Benedetto Vigna ,  Paolo Ferrari

Inventor： Herbert Sax ,  Bruno Murari ,  Flavio Villa ,  Benedetto Vigna ,  Paolo Ferrari

IPC: G08C1906

CPC classification number: G01V3/081 ,  G01D5/145

Abstract: A bi-dimensional position sensor that can be advantageously used in the turn system controlled from the steering wheel of a vehicle. The sensor includes a permanent magnet fixed to a control lever so as to move in a plane along first and second directions and to rotate about a third direction orthogonal to the preceding ones. The permanent magnet is movable with respect to an integrated device including a first group of sensor elements arranged spaced along the first direction, a second group of sensor elements arranged spaced along the second direction and a third group of sensor elements detecting the angular position of the permanent magnet. Electronics integrated with the sensor elements generate a code associated with each position which the permanent magnet may assume and generate a control signal corresponding to the desired function.

Abstract translation: 一种二维位置传感器，其可以有利地用于从车辆的方向盘控制的转向系统中。 传感器包括固定到控制杆的永久磁铁，以沿着第一和第二方向在平面内移动并围绕与前述正交的第三方向旋转。 永磁体可相对于包括沿着第一方向间隔布置的第一组传感器元件的集成装置移动，第二组传感器元件沿着第二方向间隔布置，第三组传感器元件检测第二组传感器元件的角位置 永久磁铁 与传感器元件集成的电子产生与永磁体可以采取的每个位置相关联的代码，并产生对应于期望功能的控制信号。

公开(公告)号：US06472244B1

公开(公告)日：2002-10-29

申请号：US09723357

申请日：2000-11-27

Applicant: Paolo Ferrari ,  Benedetto Vigna ,  Flavio Villa

Inventor： Paolo Ferrari ,  Benedetto Vigna ,  Flavio Villa

IPC: H01L2100

CPC classification number: H01L21/764 ,  B81C1/00246 ,  B81C2203/0742 ,  G01L9/0042 ,  G01L9/0054 ,  G01P15/0802

Abstract: The method inlcudes the steps of forming a sacrificial buried region of insulating material on a substrate of monocrystalline semiconductor material, epitaxially growing a first semiconductor material layer on the substrate, the first semiconductor material layer including a polycrystalline region over the sacrificial buried region and a monocrystalline region elsewhere, the substrate and the semiconductor material layer surrounding the sacrificial buried region on all sides, and removing the sacrificial buried region. The portion of the polycrystalline region surrounded by the trench thus forms a suspended structure separated and isolated thermally from the rest of the semiconductor material layer. Using microelectronics processes, electronic components are formed in the monocrystalline region, and dedicated regions are formed at the suspended structure, so that the electronic components are integrated in the same chip with static, kinematic or dynamic microstructures.

Abstract translation: 该方法包括在单晶半导体材料的衬底上形成绝缘材料的牺牲掩埋区域的步骤，在衬底上外延生长第一半导体材料层，第一半导体材料层包括在牺牲掩埋区域上的多晶区域和单晶 区域，衬底和围绕所有侧面的牺牲掩埋区域的半导体材料层，以及去除牺牲掩埋区域。 由沟槽围绕的多晶区域部分因此形成与半导体材料层的其余部分分离和隔离的悬浮结构。 使用微电子工艺，电子元件形成在单晶区域，并且在悬浮结构处形成专用区域，使得电子元件与静态，运动学或动态微结构集成在相同的芯片中。

公开(公告)号：US6131466A

公开(公告)日：2000-10-17

申请号：US903168

申请日：1997-07-30

Applicant: Benedetto Vigna ,  Paolo Ferrari ,  Flavio Villa

Inventor： Benedetto Vigna ,  Paolo Ferrari ,  Flavio Villa

IPC: G01L9/06 ,  B81B3/00 ,  B81C1/00 ,  G01L9/00 ,  H01L29/84

CPC classification number: G01L9/0042 ,  G01L9/0055

Abstract: The pressure sensor is integrated in an SOI (Silicon-on-Insulator) substrate using the insulating layer as a sacrificial layer, which is partly removed by chemical etching to form the diaphragm. To fabricate the sensor, after forming the piezoresistive elements and the electronic components integrated in the same chip, trenches are formed in the upper wafer of the substrate and extending from the surface to the layer of insulating material; the layer of insulating material is chemically etched through the trenches to form an opening beneath the diaphragm; and a dielectric layer is deposited to outwardly close the trenches and the opening. Thus, the process is greatly simplified, and numerous packaging problems eliminated.

Abstract translation: 压力传感器集成在使用绝缘层作为牺牲层的SOI（绝缘体上硅）衬底中，其通过化学蚀刻部分去除以形成隔膜。 为了制造传感器，在形成压电元件和集成在同一芯片中的电子部件之后，在基板的上晶片中形成沟槽，并从表面延伸到绝缘材料层; 绝缘材料层通过沟槽进行化学蚀刻，以形成隔膜下面的开口; 并且沉积介电层以向外关闭沟槽和开口。 因此，该过程被大大简化，并且消除了许多封装问题。

公开(公告)号：US5530345A

公开(公告)日：1996-06-25

申请号：US129842

申请日：1993-09-30

Applicant: Bruno Murari ,  Sandro Storti ,  Flavio Villa

Inventor： Bruno Murari ,  Sandro Storti ,  Flavio Villa

IPC: H01L27/22 ,  G01D5/14 ,  H01L43/06 ,  G01R33/06

CPC classification number: G01D5/145 ,  H01L43/065

Abstract: For detecting the position of a magnetic element having a field component zeroing in at least one point in space, typically in a plane, a plurality of elementary Hall-effect sensors are integrated side by side and aligned in a direction perpendicular to the zeroing field component and to the current flowing through the elementary sensors. The elementary sensor generating a zero output voltage therefore indicates the zero position of the field component and consequently the position of the magnetic element with respect to the position sensor, so that The outputs of the elementary sensors provide a quantized numeric code indicating the position of the magnetic element.

Abstract translation: 为了检测在空间中的至少一个点（通常在平面中）具有场分量归零的磁性元件的位置，多个基本的霍尔效应传感器被并排并排并且在垂直于零点分量 以及流经基本传感器的电流。 因此，产生零输出电压的基本传感器指示场分量的零位，并因此表示磁元件相对于位置传感器的位置，使得基本传感器的输出提供表示位置传感器的位置的量化数字代码 磁性元件。

公开(公告)号：US4672235A

公开(公告)日：1987-06-09

申请号：US736810

申请日：1985-05-21

Applicant: Flavio Villa ,  Bruno Murari ,  Carlo Cini ,  Franco Bertotti

Inventor： Flavio Villa ,  Bruno Murari ,  Carlo Cini ,  Franco Bertotti

IPC: H01L29/73 ,  H01L21/331 ,  H03F3/21 ,  H03K17/60

CPC classification number: H03F3/211

Abstract: A power transistor comprising a plurality of elementary transistors coupled in parallel and an identical number of current generators, each of which has a terminal coupled individually to the base of an elementary transistor is described. High power levels may be achieved with a transistor of this type without forward secondary breakdown taking place.

Abstract translation: 描述了并联耦合的多个基本晶体管和相同数量的电流发生器的功率晶体管，每个电流发生器具有分别耦合到基本晶体管的基极的端子。 这种类型的晶体管可以实现高功率电平，而不会发生正向二次击穿。

公开(公告)号：US07705416B2

公开(公告)日：2010-04-27

申请号：US10667113

申请日：2003-09-18

Applicant: Gabriele Barlocchi ,  Flavio Villa

Inventor： Gabriele Barlocchi ,  Flavio Villa

IPC: H01L29/00

CPC classification number: H01L21/2007 ,  H01L21/30608 ,  H01L21/3086 ,  H01L21/76251 ,  H01L21/76262 ,  H01L21/764

Abstract: A method of forming buried cavities in a wafer of monocrystalline semiconductor material with at least one cavity formed in a substrate of monocrystalline semiconductor material by timed TMAH etching silicon; covering the cavity with a material inhibiting epitaxial growth; and growing a monocrystalline epitaxial layer above the substrate and the cavities. Thereby, the cavity is completely surrounded by monocrystalline material. Starting from this wafer, it is possible to form a thin membrane. The original wafer must have a plurality of elongate cavities or channels, parallel and adjacent to one another. Trenches are then excavated in the epitaxial layer as far as the channels, and the dividers between the channels are removed by timed TMAH etching.

Abstract translation: 在单晶半导体材料的晶片中形成掩埋空穴的方法，其中至少一个腔通过定时的TMAH蚀刻硅在单晶半导体材料的衬底中形成; 用抑制外延生长的材料覆盖空腔; 以及在衬底和空腔上生长单晶外延层。 因此，腔体被单晶材料完全包围。 从该晶片开始，可以形成薄膜。 原始晶片必须具有彼此平行并相邻的多个细长空腔或通道。 然后在外延层中挖沟直到沟道，并且通过定时TMAH蚀刻去除沟道之间的分隔线。

公开(公告)号：US20070252224A1

公开(公告)日：2007-11-01

申请号：US11743062

申请日：2007-05-01

Applicant: Gabriele Barlocchi ,  Ubaldo Mastromatteo ,  Flavio Villa

Inventor： Gabriele Barlocchi ,  Ubaldo Mastromatteo ,  Flavio Villa

IPC: H01L29/00 ,  H01L21/00

CPC classification number: B01J19/0093 ,  B01J2219/00783 ,  B01J2219/00828 ,  Y10T436/114998

Abstract: The microreactor has a body of semiconductor material; a large area buried channel extending in the body and having walls; a coating layer of insulating material coating the walls of the channel; a diaphragm extending on top of the body and upwardly closing the channel. The diaphragm is formed by a semiconductor layer completely encircling mask portions of insulating material.

Abstract translation: 微反应器具有半导体材料体; 一个大面积的埋藏通道延伸到身体并具有墙壁; 覆盖通道壁的绝缘材料的涂层; 一个在主体顶部延伸并向上封闭通道的隔膜。 隔膜由完全环绕绝缘材料的掩模部分的半导体层形成。