Method of fabricating a piezoresistive pressure sensor
    1.
    发明授权
    Method of fabricating a piezoresistive pressure sensor 有权
    制造压阻式压力传感器的方法

    公开(公告)号:US06417021B1

    公开(公告)日:2002-07-09

    申请号:US09404507

    申请日:1999-09-23

    IPC分类号: H01L2100

    CPC分类号: G01L9/0042 G01L9/0055

    摘要: The pressure sensor is integrated in an SOI (Silicon-on-Insulator) substrate using the insulating layer as a sacrificial layer, which is partly removed by chemical etching to form the diaphragm. To fabricate the sensor, after forming the piezoresistive elements and the electronic components integrated in the same chip, trenches are formed in the upper wafer of the substrate and extending from the surface to the layer of insulating material; the layer of insulating material is chemically etched through the trenches to form an opening beneath the diaphragm; and a dielectric layer is deposited to outwardly close the trenches and the opening. Thus, the process is greatly simplified, and numerous packaging problems eliminated.

    摘要翻译: 压力传感器集成在使用绝缘层作为牺牲层的SOI(绝缘体上硅)衬底中,其通过化学蚀刻部分去除以形成隔膜。 为了制造传感器,在形成压电元件和集成在同一芯片中的电子部件之后,在基板的上晶片中形成沟槽,并从表面延伸到绝缘材料层; 绝缘材料层通过沟槽进行化学蚀刻,以形成隔膜下面的开口; 并且沉积介电层以向外关闭沟槽和开口。 因此,该过程被大大简化,并且消除了许多封装问题。

    Semiconductor integrated capacitive acceleration sensor and relative fabrication method
    2.
    发明授权
    Semiconductor integrated capacitive acceleration sensor and relative fabrication method 有权
    半导体集成电容式加速度传感器及相关制造方法

    公开(公告)号:US06232140B1

    公开(公告)日:2001-05-15

    申请号:US09458400

    申请日:1999-12-10

    IPC分类号: H01L2100

    摘要: The acceleration sensor is formed in a monocrystalline silicon wafer forming part of a dedicated SOI substrate presenting a first and second monocrystalline silicon wafer separated by an insulting layer having an air gap. A well is formed in the second wafer over the air gap and is subsequently trenched up to the air gap to release the monocrystalline silicon mass forming the movable mass of the sensor; the movable mass has two numbers of movable electrodes facing respective pluralities of fixed electrodes. In the idle condition, each movable electrode is separated by different distances from the two fixed electrodes facing the movable electrode.

    摘要翻译: 加速度传感器形成在形成由具有气隙的绝缘层分离的第一和第二单晶硅晶片的专用SOI衬底的一部分的单晶硅晶片中。 在空气间隙中的第二晶片中形成一个阱,然后将其向上延伸到气隙以释放形成传感器的可移动质量块的单晶硅质量块; 可移动物体具有面对多个固定电极的两个可动电极数。 在空闲状态下,每个可移动电极与面对可动电极的两个固定电极分开不同的距离。

    Method of fabricating integrated semiconductor devices comprising a
chemoresistive gas microsensor
    3.
    发明授权
    Method of fabricating integrated semiconductor devices comprising a chemoresistive gas microsensor 失效
    制造包含化学耐药性微量传感器的集成半导体器件的方法

    公开(公告)号:US5883009A

    公开(公告)日:1999-03-16

    申请号:US903531

    申请日:1997-07-30

    CPC分类号: G01N27/12 H01L21/764

    摘要: The chemoresistive gas sensor comprises a heating element integrated in a dedicated SOI substrate having an air gap in the intermediate oxide layer between two wafers of monocrystalline silicon. A sensitive element of tin oxide is formed over the heating element and separated from it by a dielectric insulating and protective layer. A trench formed at the end of the fabrication of the device, extends from the surface of the wafer in which the heating element is integrated, up to the air gap to mechanically separate and insulate the sensitive element from the rest of the chip, thereby improving the mechanical characteristics sensitivity and response of the sensor.

    摘要翻译: 化学耐药性气体传感器包括集成在专用SOI衬底中的加热元件,其在中间氧化物层中具有在两晶片之间的单晶硅的气隙。 氧化锡的敏感元件形成在加热元件之上,并通过介电绝缘和保护层与其分离。 在器件制造结束时形成的沟槽从加热元件集成的晶片的表面延伸到气隙,以将敏感元件与芯片的其余部分机械地分离并绝缘,从而改善 传感器的机械特性灵敏度和响应。

    Semiconductor integrated capacitive acceleration sensor and relative
fabrication method
    4.
    发明授权
    Semiconductor integrated capacitive acceleration sensor and relative fabrication method 失效
    半导体集成电容式加速度传感器及相关制造方法

    公开(公告)号:US6104073A

    公开(公告)日:2000-08-15

    申请号:US903511

    申请日:1997-07-30

    摘要: The acceleration sensor is formed in a monocrystalline silicon wafer forming part of a dedicated SOI substrate presenting a first and second monocrystalline silicon wafer separated by an insulting layer having an air gap. A well is formed in the second wafer over the air gap and is subsequently trenched up to the air gap to release the monocrystalline silicon mass forming the movable mass of the sensor; the movable mass has two numbers of movable electrodes facing respective pluralities of fixed electrodes. In the idle condition, each movable electrode is separated by different distances from the two fixed electrodes facing the movable electrode.

    摘要翻译: 加速度传感器形成在形成由具有气隙的绝缘层分离的第一和第二单晶硅晶片的专用SOI衬底的一部分的单晶硅晶片中。 在空气间隙中的第二晶片中形成一个阱,然后将其向上延伸到气隙以释放形成传感器的可移动质量块的单晶硅质量块; 可移动物体具有面对多个固定电极的两个可动电极数。 在空闲状态下,每个可移动电极与面对可动电极的两个固定电极分开不同的距离。

    Magnetic bi-dimensional position sensor
    5.
    发明授权
    Magnetic bi-dimensional position sensor 失效
    磁性二维位置传感器

    公开(公告)号:US06529140B1

    公开(公告)日:2003-03-04

    申请号:US09085887

    申请日:1998-05-27

    IPC分类号: G08C1906

    CPC分类号: G01V3/081 G01D5/145

    摘要: A bi-dimensional position sensor that can be advantageously used in the turn system controlled from the steering wheel of a vehicle. The sensor includes a permanent magnet fixed to a control lever so as to move in a plane along first and second directions and to rotate about a third direction orthogonal to the preceding ones. The permanent magnet is movable with respect to an integrated device including a first group of sensor elements arranged spaced along the first direction, a second group of sensor elements arranged spaced along the second direction and a third group of sensor elements detecting the angular position of the permanent magnet. Electronics integrated with the sensor elements generate a code associated with each position which the permanent magnet may assume and generate a control signal corresponding to the desired function.

    摘要翻译: 一种二维位置传感器,其可以有利地用于从车辆的方向盘控制的转向系统中。 传感器包括固定到控制杆的永久磁铁,以沿着第一和第二方向在平面内移动并围绕与前述正交的第三方向旋转。 永磁体可相对于包括沿着第一方向间隔布置的第一组传感器元件的集成装置移动,第二组传感器元件沿着第二方向间隔布置,第三组传感器元件检测第二组传感器元件的角位置 永久磁铁 与传感器元件集成的电子产生与永磁体可以采取的每个位置相关联的代码,并产生对应于期望功能的控制信号。

    Manufacturing method and integrated microstructures of semiconductor material and integrated piezoresistive pressure sensor having a diaphragm of polycrystalline semiconductor material
    6.
    发明授权
    Manufacturing method and integrated microstructures of semiconductor material and integrated piezoresistive pressure sensor having a diaphragm of polycrystalline semiconductor material 有权
    半导体材料的制造方法和集成微结构以及具有多晶半导体材料的隔膜的集成压阻式压力传感器

    公开(公告)号:US06472244B1

    公开(公告)日:2002-10-29

    申请号:US09723357

    申请日:2000-11-27

    IPC分类号: H01L2100

    摘要: The method inlcudes the steps of forming a sacrificial buried region of insulating material on a substrate of monocrystalline semiconductor material, epitaxially growing a first semiconductor material layer on the substrate, the first semiconductor material layer including a polycrystalline region over the sacrificial buried region and a monocrystalline region elsewhere, the substrate and the semiconductor material layer surrounding the sacrificial buried region on all sides, and removing the sacrificial buried region. The portion of the polycrystalline region surrounded by the trench thus forms a suspended structure separated and isolated thermally from the rest of the semiconductor material layer. Using microelectronics processes, electronic components are formed in the monocrystalline region, and dedicated regions are formed at the suspended structure, so that the electronic components are integrated in the same chip with static, kinematic or dynamic microstructures.

    摘要翻译: 该方法包括在单晶半导体材料的衬底上形成绝缘材料的牺牲掩埋区域的步骤,在衬底上外延生长第一半导体材料层,第一半导体材料层包括在牺牲掩埋区域上的多晶区域和单晶 区域,衬底和围绕所有侧面的牺牲掩埋区域的半导体材料层,以及去除牺牲掩埋区域。 由沟槽围绕的多晶区域部分因此形成与半导体材料层的其余部分分离和隔离的悬浮结构。 使用微电子工艺,电子元件形成在单晶区域,并且在悬浮结构处形成专用区域,使得电子元件与静态,运动学或动态微结构集成在相同的芯片中。

    Integrated piezoresistive pressure sensor
    7.
    发明授权
    Integrated piezoresistive pressure sensor 失效
    集成压阻式压力传感器

    公开(公告)号:US6131466A

    公开(公告)日:2000-10-17

    申请号:US903168

    申请日:1997-07-30

    CPC分类号: G01L9/0042 G01L9/0055

    摘要: The pressure sensor is integrated in an SOI (Silicon-on-Insulator) substrate using the insulating layer as a sacrificial layer, which is partly removed by chemical etching to form the diaphragm. To fabricate the sensor, after forming the piezoresistive elements and the electronic components integrated in the same chip, trenches are formed in the upper wafer of the substrate and extending from the surface to the layer of insulating material; the layer of insulating material is chemically etched through the trenches to form an opening beneath the diaphragm; and a dielectric layer is deposited to outwardly close the trenches and the opening. Thus, the process is greatly simplified, and numerous packaging problems eliminated.

    摘要翻译: 压力传感器集成在使用绝缘层作为牺牲层的SOI(绝缘体上硅)衬底中,其通过化学蚀刻部分去除以形成隔膜。 为了制造传感器,在形成压电元件和集成在同一芯片中的电子部件之后,在基板的上晶片中形成沟槽,并从表面延伸到绝缘材料层; 绝缘材料层通过沟槽进行化学蚀刻,以形成隔膜下面的开口; 并且沉积介电层以向外关闭沟槽和开口。 因此,该过程被大大简化,并且消除了许多封装问题。

    Method for forming zener diode with high time stability and low noise
    9.
    发明授权
    Method for forming zener diode with high time stability and low noise 失效
    用于形成具有高时间稳定性和低噪声的齐纳二极管的方法

    公开(公告)号:US5756387A

    公开(公告)日:1998-05-26

    申请号:US581493

    申请日:1995-12-29

    摘要: Zener diode with high stability in time and low noise for integrated circuits and provided in an epitaxial pocket insulated from the rest of a type N epitaxial layer grown on a substrate of type P semiconductor material. In said pocket are included a type N+ cathode region and a type P anode region enclosing it. The cathode region has a peripheral part surrounding a central part extending in the anode region less deeply than the peripheral part.

    摘要翻译: 在集成电路的时间上具有高稳定性和低噪声的齐纳二极管,并且提供在与类型P半导体材料的衬底上生长的N型外延层的其余部分绝缘的外延袋中。 在所述口袋中包括N +型阴极区和包围它的P型阳极区。 阴极区域具有围绕在阳极区域延伸的中心部分的周边部分不比周边部分深。

    Buried-resistance semiconductor device and fabrication process
    10.
    发明授权
    Buried-resistance semiconductor device and fabrication process 失效
    埋电阻半导体器件及制造工艺

    公开(公告)号:US4663647A

    公开(公告)日:1987-05-05

    申请号:US779091

    申请日:1985-09-23

    CPC分类号: H01L29/8605 H01L21/761

    摘要: A buried-resistance semiconductor device is constructed by forming a P-type monocrystalline silicon substrate on which an epitaxial layer of silicon doped with type N impurities is grown, a portion of the epitaxial layer being insulated by a P-type insulating region extending from the substrate to the surface of the epitaxial layer. Two suitably-spaced terminals are secured to the surface of the epitaxial layer in the area bounded by the insulating region. Two separation regions extending into the surface layer are formed in the part of the epitaxial layer between the terminals, and a buried region extends from the substrate between the separation regions without being in contact with them. The three regions are of P-type material, and have an elongated shape and are bounded at the ends by the insulating region.

    摘要翻译: 掩埋电阻半导体器件通过形成P型单晶硅衬底而构成,其上生长掺杂有N型杂质的硅的外延层,外延层的一部分由从P型绝缘区延伸的P型绝缘区绝缘 衬底到外延层的表面。 两个适当间隔的端子在由绝缘区域限定的区域中固定到外延层的表面。 延伸到表面层的两个分离区域形成在端子之间的外延层的部分中,并且掩埋区域在分离区域之间从衬底延伸而不与它们接触。 这三个区域是P型材料,并且具有细长形状并且在末端被绝缘区限定。