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公开(公告)号:US20190331858A1
公开(公告)日:2019-10-31
申请号:US15966362
申请日:2018-04-30
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Kevin B. Leigh , Paul Kessler Rosenberg , Sagi Mathai , Mir Ashkan Seyedi , Michael Renne Ty Tan , Wayne Victor Sorin , Marco Fiorentino
IPC: G02B6/30
Abstract: In example implementations, an optical connector is provided. The optical connector includes a jumper holder, a base bracket, and an optical ferrule. The jumper holder holds a plurality of ribbon fibers. The base bracket is coupled to an electrical substrate to mate with the jumper holder. The optical ferrule is coupled to an end of each one of the plurality of ribbon fibers. The optical ferrule is laterally inserted into a corresponding orthogonal socket that is coupled to a silicon interposer on the electrical substrate to optically mate the optical ferrule to the orthogonal socket.
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公开(公告)号:US20190324205A1
公开(公告)日:2019-10-24
申请号:US15959580
申请日:2018-04-23
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Amit S. Sharma , John Paul Strachan , Marco Fiorentino
IPC: G02B6/12
Abstract: Systems and methods are provided for processing an optical signal. An example system may include a source disposed on a substrate and capable of emitting the optical signal. A first waveguide is formed in the substrate to receive the optical signal. A first coupler is disposed on the substrate to receive a reflected portion of the optical signal. A second waveguide is formed in the substrate to receive the reflected portion from the first coupler. A second coupler is formed in the substrate to mix the optical signal and the reflected portion to form a mixed signal. Photodetectors are formed in the substrate to convert the mixed signal to an electrical signal. A processor is electrically coupled to the substrate and programmed to convert the electrical signal from a time domain to a frequency domain to determine a phase difference between the optical signal and the reflected portion.
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公开(公告)号:US20190317286A1
公开(公告)日:2019-10-17
申请号:US15953765
申请日:2018-04-16
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Mir Ashkan Seyedi , Marco Fiorentino , Geza Kurczveil , Raymond G. Beausoleil
Abstract: A photonic integrated circuit package includes two arrays or sets of integrated comb laser modules that are bonded to a silicon interposer. Each comb laser of an array has a common or overlapping spectral range, with each laser in the array being optically coupled to a local optical bus. The effective spectral range of the lasers in each array are different, or distinct, as to each array. An optical coupler is disposed within the silicon interposer and is optically coupled to each of the local optical buses. An ASIC (application specific integrated circuit) is bonded to the silicon interposer and provides control and operation of the comb laser modules.
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公开(公告)号:US10432319B2
公开(公告)日:2019-10-01
申请号:US15768975
申请日:2015-10-29
Applicant: Hewlett Packard Enterprise Development LP
Inventor: Kehan Zhu , Cheng Li , Marco Fiorentino
Abstract: One example of a receiver includes a first stage, a second stage, a third stage, and an automatic gain controller. The first stage amplifies an input signal to provide a first signal. The second stage amplifies or attenuates the first signal to provide a second signal based on a tunable gain of the second stage. The tunable gain is adjusted in response to a differential signal. The third stage amplifies the second signal to provide an output signal. The automatic gain controller provides the differential signal based on a comparison between a peak voltage of the output signal and the sum of a common mode voltage of the output signal and an offset voltage.
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公开(公告)号:US10431707B2
公开(公告)日:2019-10-01
申请号:US15560649
申请日:2015-04-30
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Cheng Li , Zhihong Huang , Marco Fiorentino , Raymond G. Beausoleil
IPC: H01L31/10 , H01L31/107 , H04B10/00 , H01L25/04 , H01L27/146 , H04B10/69
Abstract: An example device in accordance with an aspect of the present disclosure includes an avalanche photodetector to enable carrier multiplication for increased responsivity, and a receiver based on source-synchronous CMOS and including adaptive equalization. The photodetector and receiver are monolithically integrated on a single chip.
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公开(公告)号:US20190190610A1
公开(公告)日:2019-06-20
申请号:US16275727
申请日:2019-02-14
Applicant: Hewlett Packard Enterprise Development LP
Inventor: Cheng Li , Jim Huang , Ashkan Seyedi , Marco Fiorentino , Raymond G. Beausoleil
CPC classification number: H04B10/503 , G02F1/0102 , G02F1/0123 , G02F1/225 , G02F2001/212
Abstract: One example includes a bias-based Mach-Zehnder modulation (MZM) system. The system includes a Mach-Zehnder modulator to receive and split an optical input signal and to provide an intensity-modulated optical output signal based on a high-frequency data signal to modulate a relative phase of the split optical input signal to transmit data and based on a bias voltage to modulate the relative phase of the split optical input signal to tune the Mach-Zehnder modulator. The system also includes a bias feedback controller to compare a detection voltage associated with the intensity-modulated output signal with a reference voltage to measure an extinction ratio associated with an optical power of the intensity-modulated optical output signal and to adjust the bias voltage based on the comparison to substantially maximize the extinction ratio.
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公开(公告)号:US20190089466A1
公开(公告)日:2019-03-21
申请号:US16085364
申请日:2016-04-14
Applicant: Hewlett Packard Enterprise Development LP
Inventor: Cheng Li , Kunzhi Yu , Marco Fiorentino , Raymond G. Beausoleil
IPC: H04B10/69 , H04B10/63 , H04B10/516 , H04L25/49
CPC classification number: H04B10/6931 , H04B10/5161 , H04B10/63 , H04B10/695 , H04L25/4917
Abstract: An example optical receiver may have an optical receiver front-end, four slicers, and a logic block. The optical receiver front-end may include a transimpedance amplifier to convert a photodiode output signal to a voltage signal. Three of the slicers may be data slicers, and one of the slicers may be an edge slicer. The slicers may each: shift the voltage signal based on an offset voltage set for the respective slicer, determine whether the shifted voltage signal is greater than a threshold value and generate a number of comparison signals based on the determining, and generate multiple digital signals by demuxing the comparison signals. The logic block may perform PAM-4 to binary decoding based on the data signals output by the data slicers and clock-and-data-recovery based on the digital signals output by the edge slicer.
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公开(公告)号:US10192857B2
公开(公告)日:2019-01-29
申请号:US15338699
申请日:2016-10-31
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Marco Fiorentino , Di Liang , Geza Kurczveil , Raymond G Beausoleil
Abstract: According to an example of the present disclosure a direct bandgap (DBG) semiconductor structure is bonded to an assembly comprising a silicon photonics (SiP) wafer and a complementary metal-oxide-semiconductor (CMOS) wafer. The SiP wafer includes photonics circuitry and the CMOS wafer includes electronic circuitry. The direct bandgap (DBG) semiconductor structure is optically coupled to the photonics circuitry.
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公开(公告)号:US20180275348A1
公开(公告)日:2018-09-27
申请号:US15781531
申请日:2015-12-11
Applicant: Hewlett Packard Enterprise Development LP
Inventor: Joaquin Matres , Wayne Victor Sorin , Sagi Mathai , Lars Heige Thylen , Michael Renne Ty Tan , Marco Fiorentino
Abstract: In the examples provided herein, a system includes a loop waveguide; and a grating coupler formed on the loop waveguide to couple light impinging on the grating coupler having a first polarization into the loop waveguide in a first direction, and to couple light having a second polarization, orthogonal to the first polarization, into the loop waveguide in a second direction. The system also includes a ring resonator positioned near the loop waveguide tuned to have a resonant wavelength at a first wavelength to couple light at the first wavelength out of the loop waveguide into the ring resonator. An output waveguide positioned near the ring resonator couples light out of the ring resonator into the output waveguide; and a photodetector detects light propagating out of a first end and a second end of the output waveguide.
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公开(公告)号:US20180097139A1
公开(公告)日:2018-04-05
申请号:US15560649
申请日:2015-04-30
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor: Cheng Li , Zhihong Huang , Marco Fiorentino , Raymond G. Beausoleil
IPC: H01L31/107 , H01L25/04 , H01L27/146 , H04B10/69
CPC classification number: H01L31/107 , H01L25/041 , H01L27/14634 , H01L27/14636 , H04B10/00 , H04B10/6911
Abstract: An example device in accordance with an aspect of the present disclosure includes an avalanche photodetector to enable carrier multiplication for increased responsivity, and a receiver based on source-synchronous CMOS and including adaptive equalization. The photodetector and receiver are monolithically integrated on a single chip.
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