公开(公告)号：US20250124876A1

公开(公告)日：2025-04-17

申请号：US18577444

申请日：2023-03-29

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Chengyuan Luo ,  Pan Xu ,  Ying Han ,  Donghui Zhao ,  Guangshuang Lv ,  Xing Zhang ,  Miao Liu ,  Xing Yao ,  Cheng Xu

IPC: G09G3/3266 ,  H10K59/131

Abstract: The present disclosure provides a circuitry structure and a display substrate. The circuitry structure includes a base substrate, and a functional transistor and a signal transmission line arranged on the base substrate. The functional transistor includes a first conductive connection member, a first electrode, a second electrode, at least two gate electrode patterns and at least one active pattern. Orthogonal projections of the first electrode, the second electrode and the at least two gate electrode patterns onto the base substrate at least partially overlap with an orthogonal projection of the active pattern onto the base substrate, and first ends of the gate electrode patterns are coupled to each other. The first conductive connection member is arranged at a layer different from the gate electrode pattern, and coupled to second ends of the gate electrode patterns. The signal transmission line is coupled to the first conductive connection member.

公开(公告)号：US12262597B2

公开(公告)日：2025-03-25

申请号：US18282106

申请日：2022-11-28

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Ying Han ,  Pan Xu ,  Xing Zhang ,  Guangshuang Lv ,  Donghui Zhao ,  Chengyuan Luo ,  Cheng Xu

IPC: H10K59/124 ,  G09G3/00 ,  G09G3/3225 ,  H10K59/122 ,  H10K59/131

Abstract: A display substrate and a display device, the display substrate includes a base substrate, a pixel driving circuit layer, a first planarization layer, a first metal layer, a second planarization layer, a plurality of first electrodes and a pixel definition layer; the pixel driving circuit layer includes a plurality of pixel driving circuits, the first planarization layer includes a plurality of first vias respectively exposing output terminals of the pixel driving circuits, the first metal layer includes a plurality of data lines extending in a first direction, the pixel definition layer includes a plurality of first definition walls extending in the first direction and a plurality of second definition walls extending in a second direction, and an orthographic projection of at least part of the data lines on the base substrate respectively overlaps with orthographic projections of the plurality of first definition walls on the base substrate.

公开(公告)号：US12245463B2

公开(公告)日：2025-03-04

申请号：US17637772

申请日：2021-02-02

Applicant: BOE Technology Group Co., Ltd.

Inventor： Ying Han ,  Ling Wang ,  Yicheng Lin ,  Pan Xu ,  Guoying Wang ,  Xing Zhang

IPC: H10K59/121 ,  H10K59/126 ,  H10K59/131 ,  H10K59/60

Abstract: Disclosed are a display panel and a display device. The display panel includes: a base substrate; a detection circuit, located on the side of the base substrate, and including a transistor and a photosensitive detection component electrically connected to the transistor, and an orthographic projection of the transistor on the base substrate and an orthographic projection of the photosensitive detection component on the base substrate do not overlap with each other; a planarization layer, located on the side of the detection circuit facing away from the base substrate, and including a first surface facing away from the base substrate at the position in which the transistor is located, and a second surface facing away from the base substrate at the position in which the photosensitive detection component is located; and a light-emitting device, located on the side of the planarization layer away from the detection circuit.

公开(公告)号：US12217695B2

公开(公告)日：2025-02-04

申请号：US17794994

申请日：2021-08-24

Applicant: BOE Technology Group Co., Ltd.

Inventor： Pan Xu ,  Hongli Wang ,  Danyang Ma ,  Guoying Wang ,  Xing Zhang ,  Chengyuan Luo ,  Ying Han

IPC: G09G3/3266 ,  H10K59/131

Abstract: A display substrate includes an underlayer substrate and a circuit structure layer. The circuit structure layer is located in a display area of the underlayer substrate. The circuit structure layer includes at least one first circuit area and at least one second circuit area. The first circuit area includes at least one first gate drive circuit; the second circuit area includes at least one second gate drive circuit. The first gate drive circuit is cascaded with the second gate drive circuit. The first gate drive circuit includes a plurality of cascaded first gate drive units, and the second gate drive circuit includes a plurality of cascaded second gate drive units. A plurality of first gate drive units are sequentially arranged in a second direction, and a plurality of second gate drive units are sequentially arranged in the second direction.

公开(公告)号：US12058880B2

公开(公告)日：2024-08-06

申请号：US17297088

申请日：2020-10-22

Applicant: BOE Technology Group Co., Ltd.

Inventor： Pan Xu ,  Yicheng Lin ,  Ling Wang ,  Guoying Wang ,  Ying Han ,  Xing Zhang

IPC: H10K50/824 ,  H10K50/844 ,  H10K59/122 ,  H10K71/00 ,  H10K102/00

CPC classification number: H10K50/824 ,  H10K50/844 ,  H10K71/00 ,  H10K59/122 ,  H10K2102/3026

Abstract: A display substrate, a manufacturing method thereof, and a display panel. The display substrate includes a base, a first electrode, a first auxiliary cathode, a second electrode and a second auxiliary cathode, a pixel definition layer and a cathode. The first and second electrodes are located in the display area and the first and second auxiliary cathodes are located in the non-emitting area. The orthogonal projections of the first auxiliary cathode and the second auxiliary cathode on the base are in a mesh structure. The pixel definition layer is at least located in the non-emitting area. The cathode at least covers the display area and the cathode is arranged on one side of the pixel definition layer far away from the base; wherein the cathode, the first auxiliary cathode and the second auxiliary cathode are electrically connected.

公开(公告)号：US20240206249A1

公开(公告)日：2024-06-20

申请号：US17790623

申请日：2021-08-23

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xing Zhang ,  Pan Xu ,  Dacheng Zhang ,  Ying Han ,  Guoying Wang ,  Zhan Gao ,  Chengyuan Luo ,  Yi Chen

IPC: H10K59/131 ,  H10K59/124

CPC classification number: H10K59/131 ,  H10K59/124

Abstract: Provided is a display panel. The display panel includes: a base substrate, including a display region and a peripheral region adjacent to the display region; a first power trace, disposed in the peripheral region and on a side of the base substrate; a connecting trace, disposed in the peripheral region and on a side of the base substrate; a plurality of signal lines, disposed in the display region and the peripheral region; an insulating layer, disposed in the display region and the peripheral region; and a cathode layer, disposed in the display region and the peripheral region.

公开(公告)号：US11967620B2

公开(公告)日：2024-04-23

申请号：US17682239

申请日：2022-02-28

Applicant: BOE Technology Group Co., Ltd.

Inventor： Pan Xu ,  Yicheng Lin ,  Cuili Gai ,  Ling Wang ,  Yongqian Li

IPC: H01L29/417 ,  H01L27/12 ,  H01L29/66 ,  H01L29/786 ,  H10K59/121 ,  H10K59/126 ,  H10K59/131 ,  H01L21/44

CPC classification number: H01L29/41733 ,  H01L27/127 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/78633 ,  H10K59/1216 ,  H10K59/126 ,  H10K59/131 ,  H01L21/44 ,  H01L29/7869

Abstract: Embodiments of the present disclosure provide a thin film transistor, a method of manufacturing the same, and a display device. The thin film transistor includes a metal conductive pattern layer, an interlayer insulating layer, and a metal oxide layer; and the metal conductive pattern layer includes: a light shielding pattern, a source signal line, and/or a drain signal line; the metal oxide layer includes: a source electrode, a drain electrode, and an active layer. An orthographic projection of the active layer on the base substrate has an overlapping region with that of the light shielding pattern; the source electrode extends through the interlayer insulating layer to connect to the source signal line, and/or the drain electrode extends through the interlayer insulating layer to connect to the drain signal line.

公开(公告)号：US11955063B2

公开(公告)日：2024-04-09

申请号：US18042342

申请日：2022-05-31

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Ying Han ,  Pan Xu ,  Xing Zhang ,  Chengyuan Luo ,  Donghui Zhao

IPC: G09G3/12 ,  G09G3/30 ,  G09G3/32 ,  H01L27/12

CPC classification number: G09G3/32 ,  H01L27/124 ,  G09G2300/0408 ,  G09G2300/0842 ,  G09G2310/0262 ,  G09G2310/08 ,  G09G2320/02 ,  H01L27/1222

Abstract: A display panel includes: plurality of pixel circuits arranged on base substrate, at least one pixel circuit includes a drive transistor and a first switch transistor an active layer arranged on base substrate and including a first active portion and a second active portion, the first active portion configured to form a channel portion of the drive transistor, the second active portion is configured to form a second electrode connection portion of the first switch transistor; and a first conductive layer arranged on a side of the active layer away from the base substrate, the first conductive layer includes a first conductive portion, a portion of the first conductive portion used to form a gate electrode of the drive transistor another portion is electrically connected to the second active portion, and a channel length of the channel portion of the drive transistor is greater than a channel width.

公开(公告)号：US20240008333A1

公开(公告)日：2024-01-04

申请号：US18041698

申请日：2022-06-29

Applicant: BOE Technology Group Co., Ltd.

Inventor： Ying Han ,  Pan Xu ,  Guoying Wang ,  Xing Zhang ,  Chengyuan Luo ,  Mingi Chu ,  Dacheng Zhang

IPC: H10K59/131 ,  H10K59/121

CPC classification number: H10K59/1315 ,  H10K59/1213

Abstract: A display substrate and a display device are provided. The display substrate includes: a base substrate; a plurality of pixel units arranged on the base substrate, the plurality of pixel units are arranged in an array in a first direction and a second direction, each pixel unit includes a plurality of sub-pixels, each sub-pixel includes a light emitting element and a pixel driving circuit used to drive the light emitting element, and the pixel driving circuit includes a first transistor; and a plurality of gate lines arranged on the base substrate, the plurality of gate lines include a plurality of first gate lines used to provide a scanning signal to gate electrodes of the first transistors of the pixel driving circuits in a plurality of rows of sub-pixels respectively. At least one first gate line includes a first gate sub-line, a second gate sub-line and a plurality of connecting lines.

公开(公告)号：US11545540B2

公开(公告)日：2023-01-03

申请号：US16344013

申请日：2018-04-02

Applicant: BOE Technology Group Co., Ltd.

Inventor： Pan Xu ,  Xiaoyun Liu

IPC: H01L29/08 ,  H01L27/32 ,  H01L51/56

Abstract: The present application provides an array substrate. The array substrate includes a base substrate; a plurality of light emitting elements on the base substrate; a plurality of driving thin film transistors for driving light emission of the plurality of light emitting elements, each of the plurality of driving thin film transistors including a first active layer; one or more power supply lines configured to supply a driving current respectively to the plurality of light emitting elements; and a light shielding layer configured to shield light from irradiating on the first active layer, the light shielding layer being electrically connected to at least one of the one or more power supply lines.