Abstract:
A shift register unit and a method for driving the same, a gate drive circuitry and a display device are provided. The shift register unit includes: an output circuit, coupled to a first signal output terminal and a pull-up control node, and configured to receive a first clock signal and output the first clock signal to the first signal output terminal under control of a potential of the pull-up control node; an output control circuit, coupled to a signal input terminal, the pull-up control node and the first signal output terminal; a clock control circuit configured to receive a first clock signal and at least one additional clock signal and generate a second clock signal using the first clock signal and the at least one additional clock signal; and a transmission circuit coupled to a second signal output terminal and the pull-up control node.
Abstract:
The present disclosure provides a pixel driving circuit and a method for driving the same, a pixel unit, and a display panel. The pixel circuit includes: a driving sub-circuit, configured to generate driving current based on a data signal and a first voltage; a first light-emitting control sub-circuit configured to receive a first control signal and the first voltage, and provide the first voltage to the driving sub-circuit under control of the first control signal; a second light-emitting control sub-circuit configured to receive a second control signal and provide driving current generated by the driving sub-circuit to an output terminal of the pixel driving circuit under control of the second control signal; a driving control sub-circuit configured to receive the second control signal and the data signal and provide the data signal to the driving sub-circuit under control of the second control signal; and a reset sub-circuit configured to receive a reset signal and a second voltage, and reset the driving sub-circuit using the second voltage under control of the reset signal.
Abstract:
A shift-buffer circuit, a gate driving circuit, a display panel, a display device, and a driving method. The shift-buffer circuit includes: a shift register and a plurality of buffers connected with the shift register. The shift register includes a shift output terminal; the shift register is configured to output a shift output signal from the shift output terminal, in response to a shift clock signal; each of the buffers includes a buffer input terminal and a buffer output terminal, the buffer input terminal being connected with the shift output terminal; each of the buffers is configured to output a buffer output signal from the buffer output terminal, in response to a buffer clock signal.
Abstract:
The present disclosure discloses a gate drive circuit, a display panel and a driving method for the gate drive circuit. The gate drive circuit includes a plurality of shift register units connected in cascade; and further includes: buffer units which are in a one-to-one correspondence with shift register units at all levels, and touch control switch units which are in a one-to-one correspondence with shift register units at even levels. Each buffer unit in the gate drive circuit can increase the holding time of the effective pulse signal output by the shift register unit at a corresponding level by one line before resetting, and the effective pulse signal output by a buffer unit at an even level under the control of a touch control unit and the effective pulse signal output by a buffer unit at an adjacent previous odd level are reset at the same time.
Abstract:
The present invention discloses a gate driver on array circuit and a driving method thereof, and a display device. The gate driver on array circuit comprises a first gate driver on array sub-circuit and a second gate driver on array sub-circuit; the first gate driver on array sub-circuit is configured to drive in a first working state which is a state in which no defect occurs in the first gate driver on array sub-circuit; the second gate driver on array sub-circuit is configured to drive in a second working state which is a state in which a defect occurs in the first gate driver on array sub-circuit. The present invention improves the yield rate of the gate driver on array circuit.
Abstract:
The present disclosure provides a shift register unit, a gate electrode drive circuit and a display apparatus, which relates to a technical field of display. The shift register unit includes an input reset module, a pull up module, a control module and a pull down module. By inputting a high level into the second signal input end of the input reset module in the touch scan to maintain the level at the pull up control node, the electrical leak effects at the pull up control node may be avoided efficiently. In this way, the defects of insufficient charging rate of the row pixels may be avoided and the dark lines or bad bright lines may be suppressed.
Abstract:
A display substrate is provided. The display substrate includes a base substrate including a display region and a peripheral region, a gate scan driving circuit, a light-emitting control scan driving circuit, a first power line, a first planarization layer, a second planarization layer and a first shielding layer, a second shielding layer and a plurality of touch traces. The first planarization layer and the second planarization layer further include an open slot. An orthographic projection of at least part of the touch traces on the base substrate falls into the open slot. In an area of the open slot, an orthographic projection of the second shielding layer on the base substrate overlaps with an orthographic projection of a part of the touch traces on the base substrate.
Abstract:
The display substrate includes a shift register arranged on a base substrate, the shift register includes multiple stages of driving circuits, the driving circuit includes a first/second input circuit, a first/second output circuit and a control circuit; the first output circuit is configured to provide a first scanning driving signal to the first driving signal output terminal under the control of a potential of a first node and a potential of a second node; the first input circuit is configured to input a signal to the third node under the control of the clock signal; the second input circuit is configured to input a signal provided by the power line to the second node under the control of the potential of the third node; the control circuit is configured to control the potential of the third node and the potential of the first node.
Abstract:
Provided are a display substrate and a driving method thereof. The display substrate includes a first storage circuit and a second storage circuit, a first terminal of the first storage circuit being electrically connected to the control terminal of the driving circuit, a second terminal of the first storage circuit being electrically connected to the first terminal of the driving circuit, and the first storage circuit being configured to store the data signal; a first terminal of the second storage circuit being electrically connected to the first electrode of the light-emitting element and a second terminal of the second storage circuit being electrically connected to a second electrode of the light-emitting element.
Abstract:
Disclosed is a drive control circuit including an input circuit (10), a first output circuit (11), and a second output circuit (12). The first output circuit (11) is electrically connected with the input circuit (10) and a first output end (OUT1) and is configured to output a first output signal from the first output end (OUT1) under control of the input circuit (11). The second output circuit (12) is electrically connected with the input circuit (10) and a second output end (OUT2), or electrically connected with the first output end (OUT1) and a second output end (OUT2), and is configured to output a second output signal from the second output end (OUT2) under control of the input circuit (10) or the first output end (OUT1). The first output signal is different from the second output signal.