公开(公告)号：US20120162172A1

公开(公告)日：2012-06-28

申请号：US13198063

申请日：2011-08-04

申请人： BYOUNG-JUN LEE ,  Seung-Hwan Moon ,  Yun-Jae Kim ,  Nam-Hee Goo ,  Myoung-Chul Kim ,  Bo-Ram Kim ,  Jong-Yoon Lee

发明人： BYOUNG-JUN LEE ,  Seung-Hwan Moon ,  Yun-Jae Kim ,  Nam-Hee Goo ,  Myoung-Chul Kim ,  Bo-Ram Kim ,  Jong-Yoon Lee

IPC分类号： G09G5/00

CPC分类号： G09G3/3614 ,  G09G3/003 ,  H04N13/359

摘要： A method of driving a display panel determines whether an image mode of an image signal is a 2D flat image mode or a 3D stereoscopic image mode. A first reverse signal and a second reverse signal different from the first reverse signal are generated according to the image mode. The image signal is converted to a first polarity data voltage or a second polarity data voltage with respect to a reference voltage based on the first reverse signal or the second reverse signal, and the first polarity data voltage or the second polarity data voltage is outputted to a display panel. During the 3D stereoscopic image mode, polarities of data voltages are reversed at a period of a plurality of frames, so that display quality of the 3D stereoscopic image may be enhanced.

摘要翻译： 驱动显示面板的方法确定图像信号的图像模式是2D平面图像模式还是3D立体图像模式。 根据图像模式生成与第一反向信号不同的第一反向信号和第二反向信号。 基于第一反向信号或第二反向信号，将图像信号相对于参考电压转换为第一极性数据电压或第二极性数据电压，并将第一极性数据电压或第二极性数据电压输出到 显示面板。 在3D立体图像模式期间，数据电压的极性在多个帧的周期被反转，从而可以提高3D立体图像的显示质量。

公开(公告)号：US08008690B2

公开(公告)日：2011-08-30

申请号：US12274691

申请日：2008-11-20

申请人： Seung-Hwan Moon ,  Back-Won Lee

发明人： Seung-Hwan Moon ,  Back-Won Lee

IPC分类号： H01L27/148

CPC分类号： H01L29/78696 ,  H01L27/124 ,  H01L29/41733 ,  H01L29/41775 ,  H01L29/66765 ,  H01L29/78669

摘要： An amorphous-silicon thin film transistor and a shift resister shift resister having the amorphous-silicon TFT include a first conductive region, a second conductive region and a third conductive region. The first conductive region is formed on a first plane spaced apart from a substrate by a first distance. The second conductive region is formed on a second plane spaced apart from the substrate by a second distance. The second conductive region includes a body conductive region and two hand conductive regions elongated from both ends of the body conductive region to form an U-shape. The third conductive region is formed on the second plane. The third conductive region includes an elongated portion. The elongated portion is disposed between the two hand conductive regions of the second conductive region. The amorphous-silicon TFT and the shift resister having the amorphous TFT reduce a parasitic capacitance between the gate electrode and drain electrode.

摘要翻译： 具有非晶硅TFT的非晶硅薄膜晶体管和移相寄存器包括第一导电区域，第二导电区域和第三导电区域。 第一导电区域形成在与衬底间隔开第一距离的第一平面上。 第二导电区域形成在与衬底间隔开第二距离的第二平面上。 第二导电区域包括主体导电区域和从主体导电区域的两端延伸的两个手导电区域以形成U形。 第三导电区域形成在第二平面上。 第三导电区域包括细长部分。 细长部分设置在第二导电区域的两个手导电区域之间。 具有非晶硅的非晶硅TFT和移位寄存器减小了栅电极和漏电极之间的寄生电容。

公开(公告)号：US20110122117A1

公开(公告)日：2011-05-26

申请号：US12949931

申请日：2010-11-19

申请人： Jae-Hoon Lee ,  Seung-Hwan Moon ,  Yong-Soon Lee ,  Young-Su Kim ,  Chang-Ho Lee ,  Whee-Won Lee ,  Jun-Yong Song ,  Yu-Han Bae

发明人： Jae-Hoon Lee ,  Seung-Hwan Moon ,  Yong-Soon Lee ,  Young-Su Kim ,  Chang-Ho Lee ,  Whee-Won Lee ,  Jun-Yong Song ,  Yu-Han Bae

IPC分类号： G09G5/00

CPC分类号： G09G3/3677 ,  G09G2300/0408 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2330/021 ,  G11C19/28

摘要： A display panel includes an amorphous silicon gate driver in which a lower voltage than the gate-off voltage output from the gate driver is applied to an adjacent stage as a low voltage transmission signal.

摘要翻译： 显示面板包括非晶硅栅极驱动器，其中比栅极驱动器输出的栅极截止电压更低的电压作为低电压传输信号施加到相邻级。

公开(公告)号：US07808494B2

公开(公告)日：2010-10-05

申请号：US11241211

申请日：2005-09-30

申请人： Yong-Soon Lee ,  Po-Yun Park ,  Nam-Soo Kang ,  Haeng-Won Park ,  Seung-Hwan Moon

发明人： Yong-Soon Lee ,  Po-Yun Park ,  Nam-Soo Kang ,  Haeng-Won Park ,  Seung-Hwan Moon

IPC分类号： G09G5/00

CPC分类号： G09G3/3648 ,  G02F1/136286 ,  G09G3/3614 ,  G09G3/3677 ,  G09G2300/0408 ,  G09G2300/0426 ,  G09G2310/0251 ,  G09G2320/0219 ,  G09G2320/0233 ,  H01L27/124

摘要： A display device that employs fewer IC chips and lends itself to cost-efficient manufacturing is presented. The device includes: a plurality of pixel rows including first and second pixels alternately arranged; a plurality of first and second gate lines disposed above and below the pixel rows and applying first and second gate-on voltages to the first and the second pixels, respectively; data lines intersecting the first and the second gate lines, each data line disposed between the first and the second pixels in a pair of first and second pixels and applying data voltages to the first and the second pixels; first and second gate drivers applying the first and the second gate-on voltages to the first and the second gate lines; and a data driver applying the data voltages to the data lines, wherein the second gate-on voltage is applied earlier than the first gate-on voltages by a predetermined time.

摘要翻译： 提出了一种使用更少的IC芯片并适合于经济高效的制造的显示装置。 该装置包括：交替布置的包括第一和第二像素的多个像素行; 多个第一和第二栅极线设置在像素行的上方和下方，分别向第一和第二像素施加第一和第二栅极导通电压; 数据线与第一和第二栅极线相交，每条数据线布置在一对第一和第二像素中的第一和第二像素之间，并将数据电压施加到第一和第二像素; 第一和第二栅极驱动器将第一和第二栅极导通电压施加到第一和第二栅极线; 以及将数据电压施加到数据线的数据驱动器，其中第二栅极导通电压早于第一栅极导通电压施加预定时间。

公开(公告)号：US20100141622A1

公开(公告)日：2010-06-10

申请号：US12707639

申请日：2010-02-17

申请人： Dong-Gyu KIM ,  Seung-Hwan Moon ,  Yong-Soon Lee ,  Nam-Soo Kang ,  Haeng-Won Park

发明人： Dong-Gyu KIM ,  Seung-Hwan Moon ,  Yong-Soon Lee ,  Nam-Soo Kang ,  Haeng-Won Park

IPC分类号： G06F3/038

CPC分类号： G02F1/13454 ,  G02F1/1339 ,  G02F1/1345 ,  G02F1/136286 ,  G02F2001/13629 ,  H01L27/1222 ,  H01L27/124 ,  H01L27/1255 ,  H01L29/78669 ,  H01L29/78678

摘要： Gate-driving circuitry of a thin film transistor array panel is formed on the same plane as a display area of the transistor array panel. The gate-driving circuitry includes driving circuitry and signal lines having apertures. Thus, a sufficient amount of light, even though illuminated from the thin film transistor array panel side, can reach a photosetting sealant overlapping at least in part the gate-driving circuitry. The thin film transistor array panel and the counter panel are put together air-tight and moisture-tight. Consequently, the gate-driving circuitry can avoid corrosion by moisture introduced from outside. Gate-driving circuitry malfunctions can also be reduced.

摘要翻译： 薄膜晶体管阵列面板的栅极驱动电路形成在与晶体管阵列面板的显示区域相同的平面上。 栅极驱动电路包括具有孔径的驱动电路和信号线。 因此，尽管从薄膜晶体管阵列面板侧照明，足够量的光可以到达与栅极驱动电路至少部分重叠的光固化密封剂。 将薄膜晶体管阵列面板和对面板放在一起，气密和防潮。 因此，栅极驱动电路可以避免从外部引入的湿气的腐蚀。 栅极驱动电路故障也可以减少。

公开(公告)号：US07639224B2

公开(公告)日：2009-12-29

申请号：US11581611

申请日：2006-10-16

申请人： Seung-Hwan Moon

发明人： Seung-Hwan Moon

IPC分类号： G09G3/36

CPC分类号： G09G3/3696 ,  G09G2320/0276 ,  G09G2320/028 ,  G09G2320/0673 ,  Y10S345/905

摘要： Disclosed is an LCD capable of adaptively selecting a gamma curve based on a viewing angle. The LCD includes: a viewing angle detector for detecting the viewing angle of an LCD panel to generate information about the viewing angle, and a gamma curve determiner for selecting a gamma curve corresponding to the information of the viewing angle and controlling the gray level with a gamma voltage value defined by the selected gamma curve. The viewing angle detector has a driving voltage generator and a voltage divider. The driving voltage generator outputs a gate-on/off voltage and an analog driving voltage based on an externally input power, and the voltage divider drops the level of the gate-on voltage to generate a first voltage. A viewing angle generator outputs information about the viewing angle based on the analog driving voltage and the first voltage.

公开(公告)号：US07486269B2

公开(公告)日：2009-02-03

申请号：US10865216

申请日：2004-06-10

申请人： Seung-Hwan Moon

发明人： Seung-Hwan Moon

IPC分类号： G09G3/36

CPC分类号： G09G3/3677 ,  G09G2310/0286 ,  G11C19/00 ,  G11C19/184 ,  G11C19/28

摘要： A shift register includes a plurality of stages to generate a plurality of output signals, in sequence. Each of the stages includes a driving circuit, a charging circuit, a discharging circuit and a holding circuit. The driving circuit is configured to generate a first output signal in response to a first clock signal or a second clock signal having a phase different from the first clock signal. The charging circuit is configured to charge an electric charge in response to a scan start signal or a second output signal of an adjacent previous stage. The discharging circuit is configured to discharge the electric charge in response to a third output signal of an adjacent next stage. The holding circuit is configured to maintain the first output signal within a first voltage when the first output signal is in an inactive state. Therefore, a parasite capacitance is decreased to prevent a floating of a pull-up transistor.

摘要翻译： 移位寄存器包括多个级，以依次产生多个输出信号。 每个级包括驱动电路，充电电路，放电电路和保持电路。 驱动电路被配置为响应于第一时钟信号或具有与第一时钟信号不同的相位的第二时钟信号产生第一输出信号。 充电电路被配置为响应于相邻的前一级的扫描开始信号或第二输出信号对电荷充电。 放电电路被配置为响应于相邻的下一级的第三输出信号而放电电荷。 保持电路被配置为当第一输出信号处于非活动状态时将第一输出信号保持在第一电压内。 因此，降低寄生电容以防止上拉晶体管的浮置。

公开(公告)号：US07474304B2

公开(公告)日：2009-01-06

申请号：US11186202

申请日：2005-07-20

申请人： Jun-Pyo Lee ,  Yun-Jae Park ,  Seung-Hwan Moon

发明人： Jun-Pyo Lee ,  Yun-Jae Park ,  Seung-Hwan Moon

IPC分类号： G09G5/00

CPC分类号： G09G3/3696 ,  G09G3/3648

摘要： A driving voltage generating circuit includes: a pulse voltage generating unit generating predetermined pulse voltages; a first voltage generating unit connected to the pulse voltage generating unit and generating a first voltage; a first diode unit and a second diode unit commonly connected to the pulse voltage generating unit and each comprising at least a diode; a second voltage generating unit connected to the first diode unit and generating a second voltage; and a third voltage generating unit connected to the second diode unit and generating a third voltage.

摘要翻译： 驱动电压产生电路包括：产生预定脉冲电压的脉冲电压产生单元; 连接到脉冲电压产生单元并产生第一电压的第一电压产生单元; 共同连接到脉冲电压产生单元的第一二极管单元和第二二极管单元，并且每个包括至少二极管; 连接到所述第一二极管单元并产生第二电压的第二电压产生单元; 以及连接到所述第二二极管单元并产生第三电压的第三电压产生单元。

公开(公告)号：US07339569B2

公开(公告)日：2008-03-04

申请号：US10237303

申请日：2002-09-09

申请人： Seung-Hwan Moon ,  Nam-Soo Kang

发明人： Seung-Hwan Moon ,  Nam-Soo Kang

IPC分类号： G09G3/36 ,  G09G5/00 ,  G06F3/038

CPC分类号： G09G3/3688 ,  G09G3/3614 ,  G09G3/3696 ,  G09G2310/027 ,  G09G2320/0223

摘要： A liquid crystal display, apparatus for driving a liquid crystal display and a method of driving gray voltages for the same. The liquid crystal display includes a plurality of gate lines transmitting gate signals, a plurality of data lines intersecting the plurality of gate lines and transmitting data voltages, and a plurality of pixel rows. Each pixel row includes a plurality of pixels, and each pixel includes a switching element connected to one of the plurality of gate lines and one of the plurality of data lines. The polarity of the data voltages supplied to the plurality of pixels are inverted by a pixel group including two or more pixel rows. The absolute values of the data voltages applied to one row of the pixel group with respect to a first predetermined voltage are greater than the absolute values of the data voltages applied to another row of the pixel group for the same grays.

摘要翻译： 一种液晶显示器，用于驱动液晶显示器的装置和驱动该液晶显示器的灰度电压的方法。 液晶显示器包括多个栅极线，其传输栅极信号，多个数据线与多条栅极线交叉并传输数据电压，以及多个像素行。 每个像素行包括多个像素，并且每个像素包括连接到多条栅极线中的一条和多条数据线之一的开关元件。 提供给多个像素的数据电压的极性由包括两个或更多个像素行的像素组反转。 相对于第一预定电压施加到像素组的一行的数据电压的绝对值大于施加到相同灰度的像素组的另一行的数据电压的绝对值。

公开(公告)号：US07319452B2

公开(公告)日：2008-01-15

申请号：US10783252

申请日：2004-02-20

申请人： Seung-Hwan Moon

发明人： Seung-Hwan Moon

IPC分类号： G09G3/36

CPC分类号： G11C19/184 ,  G09G3/3677 ,  G11C19/28

摘要： A shift register includes a plurality of stages each of which has a first pull-up driving part to generate a first control signal in response to an output signal of an adjacent previous stage or a control signal, a pull-up part to generate a current output signal in response to a first clock signal and the first control signal, a second pull-up driving part to generate at least one second control signal in response to the first clock signal and a second clock signal, a third pull-up driving part connected to a low level terminal to operate in response to an output signal of an adjacent following stage, and a pull-down part to operate in response to the second clock signal.

摘要翻译： 移位寄存器包括多个级，每个级具有第一上拉驱动部分，以响应于相邻的前一级的输出信号或控制信号产生第一控制信号;产生电流的上拉部分 输出信号，响应于第一时钟信号和第一控制信号，第二上拉驱动部分，以响应于第一时钟信号和第二时钟信号而产生至少一个第二控制信号;第三上拉驱动部分 连接到低电平端子以响应于相邻的后级的输出信号而操作，以及下拉部分，以响应于第二时钟信号而工作。