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公开(公告)号:US11228124B1
公开(公告)日:2022-01-18
申请号:US17140534
申请日:2021-01-04
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: Mark K. Hoffmeyer , Steven P. Ostrander , Thomas Weiss , Thomas E. Lombardi
Abstract: In some embodiments, connecting a component to a substrate by adhesion to an oxidized solder surface includes: forming one or more conductive solder connections between the component and one or more conductive portions of the substrate; adhering the component to an oxidized surface of a solder portion applied to the substrate.
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公开(公告)号:US20210291287A1
公开(公告)日:2021-09-23
申请号:US16826226
申请日:2020-03-21
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: Charles L. Arvin , Luca Dei Carro , Thomas Brunschwiler , Thomas Weiss , Chris Muzzy
Abstract: Disclosed are embodiments of forming porous copper on the end of a copper pillar. The embodiments may be used to remove solder from selected locations on a chip or laminate substrate.
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公开(公告)号:US20210104464A1
公开(公告)日:2021-04-08
申请号:US16593489
申请日:2019-10-04
Applicant: International Business Machines Corporation
Inventor: Thomas Weiss , Charles L. Arvin , Glenn A. Pomerantz , Rachel E. Olson , Mark W. Kapfhammer , Bhupender Singh
IPC: H01L23/538 , H01L21/683 , H01L23/498 , H01L23/00
Abstract: An alignment carrier, assembly and methods that enable the precise alignment and assembly of two or more semiconductor die using an interconnect bridge. The alignment carrier includes a substrate composed of a material that has a coefficient of thermal expansion that substantially matches that of an interconnect bridge. The alignment carrier further includes a plurality of solder balls located on the substrate and configured for alignment of two or more semiconductor die.
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公开(公告)号:US20210057341A1
公开(公告)日:2021-02-25
申请号:US16546912
申请日:2019-08-21
Applicant: International Business Machines Corporation
Inventor: Charles L. Arvin , Karen P. McLaughlin , Brian W. Quinlan , Thomas Weiss
IPC: H01L23/538 , H01L23/00 , H01L23/498 , H01L25/00
Abstract: A module including a first semiconductor device, a second semiconductor device, a bridge support structure and a base substrate. The semiconductor devices each having first bonding pads having a first solder joined with the base substrate and the semiconductor devices each having second and third bonding pads joined to second and third bonding pads on the bridge support structure by a second solder and a third solder, respectively, on the second and third bonding pads; the semiconductor devices positioned adjacent to each other such that the bridge support structure joins to both of the semiconductor devices by the second and third solders wherein the third bonding pads are larger than the second bonding pads and the third bonding pads are at a larger pitch than the second bonding pads.
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公开(公告)号:US10756031B1
公开(公告)日:2020-08-25
申请号:US16409321
申请日:2019-05-10
Applicant: International Business Machines Corporation
Inventor: Charles L. Arvin , Franklin M. Baez , Brian W. Quinlan , Charles L. Reynolds , Krishna R. Tunga , Thomas Weiss
IPC: H01L23/34 , H01L23/64 , H01L49/02 , H01L23/04 , H01L23/522
Abstract: An IC device carrier includes organic substrate layers and wiring line layers therein. To reduce stain of the organic substrate layers and to provide decoupling capacitance, one or more decoupling capacitor stiffeners (DCS) are applied to the top side metallization (TSM) surface of the IC device carrier. The DCS(s) reduce the amount of curvature of the IC device carrier and reduce the strain seen by the organic substrate layers, thereby mitigating the risk for cracks forming and expanding or other damage within the carrier. The DCS(s) also include two or more capacitor plates and provides capacitance to electrically decouple electrical subsystems of the system of which the DCS is apart.
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公开(公告)号:US20200176383A1
公开(公告)日:2020-06-04
申请号:US16209013
申请日:2018-12-04
Applicant: International Business Machines Corporation
Inventor: Charles L. Arvin , Brian W. Quinlan , Steve Ostrander , Thomas Weiss , Mark W. Kapfhammer , Shidong Li
IPC: H01L23/538 , H01L25/065 , H01L23/00 , H01L23/31 , H01L23/373 , H01L25/00 , H01L21/48 , H01L21/56
Abstract: A multiple chip carrier assembly including a carrier having a first surface and a second surface is attached to a plurality of chips is described. The plurality of chips include a first chip and a second chip. Each of the chips has first surface with a first set of solder balls for connecting to a package and a second set of solder balls for connecting to a high signal density bridge element. A second surface of each chip is bonded to the first surface of the carrier. A package has a first surface which is connected to the first sets of solder balls of the first and second chips. A high signal density bridge element having high signal density wiring on one or more layers is connected to the second sets of solder balls of the first and second chips. The bridge element is disposed between the first surface of the package and the first surfaces of the first and second chips.
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公开(公告)号:US20190390348A1
公开(公告)日:2019-12-26
申请号:US16014579
申请日:2018-06-21
Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
Inventor: Charles L. Arvin , Brian Michael Erwin , Chris Muzzy , Thomas Weiss
Abstract: At least one plating pen is brought into aligned relationship with at least one hole defined in a board. The pen includes a central retractable protrusion, a first shell surrounding the protrusion and defining a first annular channel therewith, and a second shell surrounding the first shell and defining a second annular channel therewith. The protrusion is lowered to block the hole and plating material is flowed down the first channel to a surface of the board and up into the second channel, to form an initial deposit on the board surface. The protrusion is raised to unblock the hole, and plating material is flowed down the first annular channel to side walls of the hole and up into the second annular channel, to deposit the material on the side walls of the hole.
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公开(公告)号:US10515929B2
公开(公告)日:2019-12-24
申请号:US15948023
申请日:2018-04-09
Applicant: International Business Machines Corporation
Inventor: Charles L. Arvin , Brian M. Erwin , Mark W. Kapfhammer , Brian W. Quinlan , Charles L. Reynolds , Thomas Weiss
IPC: H01L23/52 , H01L21/56 , H01L25/065 , H01L23/522 , H01L23/13 , H01L25/00 , H01L23/538
Abstract: An integrated circuit (IC) chip carrier includes one or more memory devices therein. The memory is integrated into the carrier prior to the IC chip being connected to the carrier. Therefore, the IC chip may be connected to the memory at the same time as the IC chip is connected to the carrier. Because the memory is integrated into the IC chip carrier, prior to the IC chip being attached thereto, reliability concerns that result from attaching the memory to the IC chip carrier affect the IC chip carrier and do not affect the yield of the relatively more expensive IC chip.
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公开(公告)号:US20190312010A1
公开(公告)日:2019-10-10
申请号:US15948038
申请日:2018-04-09
Applicant: International Business Machines Corporation
Inventor: Charles L. Arvin , Brian M. Erwin , Mark W. Kapfhammer , Brian W. Quinlan , Charles L. Reynolds , Thomas Weiss
IPC: H01L25/065 , H01L25/00 , H01L23/13 , H01L23/538 , H01L23/00
Abstract: An integrated circuit (IC) chip carrier includes one or more memory devices therein. The memory is integrated into the carrier prior to the IC chip being connected to the carrier. Therefore, the IC chip may be connected to the memory at the same time as the IC chip is connected to the carrier. Because the memory is integrated into the IC chip carrier, prior to the IC chip being attached thereto, reliability concerns that result from attaching the memory to the IC chip carrier affect the IC chip carrier and do not affect the yield of the relatively more expensive IC chip.
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公开(公告)号:US20190312009A1
公开(公告)日:2019-10-10
申请号:US15948023
申请日:2018-04-09
Applicant: International Business Machines Corporation
Inventor: Charles L. Arvin , Brian M. Erwin , Mark W. Kapfhammer , Brian W. Quinlan , Charles L. Reynolds , Thomas Weiss
IPC: H01L25/065 , H01L23/13 , H01L23/538 , H01L25/00
Abstract: An integrated circuit (IC) chip carrier includes one or more memory devices therein. The memory is integrated into the carrier prior to the IC chip being connected to the carrier. Therefore, the IC chip may be connected to the memory at the same time as the IC chip is connected to the carrier. Because the memory is integrated into the IC chip carrier, prior to the IC chip being attached thereto, reliability concerns that result from attaching the memory to the IC chip carrier affect the IC chip carrier and do not affect the yield of the relatively more expensive IC chip.
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