摘要:
Included is a method for testing an assertion written for a logic program that can be simulated in a simulation program. Embodiments of the method include receiving the assertion independent from the logic program and independent from the simulation program, wherein the assertion includes at least one variable from the simulation program and determining the at least one variable in the assertion. Embodiments of the method also include testing the assertion independent from the logic program and the simulation program, wherein testing the assertion includes testing the assertion with at least one value for the at least one variable and determining at least one violation of the assertion.
摘要:
Systems and methods are disclosed for transferring assertions in a software programming language source file to an HDL source file. In one such method, a first source file contains source code in a software programming language and a second source file contains HDL source code translated from the source code in the first source file. The second source file excludes assertions translated from the source code in the first source file. This method comprises the steps of: reading a software assertion from from the first source file; locating a second block within the second source file, where the second block corresponds to a first block that contains the software assertion; mapping the software assertion to a hardware assertion expressed in the HDL; determining a location within the second block for insertion of the hardware assertion; and inserting the hardware assertion at the determined location within the second source file.
摘要:
Systems and methods for generating a Hardware Design Language (HDL) assertion from a waveform diagram are disclosed. One method comprises: identifying a timing relationship between first and second signals in the diagram; and generating an HDL assertion corresponding to the relationship. The relationship comprises a portion of the first signal, a portion of the second signal, and an interval between the portions. Another method comprises: identifying a combinatorial relationship between two input signals and an output signal in the diagram; and generating an HDL assertion corresponding to the relationship. One system comprises logic for performing the steps of: receiving a plurality of signal descriptions, each describing one of a plurality of signals; receiving a description of a timing or combinatorial relationship between at least two of the plurality of signals; generating a waveform diagram including a representation of the relationship; and generating an HDL assertion corresponding to the relationship.
摘要:
A system and/or methodology that unifies a telephonic communication component and/or system with a data (e.g., messaging) server component and/or system. The system can facilitate telephonically accessing rich information in the server (e.g., messaging server). This rich information can include email content, calendar content, contacts information, or the like. Moreover, with access to an application programming interface, the invention can add functionality to initiate email communications as well as to accept or cancel meetings. Furthermore, the invention can synchronize messages of disparate formats. By way of example a user can set an “Out of Office” (OOF) status on both an email systems and telephone voicemail system from one location in one action. In another aspect, it will be appreciated that any message or data component can be analyzed, transformed, matched and/or communicated from one system to another (e.g., server to telephone) in accordance with the subject invention.
摘要:
The present invention supports the design of a process using a drawing surface that specifies the process with underlying programmatic constructs. In response to a user's command, a construct corresponding to a shape is selected from a palette and inserted onto a design region that shows the specified process. The command is verified to be consistent with semantics of an associated process type. If so, a visual image of the specified process is updated. If not, an indicator is generated in a proximity of a relevant portion of the visual image in order to help the user resolve the inconsistency. The user is able to correct errors before generating computer-executable instructions from a high-level code emission. Computer-executable instructions are also generated from high-level code emission. A process engine is cognizant of the associated high-level lines of code and an infrastructure knowledge base while executing the computer-executable instructions.
摘要:
The present invention enables a user to build user-interfaces and applications based on a policy that contains metadata. The user can build an application through the user-interface, in which the user-interface and the generated computer-executable instructions are consistent with the policy. A user-interface has a toolbox that indicates the discovered components and a design surface that displays applicable stages. The policy determines the stages, where each stage provides a grouping of components having related tasks. The user selects components from the toolbox so that the selected components are associated with the selected stages on the design surface. After the user has completed building an application, a representation of the application may be compiled in order to generate a set of computer-executable instructions. Moreover, the compiler is coupled to the policy so that the set of computer-executable instructions is consistent with the policy.
摘要:
A visual design surface that identifies configuration errors to a user in an inconspicuous manner is disclosed. Shapes representing software artifacts are arranged on the design surface. Each shape may have one or more configuration parameter. The parameters associated with each shape are analyzed to locate configuration errors. When an error is identified, an error icon is placed next to the shape. The user may select the icon and be presented with one or more proposed solutions.