公开(公告)号：US4537471A

公开(公告)日：1985-08-27

申请号：US564954

申请日：1983-12-23

申请人： Jan Grinberg ,  Michael J. Little

发明人： Jan Grinberg ,  Michael J. Little

IPC分类号： G02F1/133 ,  G02F1/136 ,  G02F1/1362 ,  G02F1/1368 ,  G09F9/35 ,  G09G3/20 ,  G09G3/36 ,  G02F1/13

CPC分类号： G02F1/1368 ,  G09G3/3648 ,  G09G3/3655 ,  G02F1/136213 ,  G02F2201/122 ,  G09G2300/0842 ,  G09G2320/041 ,  G09G3/2011

摘要： The present invention provides a liquid crystal light valve pixel driver circuit comprising a pair of power electrodes, a pair of half-pixel electrodes, each half-pixel electrode being associated with a respective one of the power electrodes and a transistor switch for selectively conductively interconnecting the pair of half-pixel electrodes, the transistor switch being responsive to an applied data voltage potential. A strobe transistor and capacitor are further associated with the driver circuit to enable the demultiplexing of data from a data line and the transfer of a data representing voltage potential to the capacitor for application to the transistor switch.

摘要翻译： 本发明提供了一种液晶光阀像素驱动电路，包括一对电源电极，一对半像素电极，每个半像素电极与相应的一个功率电极相关联，晶体管开关用于选择性导电互连 一对半像素电极，晶体管开关响应于施加的数据电压电位。 选通晶体管和电容器还与驱动器电路相关联，以使得能够从数据线解复用数据并将表示电压电位的数据传送到电容器以供应到晶体管开关。

公开(公告)号：US4507726A

公开(公告)日：1985-03-26

申请号：US342630

申请日：1982-01-26

申请人： Jan Grinberg ,  Robert D. Etchells ,  Graham R. Nudd ,  Siegfried Hansen

发明人： Jan Grinberg ,  Robert D. Etchells ,  Graham R. Nudd ,  Siegfried Hansen

IPC分类号： G06F15/16 ,  G06F15/80 ,  G06T1/20

CPC分类号： G06F15/8023

摘要： The Array Processor of the present invention is comprised of a plurality of modular Elemental Processors, the modules being of a number of different functional types. These modules are associated so that the Elemental Processors are architecturally parallel to one another. The principal flow of data within the Array Processor, based on the simultaneous transfer of data words within the Elemental Processors, is thereby correspondingly parallel. The modules are also architecturally associated as functional planes that lie transverse to the Elemental Processors. Each functional plane is thereby comprised of an array of modules that are each otherwise associated with a separate Elemental Processor. Further, the modules of a given functional plane are of a single functional type. This allows the data of a two-dimensionally structured data set, present within the Array Processor, to be processed identically and in parallel by a common logical operation as provided and performed by a functional plane.The Array Processor is operatively connected to a Control Processor by an Array/Control Processor Interface. This interface allows the Control Processor to direct the operation of, and exchange data with, the Array Processor.

摘要翻译： 本发明的阵列处理器由多个模块化元件处理器组成，该模块具有许多不同的功能类型。 这些模块相关联，使得元素处理器在架构上彼此平行。 因此，基于元素处理器内的数据字的同时传送，阵列处理器内的主要数据流相应地并行。 模块也在架构上与作为横向于元素处理器的功能平面相关联。 因此，每个功能平面由各自以独立元件处理器相关联的模块阵列组成。 此外，给定功能平面的模块是单一功能类型。 这允许存在于阵列处理器内的二维结构化数据集的数据通过由功能平面提供和执行的公共逻辑操作相同地并行地进行处理。 阵列处理器通过阵列/控制处理器接口可操作地连接到控制处理器。 该接口允许控制处理器指导数组处理器的操作和与数据处理器交换数据。

公开(公告)号：US4498134A

公开(公告)日：1985-02-05

申请号：US342671

申请日：1982-01-26

申请人： Siegfried Hansen ,  Jan Grinberg ,  Robert D. Etchells

发明人： Siegfried Hansen ,  Jan Grinberg ,  Robert D. Etchells

IPC分类号： G06F15/80 ,  G06F15/16

CPC分类号： G06F15/8023

摘要： A Segregator Functional Plane capable of dynamically segregating any number, or subset, of a Modular Array Processor's functional planes, either in terms of control or data exchange, or both, from the remainder. This is provided by interspersing a number of Segregator Functional Planes throughout the Array Processor so that a Segregator Functional Plane is architecturally located between each of the adjacent subsets of the Array Processor's functional planes. The Segregator Functional Plane nominally includes an array of pseudomodules that corresponds to the module arrays of the other functional planes of the Array Processor so that a pseudo-module is architecturally present between correspondingly adjacent modules of each Elemental Processor. These pseudo-modules are comprised of switches that may be commonly activated to functionally sever their respective Elemental Processor data bus lines. The Segregator Functional Plane also includes a second set of commonly activatable switches for functionally severing each of the Address Bus, Control Bus, Clock, Address Valid, and Configuration Latch Reset lines. Further, a third set of commonly activatable switches are included within the Segregator Functional Plane for functionally severing the input and output data lines that interconnect the Control and Array Processors.

摘要翻译： 分离器功能平面，能够从其余部分动态地分离模块化阵列处理器的功能平面的任何数量或子集，无论是在控制或数据交换方面，还是两者。 这是通过在整个阵列处理器中散布多个隔离器功能平面来提供的，以便分离器功能平面在架构上位于阵列处理器功能平面的每个相邻子集之间。 分隔符功能平面名义上包括对应于阵列处理器的其他功能平面的模块阵列的伪模块阵列，使得伪模块在架构上存在于每个元件处理器的相应的相邻模块之间。 这些伪模块由可以通常被激活以切换其各自的元素处理器数据总线的开关组成。 分离器功能平面还包括第二组常用的可激活开关，用于功能性地切断每个地址总线，控制总线，时钟，地址有效和配置锁存复位线。 此外，分离器功能平面中还包括第三组常用的可激活开关，用于功能性地切断连接控制和阵列处理器的输入和输出数据线。

公开(公告)号：US4398974A

公开(公告)日：1983-08-16

申请号：US366900

申请日：1982-04-09

申请人： Kuen Chow ,  Jan Grinberg

发明人： Kuen Chow ,  Jan Grinberg

IPC分类号： C30B13/02 ,  H01L21/24 ,  H01L21/228

CPC分类号： C30B13/02 ,  H01L21/24

摘要： A process is provided for fabricating a semiconductor device by thermal gradient zone melting, whereby metal-rich droplets such as aluminum migrate through a semiconductor wafer such as silicon to create conductive paths. One surface of the wafer in provided with a buffer layer thereon, which is placed directly on a heating surface. The buffer layer terminates the migration of the droplets to prevent alloying of the droplets with the heating surface.

摘要翻译： 提供了一种用于通过热梯度区熔化制造半导体器件的方法，由此富含金属的液滴（例如铝）迁移穿过诸如硅的半导体晶片以产生导电路径。 晶片的一个表面在其上设置有缓冲层，其直接放置在加热表面上。 缓冲层终止液滴的迁移，以防止液滴与加热表面的合金化。

公开(公告)号：US4239348A

公开(公告)日：1980-12-16

申请号：US99381

申请日：1979-11-30

申请人： Jan Grinberg ,  Michael Waldner ,  Paul Q. Braatz ,  Alexander D. Jacobson

发明人： Jan Grinberg ,  Michael Waldner ,  Paul Q. Braatz ,  Alexander D. Jacobson

IPC分类号： G02F1/135 ,  G02F1/1362

CPC分类号： G02F1/1354 ,  G02F1/136277

摘要： There is disclosed a single crystal silicon charge storage apparatus suitable for use in an alternating current driven liquid crystal light valve having therein a moderately doped microchannel stop grid. The charge storage medium is made of a high resistivity substrate on which an MOS capacitor is formed having fast photoelectric transient response and capable of operating over a wide frequency range. A doped microgrid structure is formed in one side of the substrate to prevent charge carrier spreading at the silicon-silicon dioxide interface and to provide a focusing electric field for the charge carriers. The signal from the substrate is electrically coupled through high-reflectivity mirrors and light blocking layers to the liquid crystal.

摘要翻译： 公开了一种适用于具有适度掺杂的微通道停止栅格的交流驱动液晶光阀的单晶硅电荷存储装置。 电荷存储介质由高电阻率基板制成，其上形成具有快速光电瞬态响应并能够在宽频率范围内工作的MOS电容器。 在衬底的一侧形成掺杂的微电网结构，以防止电荷载体在硅 - 二氧化硅界面处扩散，并为电荷载体提供聚焦电场。 来自基板的信号通过高反射镜和阻光层电耦合到液晶。

公开(公告)号：US4239312A

公开(公告)日：1980-12-16

申请号：US964550

申请日：1978-11-29

申请人： Jon H. Myer ,  Jan Grinberg

发明人： Jon H. Myer ,  Jan Grinberg

IPC分类号： H01L23/48 ,  H01L25/065 ,  H05K1/08

CPC分类号： H01L25/0657 ,  H01L23/481 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2924/0002 ,  H01L2924/3011

摘要： A large scale parallel architecture in which many parallel channels numbering 10.sup.2 or more operate simultaneously to create a natural and efficient organization for processing two-dimensional arrays of data. The architecture comprises a plurality of stacked integrated circuit wafers having top and bottom surfaces, electric signal paths extending through each of the wafers between the surfaces, and micro-interconnects (smaller than 50 mil) on the surfaces of adjacent wafers interconnecting the respective electric signal paths with a topographical one-to-one correspondence.

摘要翻译： 大型并行架构，其中编号为102或更多的并行通道同时运行，以创建用于处理二维数据阵列的自然而有效的组织。 该架构包括具有顶表面和底表面的多个堆叠集成电路晶片，延伸穿过表面之间的每个晶片的电信号路径，以及将相应电信号互连的相邻晶片的表面上的微互连（小于50密耳） 具有地形一一对应的路径。

公开(公告)号：US3976905A

公开(公告)日：1976-08-24

申请号：US480683

申请日：1974-06-17

申请人： Ady Seidman ,  Zohar Avrahami ,  Benjamin Sheinfux ,  Jan Grinberg

发明人： Ady Seidman ,  Zohar Avrahami ,  Benjamin Sheinfux ,  Jan Grinberg

IPC分类号： H01J43/24 ,  H01J43/06 ,  H01J43/10

CPC分类号： H01J43/243

摘要： A channel electron multiplier is described having a tubular wall coated w a secondary-electron emitting material and including an electric field for accelerating the electrons, the electric field comprising a plurality of low-resistive conductive rings each alternating with a high-resistive insulating ring. The thickness of the low-resistive rings is many times larger than that of the high-resistive rings, being in the order of tens of microns for the low-resistive rings and at least one order of magnitude lower for the high-resistive rings; and the diameter of the channel tubular walls is also many times larger than the thickness of the high-resistive rings. Both single-channel and multiple-channel electron multipliers are described. A very important advantage, particularly in making multiple-channel multipliers, is the simplicity of the procedure that may be used in constructing such multipliers. Other operational advantages are described.

摘要翻译： 描述了一种通道电子倍增器，其具有涂覆有二次电子发射材料并包括用于加速电子的电场的管状壁，该电场包括多个与高电阻绝缘环交替的低电阻导电环。 低阻环的厚度比高阻环的厚度大很多倍，低阻环的数量级为几十微米，而高阻环的厚度至少要低一个数量级。 并且通道管状壁的直径也比高阻环的厚度大许多倍。 描述单通道和多通道电子倍增器。 一个非常重要的优点，特别是在制作多通道乘法器时，可以用于构建这样的乘法器的过程的简单性。 描述其他操作优点。

公开(公告)号：US06741762B2

公开(公告)日：2004-05-25

申请号：US10010401

申请日：2001-12-05

申请人： Jan Grinberg ,  Min-Cheol Oh ,  Harold R. Fetterman ,  Joseph Michael

发明人： Jan Grinberg ,  Min-Cheol Oh ,  Harold R. Fetterman ,  Joseph Michael

IPC分类号： G02F1035

CPC分类号： G02F1/065 ,  G02F1/0123 ,  G02F1/2255 ,  G02F2201/126

摘要： An electro-optical modulator and a method for biasing a Mach-Zehnder modulator. The inventive modulator includes a layer of material at least partially transparent to electromagnetic energy. A first conductive layer is disposed on a first surface of the layer of at least partially transparent material. A second conductive layer is disposed on a second surface of the layer of at least partially transparent material. A layer of insulating material is disposed on the second conductive layer and a third conductive layer is disposed on the layer of insulating material. In the illustrative application, the modulator is a Mach-Zehnder modulator. A biasing potential is applied to the second conductive layer of the modulator and a modulating voltage is applied across the first and the third conductive layers.

摘要翻译： 一种电光调制器和用于偏置马赫 - 曾德调制器的方法。 本发明的调制器包括对电磁能至少部分透明的材料层。 第一导电层设置在至少部分透明材料层的第一表面上。 第二导电层设置在至少部分透明材料层的第二表面上。 绝缘材料层设置在第二导电层上，第三导电层设置在绝缘材料层上。 在说明性应用中，调制器是马赫 - 曾德尔调制器。 偏置电位被施加到调制器的第二导电层，并且跨越第一和第三导电层施加调制电压。

公开(公告)号：US06404397B1

公开(公告)日：2002-06-11

申请号：US09529466

申请日：2000-08-12

申请人： Jan Grinberg ,  Robin Harvey ,  Franklin A. Dolezal

发明人： Jan Grinberg ,  Robin Harvey ,  Franklin A. Dolezal

IPC分类号： H01Q1906

CPC分类号： G01V8/005 ,  H01Q19/06

摘要： The system (10) includes a first mechanism (12) for receiving electromagnetic energy of a first wavelength from the scene (28) and providing electromagnetic energy of a second wavelength shorter than the first wavelength. A second mechanism (14) measures variations of the electromagnetic energy of the second wavelength over a predetermined area. The system is a millimeter wave imaging system (10). The first mechanism (12) includes a lens (12) having an index of refraction substantially greater than 1. The lens (12) is opaque to infrared electromagnetic energy and made of alumina, plastic, or other material having a relatively high index of refraction. The second mechanism (24) includes and array of bolometers (24) positioned parallel to an output aperture (24) of the lens and within a distance of the output aperture (24) that is much smaller than the second wavelength. A video controller (16), a computer (18), process video signals output from the array of bolometers (14) to yield an image, which is displayed on a display (20).

摘要翻译： 系统（10）包括用于从场景（28）接收第一波长的电磁能并提供比第一波长短的第二波长的电磁能的第一机构（12）。 第二机构（14）测量在预定区域上的第二波长的电磁能量的变化。 该系统是毫米波成像系统（10）。 第一机构（12）包括具有基本上大于1的折射率的透镜（12）。透镜（12）对于红外电磁能是不透明的，并且由氧化铝，塑料或具有相对较高折射率的其它材料制成 。 第二机构（24）包括位于平行于透镜的输出孔（24）并且在比第二波长小得多的输出孔（24）的距离范围内的辐射热计（24）阵列。 视频控制器（16），计算机（18），从发射计（14）阵列输出的过程视频信号，以产生显示在显示器（20）上的图像。

公开(公告)号：US06329649B1

公开(公告)日：2001-12-11

申请号：US09414988

申请日：1999-10-07

申请人： Michael D. Jack ,  Jan Grinberg ,  Franklin A. Dolezal ,  Ray Balcerak

发明人： Michael D. Jack ,  Jan Grinberg ,  Franklin A. Dolezal ,  Ray Balcerak

IPC分类号： G01R2302

CPC分类号： H01Q3/2658 ,  F41G7/008 ,  F41G7/2286 ,  F41G7/2293 ,  G01J5/20 ,  G01J5/34 ,  G01R29/0878 ,  H01Q9/285 ,  H01Q21/0087 ,  H01Q21/24

摘要： An integrated infrared and millimeter-wave monolithic focal plane sensor array having a substrate upon which an integrated array of infrared sensors and mm-wave sensors are provided at a first planar level on the same side of the substrate, and a planar antenna for receiving incident millimeter-wave radiation located at a second planar level located between the integrated array of sensors and the surface of the substrates for coupling the mm-wave radiation field to the mm-wave sensor. The antenna receiver of electromagnetic radiation, in one embodiment, is an antenna having a crossed bowtie configuration which efficiently couples the radiation field to the mm-wave sensor. The invention also is directed to a method of fabricating such a radiation sensor.

摘要翻译： 一种具有基板的集成的红外和毫米波单片焦平面传感器阵列，在该基板上在基板的同一侧上的第一平面级设置有红外传感器和mm波传感器的集成阵列，以及用于接收事件的平面天线 毫米波辐射位于位于集成传感器阵列和基板表面之间的第二平面水平处，用于将毫米波辐射场耦合到毫米波传感器。 在一个实施例中，电磁辐射的天线接收器是具有交叉的弓形配置的天线，其有效地将辐射场耦合到毫米波传感器。 本发明还涉及一种制造这种辐射传感器的方法。