Abstract:
Disclosed is a reflection type liquid crystal display device. A second substrate (220) is provided opposite to a first substrate (210) where pixels are formed. A liquid crystal layer (230) is interposed between the first and second substrates. A reflection electrode (235) is formed on the first substrate (210). The reflection electrode (235) includes first and second regions (290, 295) having relatively high and low heights so as to scatter a light, respectively. The first regions (290) have first widths in a first direction wider than second widths in a second direction so that a reflectivity in the first direction is higher than a reflectivity in the second direction. The widths of the grooves (290a, b) are varied in a desired direction regardless of shapes of the lenses (295), to thereby improve the viewing angle and reflectivity of the display in the specific direction.
Abstract:
A display panel includes an array substrate and an opposite substrate. The array substrate includes a plurality of data lines, a plurality of gate lines, a plurality of first signal lines, a plurality of second signal lines and a plurality of pixels. Each of the pixels includes a pixel electrode and a common electrode insulated from the pixel electrode. The opposite substrate includes a plurality of connecting members. At least one of the connecting members is electrically connected to at least one of the first signal lines and the second signal lines by an externally provided pressure. Thus, when an externally provided pressure is applied to the display panel in order to perform a touch screen function, an alignment of the liquid crystal molecules disposed on the array substrate may not be substantially changed, and a display quality may be improved.
Abstract:
A display substrate includes a first pixel part including a first switching element, a second pixel part including a second switching element, a third pixel part including a third switching element, a first pixel electrode, a second pixel electrode and a third pixel electrode. The third pixel part is adjacent to the first pixel part. The first pixel electrode is electrically connected to the first switching element, and is formed on the first and second pixel part. The second pixel electrode is electrically connected to the second switching element, and is formed on a portion of the second pixel part. The third pixel electrode is electrically connected to the third switching element, and is formed on the first and third pixel parts. Therefore, an opening ratio is increased, thereby improving an image display quality.
Abstract:
A driver chip for controlling a high-resolution display panel is presented. The driver chip is not much larger than a conventional driver chip that is currently used for lower resolution display panels. The driver chip applies data signals to the data lines of the display panel and gate control signals to a gate driver that is formed in the peripheral region of the display panel. The gate driver, which may be made of amorphous silicon TFTs, generates gate signals in response to the gate control signals from the driver chip and applies the gate signals to gate lines. Since the driver chip of the invention controls more gate lines and data lines than a conventional chip of about the same size, the driver chip may be easily adapted for display devices having multiple panels. Where multiple panels are used, the panels may be scanned simultaneously or sequentially.
Abstract:
A display device includes a display panel having a display region and a peripheral region. Signal lines disposed in the peripheral region provide an image display signal to the display region. A test pad portion is disposed in the peripheral region and connected to at least some of the signal lines. The test pad portion includes a test pad, an extension line extending from the test pad, and a bridge wire connecting the extension line to an associated signal line. The bridge wire is formed of a corrosion resistant material. The signal line is protected from corrosion by connecting the signal line to the test pad portion via the bridge wire, which prevents corrosion of the test pad from spreading to the signal line. The bridge wire can be protected from corrosion by disposing it under a sealing member of the panel.
Abstract:
Embodiments of systems (e.g., the terminal apparatus) and methods according to the application can perform a handoff from a WiBro (wireless broadband) service to a wireless LAN service or from a WIMAX (worldwide interoperability for microwave access) service to a wireless LAN service. One embodiment can perform a communication according to a WIMAX or WiBro standard and, upon entering into an area where a communication conforming to a wireless LAN standard is available, perform a communication according to the wireless LAN standard.
Abstract:
A display substrate includes gate lines, driving circuit part, signal lines, connection lines and a contact part. Gate lines are formed on a display area and intersect data lines. Driving circuit part is formed on a peripheral area surrounding the display area and provides a gate signal to the gate lines. Signal lines are formed adjacent to the driving circuit part and provide a driving signal to the driving circuit part. Connection lines include a first end portion overlapped the signal lines and a second end portion electrically connected with the driving circuit part. A contact part is formed on the signal lines and connects the first end portion with the signal lines.
Abstract:
A thin film transistor (TFT) array panel effectively minimizing light leakage current and a liquid crystal display including the same. The panel includes a transistor structure having a gate electrode formed on an insulating substrate; a semiconductor layer formed on and insulated from the gate electrode; a light blocking layer formed around and overlapping a portion of the gate electrode; a data line intersecting the gate line to form a source electrode, which overlaps a portion of the semiconductor layer; a drain electrode opposing to the source electrode and overlapping a portion of the semiconductor layer, and a pixel electrode formed on and insulated from the transistor structure and electrically connected to the drain electrode.
Abstract:
A plurality of gate lines and a plurality of data lines intersecting the gate lines to define a display area are formed on an insulating substrate including a display area and a surrounding area. On the surrounding area, a gate driving circuit connected to the gate lines and a logic circuit for VI interposed between the gate driving circuit and the gate line and having several first to third NOR gates are formed. A first input terminal of the first NOR gate of the logic circuit for VI is connected to an output terminal of the gate driving circuit, and a second input terminal thereof is connected to a CON1 terminal, and an output terminal thereof is connected to a first input terminal of the second or the third NOR gate. A second input terminal of the second NOR gate is connected to a CON2 terminal and an output terminal thereof is connected to the gate lines in odd number. A second input terminal of the NOR gate is connected to a CON3 terminal and an output terminal thereof is connected to the gate lines in even number.
Abstract:
There is provided a shift register in which multiple stages are connected one after another to each other, the multiple stages having a first stage in which a start signal is coupled to an input terminal, the shift register sequentially outputting output signals of respective stages. The multiple stages have odd stages for receiving a first clock signal, and even stages for receiving a second clock signal having a phase opposite to the first clock signal. Each of the multiple stages has a pull-up section for providing a corresponding one of the first and second clock signals to an output terminal. A pull-up driving section is connected to an input node of the pull-up section, for turning on the pull-up section in response to a front edge of an input signal and for turning off the pull-up section in response to an output signal of a next stage. A pull-down section provides a first power voltage to the output terminal. A pull-down driving section is connected to an input node of the pull-down section, for turning off the pull-down section in response to a front edge of the input signal and turning on the pull-down section in response to the front edge of the output signal of the next stage.