公开(公告)号：US20170077930A1

公开(公告)日：2017-03-16

申请号：US15362232

申请日：2016-11-28

Applicant: Micron Technology, Inc.

Inventor： Harold B. Noyes ,  David R. Brown ,  Paul Glendenning ,  Irene J. Xu

IPC: H03K19/177 ,  G06F9/44 ,  H03K19/21

CPC classification number: H03K19/17708 ,  G05B19/045 ,  G06F7/00 ,  G06F9/4498 ,  G06F17/5054 ,  H03K19/0175 ,  H03K19/17704 ,  H03K19/20 ,  H03K19/21 ,  Y02T10/82

Abstract: Disclosed are methods and devices, among which is a device that includes a finite state machine lattice. The lattice may includes a programmable Boolean logic cell that may be programmed to perform various logic functions on a data stream. The programmability includes an inversion of a first input to the Boolean logic cell, an inversion of a last output of the Boolean logic cell, and a selection of an AND gate or an OR gate as a final output of the Boolean logic cell. The Boolean logic cell also includes end of data circuitry configured to cause the Boolean logic cell to only output after an end of data signifying the end of a data stream is received at the Boolean logic cell.

Abstract translation: 公开了方法和装置，其中包括有限状态机格的装置。 晶格可以包括可编程布尔逻辑单元，其可以被编程为在数据流上执行各种逻辑功能。 可编程性包括对布尔逻辑单元的第一输入的反转，布尔逻辑单元的最后输出的反转，以及选择与门或或门作为布尔逻辑单元的最终输出。 布尔逻辑单元还包括数据电路的结尾，该数据电路被配置为仅在布尔逻辑单元接收到表示数据流结束的数据结束后才输出布尔逻辑单元。

公开(公告)号：US09471290B2

公开(公告)日：2016-10-18

申请号：US14478712

申请日：2014-09-05

Applicant: Micron Technology, Inc.

Inventor： Junjuan Xu ,  Paul Glendenning

IPC: G06F9/45 ,  G06F9/44

CPC classification number: G06F8/447 ,  G06F8/443 ,  G06F8/445 ,  G06F9/4498

Abstract: Apparatus, systems, and methods for a compiler are described. One such compiler generates machine code corresponding to a set of elements including a general purpose element and a special purpose element. The compiler identifies a portion in an arrangement of relationally connected operators that corresponds to a special purpose element. The compiler also determines whether the portion meets a condition to be mapped to the special purpose element. The compiler also converts the arrangement into an automaton comprising a plurality of states, wherein the portion is converted using a special purpose state that corresponds to the special purpose element if the portion meets the condition. The compiler also converts the automaton into machine code. Additional apparatus, systems, and methods are disclosed.

Abstract translation: 描述了编译器的装置，系统和方法。 一个这样的编译器生成对应于一组元素的机器代码，包括通用元件和专用元件。 编译器识别与特殊用途元素相对应的关系连接运算符的布置中的一部分。 编译器还确定该部分是否满足要映射到特殊目的元素的条件。 编译器还将该装置转换为包括多个状态的自动机，其中，如果部分满足条件，则使用与特殊目的元件对应的专用状态来转换该部分。 编译器还将自动机转换为机器代码。 公开了附加装置，系统和方法。

公开(公告)号：US20160170728A1

公开(公告)日：2016-06-16

申请号：US15049943

申请日：2016-02-22

Applicant: Micron Technology, Inc.

Inventor： Junjuan Xu ,  Paul Glendenning

IPC: G06F9/45 ,  G06F9/44

CPC classification number: G06F8/447 ,  G06F8/443 ,  G06F8/445 ,  G06F9/4498

Abstract: Apparatus, systems, and methods for a compiler are described. One such compiler generates machine code corresponding to a set of elements including a general purpose element and a special purpose element. The compiler identifies a portion in an arrangement of relationally connected operators that corresponds to a special purpose element. The compiler also determines whether the portion meets a condition to be mapped to the special purpose element. The compiler also converts the arrangement into an automaton comprising a plurality of states, wherein the portion is converted using a special purpose state that corresponds to the special purpose element if the portion meets the condition. The compiler also converts the automaton into machine code. Additional apparatus, systems, and methods are disclosed.

Abstract translation: 描述了编译器的装置，系统和方法。 一个这样的编译器生成对应于一组元素的机器代码，包括通用元件和专用元件。 编译器识别与特殊用途元素相对应的关系连接运算符的布置中的一部分。 编译器还确定该部分是否满足要映射到特殊目的元素的条件。 编译器还将该装置转换为包括多个状态的自动机，其中，如果部分满足条件，则使用与特殊目的元件对应的专用状态来转换该部分。 编译器还将自动机转换为机器代码。 公开了附加装置，系统和方法。

公开(公告)号：US09275290B2

公开(公告)日：2016-03-01

申请号：US14223507

申请日：2014-03-24

Applicant: Micron Technology, Inc.

Inventor： David R. Brown ,  Harold B Noyes ,  Irene Junjuan Xu ,  Paul Glendenning

IPC: G06F7/38 ,  G06K9/00 ,  G06F17/30 ,  H04L12/883 ,  G06F9/44

CPC classification number: G06F13/1673 ,  G06F9/4498 ,  G06F13/124 ,  G06F13/4022 ,  G06F13/4282 ,  G06F17/30516 ,  G06K9/00496 ,  G06K9/00973 ,  G06K9/00979 ,  H04L49/9021

Abstract: A device includes a routing buffer. The routing buffer includes a first port configured to receive a signal relating to an analysis of at least a portion of a data stream. The routing buffer also includes a second port configured to selectively provide the signal to a first routing line of a block of a state machine at a first time. The routing buffer further includes a third port configured to selectively provide the signal to a second routing line of the block of the state machine at the first time.

Abstract translation: 设备包括路由缓冲区。 路由缓冲器包括被配置为接收与数据流的至少一部分的分析有关的信号的第一端口。 路由缓冲器还包括被配置为在第一时间将信号选择性地提供给状态机的块的第一路由线的第二端口。 路由缓冲器还包括被配置为在第一时间将信号选择性地提供给状态机的块的第二路由选择线的第三端口。

公开(公告)号：US20150365091A1

公开(公告)日：2015-12-17

申请号：US14832543

申请日：2015-08-21

Applicant: Micron Technology, Inc.

Inventor： Harold B. Noyes ,  David R. Brown ,  Paul Glendenning ,  Irene Junjuan Xu

IPC: H03K19/177 ,  G05B19/045

CPC classification number: H03K19/17708 ,  G05B19/045 ,  G06F7/00 ,  G06F9/4498 ,  G06F17/5054 ,  H03K19/0175 ,  H03K19/17704 ,  H03K19/20 ,  H03K19/21 ,  Y02T10/82

Abstract: Disclosed are methods and devices, among which is a device that includes a finite state machine lattice. The lattice may includes a programmable Boolean logic cell that may be programmed to perform various logic functions on a data stream. The programmability includes an inversion of a first input to the Boolean logic cell, an inversion of a last output of the Boolean logic cell, and a selection of an AND gate or an OR gate as a final output of the Boolean logic cell. The Boolean logic cell also includes end of data circuitry configured to cause the Boolean logic cell to only output after an end of data signifying the end of a data stream is received at the Boolean logic cell.

Abstract translation: 公开了方法和装置，其中包括有限状态机格的装置。 晶格可以包括可编程布尔逻辑单元，其可以被编程为在数据流上执行各种逻辑功能。 可编程性包括对布尔逻辑单元的第一输入的反转，布尔逻辑单元的最后输出的反转，以及选择与门或或门作为布尔逻辑单元的最终输出。 布尔逻辑单元还包括数据电路的结尾，该数据电路被配置为仅在布尔逻辑单元接收到表示数据流结束的数据结束后才输出布尔逻辑单元。

公开(公告)号：US09146714B2

公开(公告)日：2015-09-29

申请号：US14252542

申请日：2014-04-14

Applicant: Micron Technology, Inc.

Inventor： Paul Glendenning ,  Junjuan Xu

IPC: G06F9/45 ,  G06F9/44 ,  G06F17/50

CPC classification number: G06F8/41 ,  G06F8/427 ,  G06F8/443 ,  G06F8/447 ,  G06F9/4498 ,  G06F17/5045 ,  G06F17/5054

Abstract: Apparatus, systems, and methods for a compiler are described. One such compiler converts source code into an automaton comprising states and transitions between the states, wherein the states in the automaton include a special purpose state that corresponds to a special purpose hardware element. The compiler converts the automaton into a netlist, and places and routes the netlist to provide machine code for configuring a target device.

Abstract translation: 描述了编译器的装置，系统和方法。 一个这样的编译器将源代码转换成包括状态之间的状态和转换的自动机，其中自动机中的状态包括对应于专用硬件元件的专用状态。 编译器将自动机转换为网表，并放置和路由网表以提供用于配置目标设备的机器代码。

公开(公告)号：US20150046889A1

公开(公告)日：2015-02-12

申请号：US14335537

申请日：2014-07-18

Applicant: Micron Technology, Inc.

Inventor： Junjuan Xu ,  Paul Glendenning

IPC: G06F17/50 ,  G06F9/44 ,  G06F9/45

CPC classification number: G06F17/505 ,  G06F8/447 ,  G06F9/4498 ,  G06F17/5054

Abstract: Embodiments of a system and method for generating an image configured to program a parallel machine from source code are disclosed. One such parallel machine includes a plurality of state machine elements (SMEs) grouped into pairs, such that SMEs in a pair have a common output. One such method includes converting source code into an automaton comprising a plurality of interconnected states, and converting the automaton into a netlist comprising instances corresponding to states in the automaton, wherein converting includes pairing states corresponding to pairs of SMEs based on the fact that SMEs in a pair have a common output. The netlist can be converted into the image and published.

Abstract translation: 公开了一种用于生成被配置为从源代码编程并行机器的图像的系统和方法的实施例。 一个这样的并行机器包括分组成对的多个状态机元件（SME），使得一对中的SME具有公共输出。 一种这样的方法包括将源代码转换成包括多个互连状态的自动机，并将自动机转换成包括对应于自动机中的状态的实例的网表，其中转换包括对应于中小企业对的配对状态，基于以下事实： 一对有一个共同的输出。 网表可以转换为图像并发布。

公开(公告)号：US20140380288A1

公开(公告)日：2014-12-25

申请号：US14478712

申请日：2014-09-05

Applicant: Micron Technology, Inc.

Inventor： Junjuan Xu ,  Paul Glendenning

IPC: G06F9/45 ,  G06F9/44

CPC classification number: G06F8/447 ,  G06F8/443 ,  G06F8/445 ,  G06F9/4498

Abstract: Apparatus, systems, and methods for a compiler are described. One such compiler generates machine code corresponding to a set of elements including a general purpose element and a special purpose element. The compiler identifies a portion in an arrangement of relationally connected operators that corresponds to a special purpose element. The compiler also determines whether the portion meets a condition to be mapped to the special purpose element. The compiler also converts the arrangement into an automaton comprising a plurality of states, wherein the portion is converted using a special purpose state that corresponds to the special purpose element if the portion meets the condition. The compiler also converts the automaton into machine code. Additional apparatus, systems, and methods are disclosed.

Abstract translation: 描述了编译器的装置，系统和方法。 一个这样的编译器生成对应于一组元素的机器代码，包括通用元件和专用元件。 编译器识别与特殊用途元素相对应的关系连接运算符的布置中的一部分。 编译器还确定该部分是否满足要映射到特殊目的元素的条件。 编译器还将该装置转换为包括多个状态的自动机，其中，如果部分满足条件，则使用与特殊目的元件对应的专用状态来转换该部分。 编译器还将自动机转换为机器代码。 公开了附加装置，系统和方法。

公开(公告)号：US20140229926A1

公开(公告)日：2014-08-14

申请号：US14252600

申请日：2014-04-14

Applicant: Micron Technology, Inc.

Inventor： Junjuan Xu ,  Paul Glendenning

IPC: G06F9/45

CPC classification number: G06F8/45 ,  G06F8/447 ,  G06F9/4498 ,  G06F17/5054

Abstract: Apparatus, systems, and methods for a compiler are disclosed. One such compiler parses a human readable expression into a syntax tree and converts the syntax tree into an automaton having in-transitions and out-transitions. Converting can include unrolling the quantification as a function of in-degree limitations wherein in-degree limitations includes a limit on the number of transitions into a state of the automaton. The compiler can also convert the automaton into an image for programming a parallel machine, and publishes the image. Additional apparatus, systems, and methods are disclosed.

Abstract translation: 公开了用于编译器的装置，系统和方法。 一个这样的编译器将可读的表达式解析成语法树，并将语法树转换成具有转换和转出的自动机。 转换可以包括作为度数限制的函数展开量化，其中度数限制包括对自动机状态的转换次数的限制。 编译器还可以将自动机转换成用于编程并行机的映像，并发布映像。 公开了附加装置，系统和方法。

公开(公告)号：US12174888B2

公开(公告)日：2024-12-24

申请号：US17228212

申请日：2021-04-12

Applicant: Micron Technology, Inc.

Inventor： Paul Glendenning ,  Michael C. Leventhal ,  Paul Dlugosch ,  Harold B Noyes

IPC: G06F3/0481 ,  G06F8/34 ,  G06F8/41 ,  G06F16/901 ,  G06F16/904 ,  G06N3/004 ,  G06F30/20

Abstract: The Automata Processor Workbench (AP Workbench) is an application for creating and editing designs of AP networks (e.g., one or more portions of the state machine engine, one or more portions of the FSM lattice, or the like) based on, for example, an Automata Network Markup Language (ANML). For instance, the application may include a tangible, non-transitory computer-readable medium configured to store instructions executable by a processor of an electronic device, wherein the instructions include instructions to represent an automata network as a graph.