公开(公告)号：US20070206892A1

公开(公告)日：2007-09-06

申请号：US11660520

申请日：2005-07-19

申请人： Kenichi Iso ,  Yujiro Toda ,  Yoichi Imamura

发明人： Kenichi Iso ,  Yujiro Toda ,  Yoichi Imamura

IPC分类号： F16C19/00

CPC分类号： C10M171/02 ,  C10N2220/022 ,  C10N2230/06 ,  C10N2230/08 ,  C10N2240/02 ,  C10N2250/10 ,  F16C19/06 ,  F16C33/6633 ,  F16C2300/02

摘要： A grease composition having an apparent viscosity at −30° C. of 5 to 200 Pa·s is sealed in a rolling bearing which retains a plurality of rolling elements between an inner ring and an outer ring in such a way that the rolling elements can freely roll. Thereby, there is provided a rolling bearing which has a satisfactory lubricating performance and generates less abnormal noise even under a low temperature of around −40° C.

摘要翻译： 在-30℃下的表观粘度为5〜200Pa·s的润滑脂组合物被密封在滚动轴承中，滚动轴承将多个滚动元件保持在内圈和外圈之间，使得滚动元件可以 自由滚动 因此，提供了一种具有令人满意的润滑性能的滚动轴承，甚至在-40℃左右的低温下也产生较少的异常噪声。

公开(公告)号：US20060270305A1

公开(公告)日：2006-11-30

申请号：US11498187

申请日：2006-08-03

申请人： Yoichi Imamura

发明人： Yoichi Imamura

IPC分类号： H01J9/26 ,  H01J9/32

CPC分类号： H01L27/3246 ,  H01L27/3244 ,  H01L51/5256 ,  H05B33/04 ,  Y10S428/917

摘要： A sealing structure having a barrier membrane, with which the overall thickness of a display device can be reduced while ensuring sufficient barrier properties against water and oxygen so as to prevent deterioration of luminous layers. The sealing structure comprises a multi-layered resin membrane 14b for sealing an electronic element section 3 disposed on a substrate 2, which is formed by alternately depositing flattening resin layers 14c and barriers layers 14d on the substrate 2. The flattening resin layers 14c are formed inside a blocking region 14a surrounding the electronic element section 3. A display device having the sealing structure, an electronic apparatus having the display device, and a fabrication method for the display device are also disclosed.

摘要翻译： 一种具有阻隔膜的密封结构，可以在确保显示装置的整体厚度的同时确保足够的水和氧的阻隔性，从而防止发光层的劣化。 密封结构包括用于密封设置在基板2上的电子元件部分3的多层树脂膜14b，其通过在基板2上交替地沉积平坦化的树脂层14c和阻挡层14d而形成。 平坦化树脂层14c形成在围绕电子元件部3的阻挡区域14a的内部。 还公开了一种具有密封结构的显示装置，具有该显示装置的电子设备以及该显示装置的制造方法。

公开(公告)号：US20060158095A1

公开(公告)日：2006-07-20

申请号：US11300323

申请日：2005-12-15

申请人： Yoichi Imamura

发明人： Yoichi Imamura

IPC分类号： H05B33/08 ,  H05B33/06

CPC分类号： H01L27/3279 ,  H01L27/3211 ,  H01L27/3244 ,  H01L51/0024 ,  H01L51/5212 ,  H01L51/5228 ,  H01L51/525 ,  H01L51/5268 ,  H01L51/5271 ,  H01L51/5275 ,  H01L51/5284 ,  H01L51/529 ,  H01L51/56 ,  H01L2251/5315

摘要： An electrooptic device includes a first substrate and a second substrate. The first substrate includes an electrooptic element in which an electrooptic substance is interposed between a first electrode and a second electrode, the electrooptic element being disposed on a surface of the first substrate that opposes the second substrate; an electronic element for driving the electrooptic element; and a power supply wire for supplying power to at least one of the electrooptic element and the electronic element. The second substrate includes a second auxiliary wire for supplying auxiliary power to at least one of the electrooptic element and the electronic element, the second auxiliary wire being disposed on a surface of the second substrate that opposes the first substrate, the second auxiliary wire having a planar shape that corresponds with a non-opening region of the electrooptic element.

摘要翻译： 电光装置包括第一基板和第二基板。 第一基板包括电光元件，其中电光物质插入在第一电极和第二电极之间，电光元件设置在与第二基板相对的第一基板的表面上; 用于驱动电光元件的电子元件; 以及用于向至少一个电光元件和电子元件供电的电源线。 所述第二基板包括用于向所述电光元件和所述电子元件中的至少一个提供辅助电力的第二辅助线，所述第二辅助线设置在所述第二基板的与所述第一基板相对的表面上，所述第二辅助导线具有 平面形状对应于电光元件的非开口区域。

公开(公告)号：US20050007392A1

公开(公告)日：2005-01-13

申请号：US10849834

申请日：2004-05-21

申请人： Toshiyuki Kasai ,  Yoichi Imamura

发明人： Toshiyuki Kasai ,  Yoichi Imamura

IPC分类号： H01L51/50 ,  G09F9/00 ,  G09G3/20 ,  G09G3/30 ,  G09G3/32 ,  H04N5/70 ,  G09G5/10

CPC分类号： G09G3/2014 ,  G09G3/20 ,  G09G3/2018 ,  G09G3/325 ,  G09G3/3275 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2320/0276 ,  G09G2320/0285 ,  G09G2320/041 ,  G09G2320/048 ,  G09G2320/0626 ,  G09G2340/0428 ,  G09G2360/144

摘要： The invention provides an electro-optical device that stabilizes display quality by performing correction processing corresponding to a plurality of disturbance factors. Specifically, a grayscale characteristic generating unit can generate conversion data having grayscale characteristics obtained by changing the grayscale characteristics of display data that defines the grayscales of pixels with reference to a conversion table whose description contents include correction factors. A data line driving circuit can drive the pixels after correcting the grayscale characteristics of the conversion data by the correction factors using other processing different from the that performed by the grayscale characteristic generating unit.

摘要翻译： 本发明提供了一种通过对应于多个扰动因子执行校正处理来稳定显示质量的电光装置。 具体地，灰度特征生成单元可以参考其描述内容包括校正因子的转换表，生成通过改变定义像素灰度等级的显示数据的灰度特性而获得的灰度特性的转换数据。 数据线驱动电路可以使用与灰度特征生成单元所执行的其他处理不同的处理，通过校正因子校正转换数据的灰度特性来驱动像素。

公开(公告)号：US06191768B1

公开(公告)日：2001-02-20

申请号：US09270928

申请日：1999-03-16

申请人： Yoichi Imamura

发明人： Yoichi Imamura

IPC分类号： G09G336

CPC分类号： G09G5/395 ,  G09G3/3622 ,  G09G3/3625 ,  G09G3/3681 ,  G09G3/3692 ,  G09G2310/0205 ,  G09G2310/027 ,  G09G2310/04 ,  G09G2330/021 ,  G09G2360/18 ,  G09G2370/08

摘要： A matrix-type display control device suited to large capacity displays while achieving low power consumption operation is achieved by improving the display data transfer method. The module controller 100 of a simple matrix-type liquid crystal display comprises a low frequency oscillator 110, timing signal generator 120, standby circuit (display data refresh detection circuit) 130, high frequency oscillator 140, and a direct memory access (DMA circuit) 150. This low frequency oscillator 110 constantly generates the low frequency clock fL. Timing signal generator 120 generates the scan start signal YD required for the LCD module 200, and other signals based on the low frequency clock fL. Standby circuit 130 generates the intermittent operation start control signal {overscore (STE)} when the display data in VRAM 12 is updated as determined by monitoring the system bus 14a for communications with host MPU 10. The high frequency oscillator 140 generates the high frequency clock fH phase synchronized to the low frequency clock fL during the intermittent operation start control signal {overscore (ST)} apply period. The DMA circuit 150 reads the display data from the VRAM 12 over dedicated bus 14b by direct memory access, and transfers the display data over data bus 17 to the frame memories 252-1˜252-N of X drivers 250-1˜250-N during the intermittent operation start control signal {overscore (ST)} apply time using the high frequency clock fH.

摘要翻译： 通过改进显示数据传输方法，实现了适用于大容量显示器的矩阵式显示控制装置。简单矩阵型液晶显示器的模块控制器100包括低频振荡器110，定时信号 发生器120，待机电路（显示数据刷新检测电路）130，高频振荡器140和直接存储器访问（DMA电路）150。该低频振荡器110不断产生低频时钟fL。 定时信号发生器120产生LCD模块200所需的扫描开始信号YD以及基于低频时钟fL的其它信号。 当VRAM12中的显示数据被更新时，备用电路130产生间歇操作开始控制信号（超标（STE）}，如通过监视系统总线14a来确定的，以与主机MPU 10通信。高频振荡器140产生高频时钟 在间歇操作开始控制信号（过大（ST））施加周期期间与低频时钟fL同步的fH相。 DMA电路150通过专用总线14b通过直接存储器访问从VRAM 12读取显示数据，并且将数据总线17上的显示数据传送到X驱动器250-1〜250的帧存储器252-1〜252-N， N在间歇操作开始控制信号（过大（ST））}期间使用高频时钟fH。

公开(公告)号：US6075420A

公开(公告)日：2000-06-13

申请号：US794241

申请日：1997-01-31

申请人： Yoichi Imamura ,  Shigeki Aoki ,  Norio Koizumi

发明人： Yoichi Imamura ,  Shigeki Aoki ,  Norio Koizumi

IPC分类号： G09G3/20 ,  G09G3/36 ,  G09G5/22 ,  H03K3/0231 ,  H03K3/03 ,  H03B5/24

CPC分类号： H03K3/0322 ,  G09G3/20 ,  G09G3/3611 ,  G09G3/3685 ,  H03K3/0231 ,  H03K3/03 ,  G09G2330/021 ,  G09G5/222

摘要： An oscillation device includes a buffer device, a feedback device for feeding back an output of the buffer device to an input thereof and a charging device and a discharging device connected to the input of the buffer device. The charging device includes a first switching device that is turned on and off based on the output of the buffer device and a first current control device that controls the current flowing into the input of the buffer device through the first switching device. The discharging device includes a second switching device that is turned on or off based on the output of the buffer device and a second current control device that controls the current flowing out of the input of the buffer device through the second switching device. The first and second switching devices include first and second transistors and the first and second current sources that include third and fourth transistors. The oscillation device includes a bias circuit that controls at least the current ratio of the first and second current of the first and second current sources by controlling bias voltages applied to first and second bias terminals of the oscillation device.

摘要翻译： 振荡装置包括缓冲装置，用于将缓冲装置的输出反馈到其输入端的反馈装置和连接到缓冲装置的输入端的充电装置和放电装置。 充电装置包括基于缓冲装置的输出而导通和断开的第一开关装置和通过第一开关装置控制流入缓冲装置的输入端的电流的第一电流控制装置。 放电装置包括基于缓冲装置的输出而导通或关断的第二开关装置，以及通过第二开关装置控制从缓冲装置的输入流出的电流的第二电流控制装置。 第一和第二开关器件包括第一和第二晶体管，第一和第二电流源包括第三和第四晶体管。 振荡装置包括偏置电路，其通过控制施加到振荡装置的第一和第二偏置端子的偏置电压来至少控制第一和第二电流源的第一和第二电流的电流比。

公开(公告)号：US5914699A

公开(公告)日：1999-06-22

申请号：US799327

申请日：1997-02-13

申请人： Yoichi Imamura

发明人： Yoichi Imamura

IPC分类号： G02F1/133 ,  G09G3/20 ,  G09G3/36 ,  G09G5/395 ,  G11C11/401

CPC分类号： G09G5/395 ,  G09G3/3622 ,  G09G3/3625 ,  G09G3/3681 ,  G09G3/3692 ,  G09G2310/0205 ,  G09G2310/027 ,  G09G2310/04 ,  G09G2330/021 ,  G09G2360/18 ,  G09G2370/08

摘要： A matrix-type display control device suited to large capacity displays while achieving low power consumption operation is achieved by improving the display data transfer method. The module controller 100 of a simple matrix-type liquid crystal display comprises a low frequency oscillator 110, timing signal generator 120, standby circuit (display data refresh detection circuit) 130, high frequency oscillator 140, and a direct memory access (DMA circuit) 150. This low frequency oscillator 110 constantly generates the low frequency clock f.sub.L. Timing signal generator 120 generates the scan start signal YD required for the LCD module 200, and other signals based on the low frequency clock f.sub.L. Standby circuit 130 generates the intermittent operation start control signal ST when the display data in VRAM 12 is updated as determined by monitoring the system bus 14a for communications with host MPU 10. The high frequency oscillator 140 generates the high frequency clock f.sub.H phase synchronized to the low frequency clock f.sub.L during the intermittent operation start control signal ST apply period. The DMA circuit 150 reads the display data from the VRAM 12 over dedicated bus 14b by direct memory access, and transfers the display data over data bus 17 to the frame memories 252-1.about.252-N of X drivers 250-1.about.250-N during the intermittent operation start control signal ST apply time using the high frequency clock f.sub.H.

摘要翻译： 通过改进显示数据传输方法，可实现适用于大容量显示器的矩阵式显示控制装置，同时实现低功耗操作。 简单矩阵型液晶显示器的模块控制器100包括低频振荡器110，定时信号发生器120，待机电路（显示数据刷新检测电路）130，高频振荡器140和直接存储器存取（DMA电路） 该低频振荡器110不断产生低频时钟fL。 定时信号发生器120产生LCD模块200所需的扫描开始信号YD以及基于低频时钟fL的其它信号。 当VRAM 12中的显示数据被更新时，备用电路130产生间歇操作开始控制信号+ E，ovs ST + EE，如通过监视与主机MPU 10通信的系统总线14a所确定的。高频振荡器140产生高频 在间歇运行启动控制信号+ E，ovs ST + EE施加期间，时钟fH相与低频时钟fL同步。 DMA电路150通过专用总线14b通过直接存储器访问从VRAM 12读取显示数据，并且将数据总线17上的显示数据传送到X驱动器250-1差分250-1的帧存储器252-1差分252-N。 N在间歇运行期间启动控制信号+ E，ovs ST + EE使用高频时钟fH。

公开(公告)号：US08130176B2

公开(公告)日：2012-03-06

申请号：US12219535

申请日：2008-07-23

申请人： Toshiyuki Kasai ,  Yoichi Imamura ,  Tokuro Ozawa

发明人： Toshiyuki Kasai ,  Yoichi Imamura ,  Tokuro Ozawa

IPC分类号： G09G3/30

CPC分类号： G09G3/325 ,  G09G2300/043 ,  G09G2300/0809 ,  G09G2300/0842 ,  G09G2300/0861 ,  G09G2310/0254 ,  G09G2310/0256 ,  G09G2320/043 ,  G09G2330/021

摘要： The invention provides an electro-optical apparatus that can prevent a shift in a threshold voltage of an amorphous silicon transistor while driving an organic EL device in a pixel circuit including the amorphous silicon transistor. A characteristic-adjustment circuit can be provided, which has a function of returning a shift in the threshold voltage of the amorphous silicon transistor included in the pixel circuit to the original state.

摘要翻译： 本发明提供一种能够在包括非晶硅晶体管的像素电路中驱动有机EL器件的同时防止非晶硅晶体管的阈值电压偏移的电光装置。 可以提供一种特性调整电路，其具有将包括在像素电路中的非晶硅晶体管的阈值电压的偏移返回到原始状态的功能。

公开(公告)号：US08007181B2

公开(公告)日：2011-08-30

申请号：US11660520

申请日：2005-07-19

申请人： Kenichi Iso ,  Yujiro Toda ,  Yoichi Imamura

发明人： Kenichi Iso ,  Yujiro Toda ,  Yoichi Imamura

IPC分类号： F16C19/00 ,  C10M169/04

CPC分类号： C10M171/02 ,  C10N2220/022 ,  C10N2230/06 ,  C10N2230/08 ,  C10N2240/02 ,  C10N2250/10 ,  F16C19/06 ,  F16C33/6633 ,  F16C2300/02

摘要： A grease composition having an apparent viscosity at −30° C. of 5 to 200 Pa·s is sealed in a rolling bearing which retains a plurality of rolling elements between an inner ring and an outer ring in such a way that the rolling elements can freely roll. Thereby, there is provided a rolling bearing which has a satisfactory lubricating performance and generates less abnormal noise even under a low temperature of around −40° C.

摘要翻译： 在-30℃下的表观粘度为5〜200Pa·s的润滑脂组合物被密封在滚动轴承中，滚动轴承将多个滚动元件保持在内圈和外圈之间，使得滚动元件可以 自由滚动 因此，提供了一种具有令人满意的润滑性能的滚动轴承，甚至在-40℃左右的低温下也产生较少的异常噪声。

公开(公告)号：US07524228B2

公开(公告)日：2009-04-28

申请号：US11498187

申请日：2006-08-03

申请人： Yoichi Imamura

发明人： Yoichi Imamura

IPC分类号： H01J9/00 ,  H05B33/04

CPC分类号： H01L27/3246 ,  H01L27/3244 ,  H01L51/5256 ,  H05B33/04 ,  Y10S428/917

摘要： A sealing structure having a barrier membrane, with which the overall thickness of a display device can be reduced while ensuring sufficient barrier properties against water and oxygen so as to prevent deterioration of luminous layers. The sealing structure comprises a multi-layered resin membrane 14b for sealing an electronic element section 3 disposed on a substrate 2, which is formed by alternately depositing flattening resin layers 14c and barriers layers 14d on the substrate 2. The flattening resin layers 14c are formed inside a blocking region 14a surrounding the electronic element section 3. A display device having the sealing structure, an electronic apparatus having the display device, and a fabrication method for the display device are also disclosed.

摘要翻译： 一种具有阻隔膜的密封结构，可以在确保显示装置的整体厚度的同时确保足够的水和氧的阻隔性，从而防止发光层的劣化。 密封结构包括用于密封设置在基板2上的电子元件部分3的多层树脂膜14b，其通过在基板2上交替地沉积平坦化的树脂层14c和阻挡层14d而形成。形成平坦化树脂层14c 在围绕电子元件部分3的阻挡区域14a内部。还公开了一种具有密封结构的显示装置，具有该显示装置的电子设备以及该显示装置的制造方法。